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1. 发明专利

JPH03173276A RINGING ELIMINATION DEVICE 失效
公开(公告)号：JPH03173276A
公开(公告)日：1991-07-26
申请号：JP31062489
申请日：1989-12-01
申请人： HITACHI LTD
发明人： ONISHI MAKOTO , IZAWA YUJI
IPC分类号： H04N5/21 , G06T5/20 , H03H17/02 , H03H17/06 , H03H21/00
摘要： PURPOSE:To prevent deterioration in the resolution without attenuating a high frequency signal different from a conventional device by adopting the method selecting a filter whose amplitude frequency characteristic is unchanged for eliminating ringing. CONSTITUTION:A reception reference waveform signal yj is extracted from a reception signal by a gate circuit 30. The obtained signal yj is stored in a memory 31. On the other hand, a reference waveform signal xj is stored in a memory 32 in advance. An impulse response coefficient hj is obtained from the obtained signals yj, xj at a polynomial divider 33 by using equation. The obtained coefficient hj is processed to be a symmetrical coefficient as (hj+hL-j)/2 at a symmetry processing computing element 34. Moreover, a front ringing portion of the impulse response of the symmetrical coefficient filter is expanded to point-symmetry with respect to the center of the response to obtain a point- symmetry coefficient by using a point symmetry processing computing element 35. The obtained symmetry coefficient and point-symmetry coefficient are given to a symmetry coefficient filter 21 and a point-symmetry coefficient filter 22 to build up a ringing elimination device with the same coefficient as a transfer function of the transmission line at a receiver side.

2. 发明专利

JPH01264393A MULTIPLE ENCODING DEVICE 失效
公开(公告)号：JPH01264393A
公开(公告)日：1989-10-20
申请号：JP9155788
申请日：1988-04-15
申请人： HITACHI LTD
发明人： TAKIZAWA MASAAKI , KIMURA JUNICHI , IZAWA YUJI , WATANABE HIROMI
IPC分类号： H04N19/126 , H04N7/08 , H04N7/081 , H04N7/24 , H04N19/00 , H04N19/149 , H04N19/172 , H04N19/196 , H04N19/42 , H04N19/423 , H04N19/46 , H04N19/503 , H04N19/61 , H04N19/625 , H04N19/70 , H04N19/85 , H04N19/91 , H04N19/94
摘要： PURPOSE:To obtain a picture quality conforming to a user's request by providing a means to make variable a cycle switching a TV signal and a means to notify which TV signal is transmitted to a receiving side, and transmitting the plural TV signals on a time sharing basis with a single TV. CONSTITUTION:Switches 5, 13 and 14 are switched in units of a picture. When a control part 11 detects the encoding completion of the presently encoded picture through a signal line 32, it advances a counter 63 by 1. The output of the counter 63 is inputted to a signal source selecting ROM 64, and a signal to select the signal source to be next transmitted is outputted to a selective signal line 33. The selective signal line 33 switches the signal source, etc. Simultaneously, quantizing accuracy for the selected signal is determined, and outputted to a quantizing accuracy signal line 31. When a variable length encoding circuit 8 identifies the signal source to be next transmitted from the selective signal line 33, an identifier is encoded and transmitted according to a method fixed beforehand. Thus, the resolution of the picture or the number of pictures per second can be controlled according to the feature (motion and importance degree) of the picture.

3. 发明专利

JPS63193784A CODING DEVICE FOR TELEVISION SIGNAL 失效
公开(公告)号：JPS63193784A
公开(公告)日：1988-08-11
申请号：JP2453487
申请日：1987-02-06
申请人： HITACHI LTD
发明人： KIMURA JUNICHI , IZAWA YUJI
IPC分类号： H04N19/50 , H04N19/105 , H04N19/167 , H04N19/182 , H04N19/186 , H04N19/196 , H04N19/423 , H04N19/46 , H04N19/503 , H04N19/51 , H04N19/60 , H04N19/61 , H04N19/625 , H04N19/70 , H04N19/80 , H04N19/85
摘要： PURPOSE:To improve a compression efficiency by means of orthogonal conversion by adopting a function which reduces the electric power of a high-order term after it has been orthogonally converted for evaluation function for motion compensation. CONSTITUTION:The function showing the electric power of the high frequency component of a difference between blocks is used as the evaluation function of the similarity of the blocks. With using the evaluation function, the block in which the electric power of the high frequency component becomes minimum is searched, and a difference signal with the block is orthogonally converted. In such a time, the electric power of the high-order term which has been converted is reduced compared to the conventional motion compensation, and it concentrates around '0'. On the contrary, the electric power of a low-order term increases, and the dispersion becomes large. Since the dispersion of the low-order term is conventionally large, influence due to the increase in the electric power is less. As a result, the number of distributed bits to the high-order term decreases, and the number of distributed bits to the low-order term increases. Since the number of high-order terms is large, the number of whole bits for transmission reduces as the whole blocks, whereby the higher compression efficiency can be obtained.

4. 发明专利

JPS6354012A DIFFERENCE CIRCUIT USING SWITCHED CAPACITOR 失效
公开(公告)号：JPS6354012A
公开(公告)日：1988-03-08
申请号：JP19712086
申请日：1986-08-25
申请人： HITACHI LTD
发明人： MATSUI KAZUMASA , IZAWA YUJI , FURUHATA MAKOTO , MINAMIMURA EIJI
IPC分类号： H03H19/00 , G06G7/14 , H03K5/156
摘要： PURPOSE:To output a difference voltage at one and same time continuously with simple constitution by holding the difference voltage via the 1st and 2nd capacitors controlled by clocks whose phases are deviated to each other and not overlapped. CONSTITUTION:With a clock phi1 at an H level, switches 3, 4 are turned on and the 1st capacitor 11 is charged in response to the difference of input voltages V1, V2 at one and same time. When the clock phi1 goes to an L level, the switches 3, 4 are turned off, a difference voltage is sampled by a capacitor C1, and when the clock phi2 not overlapped with the clock phi1 goes to H, switches 5, 6 are turned on and one terminal of the capacitor C1 is connected to a zero level power supply 16. Then the difference voltage with respect to the zero level of the capacitor C1 charges the 2nd capacitor C2 whose one terminal is connected to ground in terms of AC via the switch 5, the clock phi2 goes to L and held even after the switch 5 is turned off and the difference voltage is extracted continuously from an output terminal 18 via a buffer amplifier 17 with simple constitution.

5. 发明专利

JPS6135019A Drive circuit of cmos switch 失效
标题翻译： CMOS开关驱动电路
公开(公告)号：JPS6135019A
公开(公告)日：1986-02-19
申请号：JP15524984
申请日：1984-07-27
申请人： Hitachi Ltd
发明人： FUKAZAWA SHIGERU , IZAWA YUJI
IPC分类号： H03K17/687
摘要： PURPOSE: To relax the transition time of a switch from an ON to OFF state by setting an amplification factor of P and N channel transistors (TRs) of each CMOS inverter driving respectively the P and N channel TRs of the switch to a prescribed value.
CONSTITUTION: The circuit consists of an inverter 3 receiving an input clock signal 1 and generating a signal driving a gate of a P channel TR6 of the switch, an inverter 4 receiving an output signal of the inverter 3 and generating a signal driving a gate of an N channel TR5 of the switch and CMOS switches 5, 6 receiving an analog signal input 2 and generating an analog output signal 7. The amplification factor of the P channel TR is decreased than the N channel TR in the inverter 3 so as to relax the transition time from ON to OFF of the TR6. The amplification factor of the P channel TR of the inverter 4 is larger than that of the N channel TR to relax the transition time from ON to OFF of the TR5.
COPYRIGHT: (C)1986,JPO&Japio
摘要翻译：目的：通过设置每个CMOS反相器的P和N沟道晶体管（TR）的放大系数将开关的P和N沟道TR分别驱动到规定值，来将开关从导通到断开状态的转换时间放宽到规定值。构成：电路由接收输入时钟信号1并产生驱动开关的P沟道TR6的栅极的信号的反相器3构成，反相器4接收反相器3的输出信号，并产生驱动栅极的信号开关的N沟道TR5和接收模拟信号输入2的CMOS开关5,6接收并产生模拟输出信号7.与倒相器3中的N沟道TR相比，P沟道TR的放大系数减小，以放宽 TR6的从ON到OFF的转换时间。反相器4的P沟道TR的放大系数大于N沟道TR的放大系数，以放宽TR5从导通到截止的转换时间。

6. 发明专利

JPH1127577A IMAGE SYSTEM WITH VIRTUAL VISUAL POINT 失效
公开(公告)号：JPH1127577A
公开(公告)日：1999-01-29
申请号：JP17353097
申请日：1997-06-30
申请人： HITACHI LTD
发明人： KIMURA JUNICHI , KINOSHITA YASUAKI , IZAWA YUJI
IPC分类号： H04N5/262 , G06T1/00 , G06T3/00 , G09G5/36 , G09G5/377
摘要： PROBLEM TO BE SOLVED: To generate a virtual image at an arbitrary visual point and to generate an image full of presence in real time by allowing a system to have a means that compares a camera image with a background image photographed in advance for extracting an object, magnifying and modifying an image of the object, and compositing the image on a still background. SOLUTION: An image of a camera 1 through a zoom lens 2 is written in a frame memory 8. An image only of a background photographed at the position of the camera is read from a storage device, in which an image database 5, is constructed and written in a frame memory 6. The contents of the two frame memories are compared by a compactor circuit 9, matching consents are discriminated as a background and other parts are discriminated as an object, and only the object contents are transferee to a frame memory 10. An image signal in the frame memory is given to an image conversion circuit 11, where processing such as modification or magnification is conducted, based on the position and angle of a virtual camera and the result is written in a frame memory 7 in which only the background is overwritten.

7. 发明专利

JPH0472981A PICTURE CODER AND PICTURE DECODER 失效
公开(公告)号：JPH0472981A
公开(公告)日：1992-03-06
申请号：JP18394990
申请日：1990-07-13
申请人： HITACHI LTD
发明人： WATANABE HIROMI , IZAWA YUJI
IPC分类号： H04N19/102 , H04N1/41 , H04N19/12 , H04N19/134 , H04N19/136 , H04N19/14 , H04N19/169 , H04N19/176 , H04N19/196 , H04N19/42 , H04N19/423 , H04N19/593 , H04N19/60 , H04N19/61 , H04N19/65 , H04N19/85
摘要： PURPOSE:To improve a coding efficiency and one-frame processing speed by adding a function comparing a current frame with a 2-preceding frame to the coder and decoder and sending only a code representing invalidity for a part discriminated when the both are equal. CONSTITUTION:A discriminator 5 discriminates a picture data from a frame memory and outputs a result representing whether the data is valid or invalid. A coder 10 applies orthogonal transformation to a block discriminated to be valid in a picture and applies quantization thereto and sends the result while allocating a code. Moreover, the coder 10 applies only code allocation of an invalid block to the block discriminated to be invalid and sends the result. Since a discrimination device 5 discriminates a valid/invalid part through the comparison with a representative value of a preceding frame, even a changing picture in an actual picture may be discriminated to be an invalid part. Then a valid frame per several frames is produced without fail in each frame of a picture data in a frame memory so that mis-discrimination is not caused for several consecutive frames.

8. 发明专利

JPH01114280A ORTHOGONAL TRANSFORM CODING DEVICE 失效
公开(公告)号：JPH01114280A
公开(公告)日：1989-05-02
申请号：JP27018887
申请日：1987-10-28
申请人： HITACHI LTD
发明人： TAKIZAWA MASAAKI , KIMURA JUNICHI , IZAWA YUJI
IPC分类号： H04N19/60 , H04N19/13 , H04N19/132 , H04N19/136 , H04N19/18 , H04N19/189 , H04N19/42 , H04N19/423 , H04N19/46 , H04N19/625 , H04N19/70 , H04N19/85
摘要： PURPOSE:To improve coding efficiency by transmitting a scanning line termination signal even when significant coefficients concentrate on a horizontal axis or a vertical axis. CONSTITUTION:Orthogonal transformation coefficients are scanned in the direction of an internal block scanning line, from the left to the right in a horizontal direction, for example, namely, from a low-order coefficient to a high-order coefficient, and a coefficient 04 on the right side of all the significant coefficients X1-X3 is decided to be invalid or not. When all the coefficients are invalid, a special code word EOB showing the termination of the internal block scanning line is transmitted, and the coding of the subsequent invalid coefficient O of the internal block scanning line is stopped. Consequently, efficient coding is attained even when the orthogonal transformation coefficients which have been two-dimensionally and orthogonally transform concentrate on the horizontal axis or the vertical axis. Thus, coding efficiency can be improved.

9. 发明专利

JPS6441386A IMAGE ENCODER 失效
公开(公告)号：JPS6441386A
公开(公告)日：1989-02-13
申请号：JP19618487
申请日：1987-08-07
申请人： HITACHI LTD
发明人： IZAWA YUJI , KIMURA JUNICHI , TAKIZAWA MASAAKI
IPC分类号： H04N1/41 , G06T9/00 , H04N19/33 , H04N19/42 , H04N19/423 , H04N19/46 , H04N19/503 , H04N19/51 , H04N19/60 , H04N19/61 , H04N19/625 , H04N19/70 , H04N19/85 , H04N19/86 , H04N19/91
摘要： PURPOSE:To eliminate and reduce block distortions by deciding other coefficients do as to keep the consecutiveness of an image signal between blocks from part of the coefficients and applying decoding or reproduction. CONSTITUTION:A coefficient not sent yet among conversion coefficients is set as a variable and a signal is decoded to an image signal by inverse orthogonal conversion, then the coefficient is obtained under the condition so that smooth consecution is obtained at the border of blocks and then decoding is applied. In this case, when the boundary conditions equal to the number of variables are given, the variable has a sole solution by solving a simultaneous equation. The solution is represented by a matrix intrinsic to the order number of the variable and a vector product decided by the boundary conditions. Thus, it is possible to obtain the solution easily by the means similar to orthogonal conversion. Thus, no poststage filter is used to eliminate or reduce the block distortion.

10. 发明专利

JPS62174943A CIRCUIT DEVICE 失效
公开(公告)号：JPS62174943A
公开(公告)日：1987-07-31
申请号：JP1562386
申请日：1986-01-29
申请人： HITACHI LTD
发明人： MATSUI KAZUMASA , IZAWA YUJI
IPC分类号： H01L21/768 , H01L21/82 , H01L23/522
摘要： PURPOSE:To reduce the leakage of jamming signals by a method wherein, in an integrated circuit, an interconnection with polarity signals reverse to that of a jamming interconnection is provided on the jamming interconnection to transmit polarity signals reverse to that of jamming interconnection to a jammed interconnection. CONSTITUTION:A substrate 11 is provided with a long and large-spaced jammed interconnection 3 connected to an input terminal of an amplifier 2. A compensating interconnection 21 receiving polarity signals reverse to that of a jamming signal source 4 from a polarity reversing circuit 20 is arranged close to a jamming interconnection 15 connected to the jamming signal source 4. The leakage of jamming signals is proportional to the difference between the coupling capacity value between the interconnections 3 and 15 and the other coupling capacity value between the interconnection 3 and 21. In such a constitution, the jamming interconnection 15 and the compensating interconnection 21 are closely interconnected to make the distance (d) between them shorter than the distance (D) between the jamming interconnection 15 and the jammed interconnection 3. Resultantly, the interconnections 15, 21 can take almost the same shape to reduce the leakage of jamming signals.

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