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1. 发明专利

JPS6238021A MAGNETIC RECORDING AND REPRODUCING DEVICE 失效
公开(公告)号：JPS6238021A
公开(公告)日：1987-02-19
申请号：JP17586085
申请日：1985-08-12
申请人： HITACHI LTD
发明人： HORIUCHI KENJI , ONO SHOJI , FUNAKI HIDEKAZU , SASAKI KOJI
IPC分类号： G11B31/00 , G11B33/10 , H03J5/02 , H03J7/18
摘要： PURPOSE:To improve the operability by providing a search direction display function so as to apply display to search up direction, search down direction and search end. CONSTITUTION:In depressing a search + button, a timer clock control section 33 sends a 'tuning up' command to allow a tuner control section 22 to start the upper direction search. It is displayed that the upper direction search is in progress by flickering sequentially the upper direction of a horizontal direction segment of a display tube 35 at the same time. In depressing the search button in this state, a timer clock control section 33 sends a 'tuning down' command to the tuner control section 22 and the horizontal direction segment of the display tube 35 is flickered sequentially downward to display that the down direction search is in progress.

2. 发明专利

JPS61222314A LEVEL DISCRIMINATING CIRCUIT 失效
公开(公告)号：JPS61222314A
公开(公告)日：1986-10-02
申请号：JP714784
申请日：1984-01-20
申请人： HITACHI LTD
发明人： SEKI KUNIO , HORIUCHI KENJI
IPC分类号： H03K5/08 , G01R19/165 , H03K3/02 , H03K17/14 , H03K17/30 , H03K17/60
摘要： PURPOSE:To compensate the negative temperature coefficient of the transistor (TR) of the final stage by making the current density of plural TRs of the pre-stage different so as to provide a positive temperature coefficient among base-emitter voltages. CONSTITUTION:The current density of a current flowing to TRs Q1, Q2 is made different so as to give the positive temperature coefficient between base-emitter voltages of the two TRs. Thus, the negative temperature coefficient of a TR Q3 is compensated so as to keep the threshold voltage of the TR Q3 viewed from the terminal No.1 constant independently of the ambient temperature of an IC.

3. 发明专利

JPS61218389A MOTOR DRIVE CIRCUIT 失效
公开(公告)号：JPS61218389A
公开(公告)日：1986-09-27
申请号：JP5834385
申请日：1985-03-25
申请人： HITACHI LTD
发明人： SEKI KUNIO , HORIUCHI KENJI
IPC分类号： H02P6/06 , H02P6/08 , H02P6/24 , H02P6/26
摘要： PURPOSE:To reduce a noise by connecting a capacitor between the input side and the output side of an output circuit for switching a phase to smoothly switch the energization of motor coils. CONSTITUTION:Capacitors CA, CB are connected between the input sides and the output sides of a plurality of output circuits for switching the phase of a current supplied to a motor coil L1 to form a mirror integrator, and the rising and falling characteristics of output voltages V12, V13 are smoothened by the time constants of the capacitors CA, CB. A circuit block 11 forms an amplifier, and the output of the block 11 is applied to output circuits 12, 13. When the motor becomes the rotation stopping state due to the unexpected defect, the terminal voltage of a capacitor C41 of a motor stop detector 14 decreases to turn OFF a pilot lamp.

4. 发明专利

JP2011107857A Storage system having power saving function 有权
标题翻译：具有节电功能的存储系统
公开(公告)号：JP2011107857A
公开(公告)日：2011-06-02
申请号：JP2009260616
申请日：2009-11-16
申请人： Hitachi Ltd , 株式会社日立製作所
发明人： YANAGAWA AKIFUMI , HORIUCHI KENJI , YANAGI NAOTO
IPC分类号： G06F3/06 , G06F1/26 , G06F1/32
CPC分类号： G06F3/0634 , G06F3/0625 , G06F3/067 , G06F3/0689 , Y02D10/154
摘要： PROBLEM TO BE SOLVED: To reduce the frequency with which a power saving state of physical storage devices is canceled, not only in a storage system in the NAS (Network Attached Storage) field, but also in a storage system other than the NAS field. SOLUTION: A controller of a storage system associates a portion of the logical area of logical storage devices with one or more pool areas of a pool. The frequency of I/O (Input/Output) of any of the portion of the logical areas is higher than the I/O frequency of the remaining logical areas of the logical storage devices. In the event of I/O, if a first physical storage device group which forms the basis of the physical storage devices is in a power saving state, then the controller performs I/O of a data element to/from the pool area corresponding to the logical area of the I/O destination, without canceling the power saving state of the first physical storage device group. COPYRIGHT: (C)2011,JPO&INPIT
摘要翻译：要解决的问题：为了减少物理存储装置的省电状态被取消的频率，不仅在NAS（网络连接存储）领域的存储系统中，而且在除了 NAS领域。解决方案：存储系统的控制器将逻辑存储设备的逻辑区域的一部分与池的一个或多个池区域相关联。逻辑区域的任何部分的I / O（输入/输出）的频率高于逻辑存储设备的剩余逻辑区域的I / O频率。在I / O的情况下，如果形成物理存储设备的基础的第一物理存储设备组处于省电状态，则控制器执行数据元素的I / O与/ I / O目的地的逻辑区域，而不取消第一物理存储设备组的省电状态。版权所有（C）2011，JPO＆INPIT

5. 发明专利

JPH0612857B2 失效
公开(公告)号：JPH0612857B2
公开(公告)日：1994-02-16
申请号：JP10257883
申请日：1983-06-10
申请人： HITACHI LTD
发明人： TAKESHITA RITSUJI , SEKI KUNIO , HORIUCHI KENJI
IPC分类号： H03F1/30

6. 发明专利

JPH01314292A DYNAMIC DISPLAY SYSTEM 失效
公开(公告)号：JPH01314292A
公开(公告)日：1989-12-19
申请号：JP14571888
申请日：1988-06-15
申请人： HITACHI LTD
发明人： HORIUCHI KENJI , IWATA KATSUMI
IPC分类号： G09G3/12
摘要： PURPOSE:To perform a stable display even if the number of display digits is changed by changing the pulse width of a digit signal corresponding to the number of display digits or inserting a display blanking period in a frame period after making the pulse width of the digit signal constant and keeping the frequency of frame constant regardless of the number of display digits. CONSTITUTION:By changing the pulse width of the digit signal corresponding to the number of display digits, the frequency of the frame can be made constant regardless of the number of display digits. Even if the number of display digits is changed, the fluctuation, flicker or beat, etc., of the display can be prevented from occurring and the stable display action can be performed. By making the pulse width of the digit signal constant and inserting the display blanking period in the frame period if necessary, the frame period can be made constant regardless of the number of display digits. Even if the number of display digits is changed, the fluctuation, flicker or the beat, etc., of the display can be prevented from occurring and the stable display action can be performed.

7. 发明专利

JPS63208091A CHARACTER GENERATOR 失效
公开(公告)号：JPS63208091A
公开(公告)日：1988-08-29
申请号：JP4025687
申请日：1987-02-25
申请人： HITACHI LTD
发明人： HORIUCHI KENJI , IWATA KATSUMI
IPC分类号： G06F3/153 , G09G1/14 , G09G5/24

8. 发明专利

JPS59107611A Amplifier 失效
标题翻译：放大器
公开(公告)号：JPS59107611A
公开(公告)日：1984-06-21
申请号：JP21684282
申请日：1982-12-13
申请人： Hitachi Ltd
发明人： SEKI KUNIO , TAKESHITA RITSUJI , HORIUCHI KENJI
IPC分类号： H03F1/32 , H03F1/42 , H03F1/52 , H03F3/30 , H03G11/00
摘要： PURPOSE: To obtain an excellent output characteristic by changing the amplification gain to reduce the generation of distortion when the level of an input signal is excessively large.
CONSTITUTION: An input signal VIN is amplified by the 1st stage amplifier 1 and fed to a class A driving amplifier 2 comprising transistors(TRs) Q
1 , Q
2 of Darlington connection and a capacitor C
1 for phase compensation. When an output signal V
0 of the amplifier 2 is positive, a current obtained from a constant current circuit CS
1 flows to the base of a TRQ
3 and a TRQ
4 is turned on by its emitter current. In this case, a TRQ
5 is turned off, an output current I
1 flows from a +V
cc power supply to a speaker SP being a load via a TRQ
4 , an output terminal 2 and a capacitor C
2 , and the change in the amplitude at the terminal 2 is fed back negatively to an input terminal of the amplifier 1 via a negative feedback circuit having a feedback coefficient β. Further, when a positive signal V
0 of a large amplitide is fed from the amplifier 2, the characteristic is changed into a characteristic with less waveform distortion.
COPYRIGHT: (C)1984,JPO&Japio
摘要翻译：目的：通过改变放大增益来获得优异的输出特性，以减小输入信号电平过大时的失真产生。构成：输入信号VIN由第一级放大器1放大并馈送到包括达林顿连接晶体管（TRs）Q1，Q2和相位补偿电容器C1的A类驱动放大器2。当放大器2的输出信号V0为正时，从恒定电流电路CS1获得的电流流向TRQ3的基极，并且通过其发射极电流导通TRQ4。在这种情况下，TRQ5被关断，输出电流I1经由TRQ4，输出端子2和电容器C2从+ Vcc电源流向作为负载的扬声器SP，并且端子的振幅变化 2经由具有反馈系数β的负反馈电路反向反馈给放大器1的输入端。此外，当从放大器2馈送大放大器的正信号V0时，特性变为具有较小波形失真的特性。

9. 发明专利

JPS57192114A CURRENT MIRROR CIRCUIT 失效
公开(公告)号：JPS57192114A
公开(公告)日：1982-11-26
申请号：JP7653181
申请日：1981-05-22
申请人： HITACHI LTD
发明人： SEKI KUNIO , HORIUCHI KENJI
IPC分类号： H03F3/343 , H03F3/34 , H03F3/347
摘要： PURPOSE:To improve the high speed response, by providing a speed-up capacitor in parallel with an emitter resistor of an output side transistor (TR) in a current mirror circuit. CONSTITUTION:A triangle wave is formed by alternately flowing constant currents I0 and I0' to a capacitor C2. This current I0 is formed through a current mirror circuit consisting of TRsQ1 and Q2 receiving a current signal switching the constant current I0 with switch S1. On the other hand, the current I0' is formed through a current mirror circuit consisting of TRsQ1' and Q2' receiving a current signal switching the constant current source I0' with a switch S1'. In the current mirror circuits, speed-up capacitors C1 and C1' are respectively provided in parallel with emitter resistors R2 and R2' of output TRsQ2 and Q2'. With the constitution like this, when the TRsQ2 and Q2' are switched from turning-off to turning-on, the formed bias voltage can be determined immediately by flowing the currents I0 and I0' to the TRsQ1 and Q1', allowing to improve the response.

10. 发明专利

JP2012118945A Memory control unit applied with thin provisioning 有权
标题翻译：内存控制单元适用于较少的规定
公开(公告)号：JP2012118945A
公开(公告)日：2012-06-21
申请号：JP2010270803
申请日：2010-12-03
申请人： Hitachi Ltd , 株式会社日立製作所
发明人： INOUE SHIORI , MIKI KENICHI , MURAKAMI MASAHARU , HORIUCHI KENJI , WATANABE TAKASHI
IPC分类号： G06F3/06
CPC分类号： G06F3/0611 , G06F3/0647 , G06F3/0665 , G06F3/067
摘要： PROBLEM TO BE SOLVED: To suppress a time needed for data movement from a logical volume to a virtual volume conforming to thin provisioning.SOLUTION: A memory control unit includes a first logical volume stored with data in a pool including, as pool volumes, one or more logical volumes among one or a plurality of logical volumes based upon a plurality of physical memory devices, and also divides the first logical volume into two or more real areas. The memory control unit allocates the first logical volume to a second logical volume as the virtual logical volume which is divided into the two or more virtual areas. The memory control unit performs first data movement processing for moving all data of the first logical volume to one or more pool volumes other than the first logical volume, and allocates real areas as movement destinations of the data to virtual areas as allocation destinations of real areas as movement sources of the data instead of the real areas.
摘要翻译：要解决的问题：抑制从逻辑卷到符合精简配置的虚拟卷的数据移动所需的时间。解决方案：存储器控制单元包括存储在池中的数据的第一逻辑卷，其包括基于多个物理存储器设备的一个或多个逻辑卷中的一个或多个逻辑卷作为池卷，并且还将第一逻辑卷划分为两个或更多个实际区域。存储器控制单元将第一逻辑卷分配给第二逻辑卷作为划分为两个或多个虚拟区域的虚拟逻辑卷。存储器控制单元执行用于将第一逻辑卷的所有数据移动到除了第一逻辑卷之外的一个或多个池卷的第一数据移动处理，并且将实际区域作为数据的移动目的地分配给虚拟区域，作为实际区域的分配目的地作为数据的移动来源而不是实际的区域。版权所有（C）2012，JPO＆INPIT

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