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1. 发明专利

JPH05190499A ETCHING APPARATUS AND MANUFACTURE OF SEMICONDUCTOR SUBSTRATE 失效
公开(公告)号：JPH05190499A
公开(公告)日：1993-07-30
申请号：JP367292
申请日：1992-01-13
申请人： HITACHI LTD
发明人： HORIUCHI KATSUTADA , AOKI SHIGERU , MIZUTANI TATSUMI
IPC分类号： G01R33/64 , G01N24/14 , H01L21/302 , H01L21/3065 , H01L27/12
摘要： PURPOSE:To manufacture a semiconductor substrate having a multilayer structure including semiconductor layers which have a desired thickness and an extremely small irregularity in the thickness. CONSTITUTION:A gas etching apparatus controlled to be fed back by a film thickness measuring instrument and controlled in an etching area through a plasma drawing window 2 is provided. Semiconductor layers 4 having irregular thicknesses are made to have uniform thicknesses by the apparatus. Accordingly, since it can correct the deterioration of controllability of the thicknesses of the layers 4 while controlling to feed back according to a layer thickness distribution, the layer thickness distribution can be remarkably improved.

2. 发明专利

JPH04357655A SILICON SINGLE-PASS MESH FOR TRANSMISSION ELECTRON MICROSCOPE 失效
公开(公告)号：JPH04357655A
公开(公告)日：1992-12-10
申请号：JP13097691
申请日：1991-06-03
申请人： HITACHI LTD
发明人： AOKI SHIGERU
IPC分类号： H01J37/20
摘要： PURPOSE:To enable the crystal defects of silicon for very large scale integration to be compared and observed before and after the heat treatment thereof by using the silicon as a material for the single-pass mesh of a transmission electron microscope. CONSTITUTION:A high-purity silicon wafer having approximately 6cm diameter is mechanically polished into a wafer having approximately 100mum thickness. Subsequent thereto, the wafer is buffed and finished to mirror surface. Then, blank discs having the outer diameters of 3mm and 2.3mm are cut out from the wafer, using an ultrasonic machine. In addition, a hole 2 is drilled through the centers of the discs to approximately 1.2mm diameter, using the machine. A single-pass mesh 3 is thereby manufactured. In order to observe a silicon sample 4 for very large scale integration, the sample 4 is fixed to the mesh 3 with a silicone oxide adhesive. According to this construction, the mesh 3 does not react with the silicon sample 4, even in the case of heat treatment at 1,300 deg.C.

3. 发明专利

JPH0467781A GTO PARALLEL CONNECTION 失效
公开(公告)号：JPH0467781A
公开(公告)日：1992-03-03
申请号：JP17522790
申请日：1990-07-04
申请人： HITACHI LTD
发明人： SENDA KATSUNORI , AOKI SHIGERU
IPC分类号： H02M7/521
摘要： PURPOSE:To reduce a current imbalance at the transient time of a parallel connection by forming not the direct parallel connection of GTO itself but a circuit, in which even the inner structure of a load is made parallel, because a GTO parallel connection is subject to the strict restriction that static and transient characteristics of respective GTOs must almost coincide with each other. CONSTITUTION:GTOs 5a, 5b are connected by a direct gate connecting line 11 and direct cathode connecting line 12, connected with a gate-driving circuit 7 from the middle point of these connecting lines and put in an ON-OFF control action by one gate-driving circuit 7. To reduce a current imbalance at a transient time, the direct gate and cathode connecting lines 11 and 12 have a powerful effect but are subject to the restriction that it is necessary to use the GTOs 5a, 5b having static and transient characteristics being within a certain range. In this case, however, more emphasis is placed on the dependence of impedance of the winding of a load 6 than on the characteristics of the GTOs 5a, 5b. When the impedances of the wiring of the load 6 and that to the load are equal relative to the GTOs 5a, 5b, it is possible to combine the GTOs regardless of the characteristics of the GTOs 5a, 5b.

4. 发明专利

JPH03107366A THYRISTOR SERIES CONNECTION 失效
公开(公告)号：JPH03107366A
公开(公告)日：1991-05-07
申请号：JP24203189
申请日：1989-09-20
申请人： HITACHI LTD
发明人： SENDA KATSUNORI , AOKI SHIGERU
IPC分类号： H02M7/155 , H02M1/08 , H02M7/12 , H02M7/19
摘要： PURPOSE:To reduce the number of gate drive circuit and accompanied wiring and to relieve insulation by connecting a series circuit of a resistor and a capacitor in parallel between the high potential side and the low potential side. CONSTITUTION:An ON signal is inputted to a gate drive circuit 7 arranged in an SCR 1a thus firing the SCR 1a. Current flows from the snubber capacitor 3 in a snubber circuit through a resistor 6, and discharge current flows from a capacitor 6a through a resistor 5a to an SCR 1b upon firing of the SCR 1a. Firing current for the SCR lb is provided in such a manner. Peak current suitable for the SCR is set by selecting the capacitance and the resistance of the capacitor 6a and the resistor 5a. SCRs 1c-1n are fired sequentially upon firing of SCRs in the downstream in similar manner. By such arrangement, the number of gate drive circuit to be arranged individually in the SCRs 1a-1n and accompanied wiring can be reduced, and insulation can be relieved.

5. 发明专利

JPS5919348A Manufacture of semiconductor device 失效
标题翻译：半导体器件的制造
公开(公告)号：JPS5919348A
公开(公告)日：1984-01-31
申请号：JP12752482
申请日：1982-07-23
申请人： Hitachi Ltd
发明人： ISOMAE SEIICHI , TAMURA MASAO , SAIDA HIROJI , KAWAMURA MASAO , AOKI SHIGERU
IPC分类号： H01L21/76 , H01L21/20 , H01L21/762
CPC分类号： H01L21/76202
摘要： PURPOSE:To eliminate a bird beak by forming an insulating film on the desired part of a silicon wafer, selectively growing a silicon crystal on the surface of the silicon except the insulating film forming region, and then partially heating the crystal forming region. CONSTITUTION:A silicon single crystal wafer 2 is oxidized in wet O2 atmosphere of 1,000 deg.C, thereby growing an SiO2 film 4 of approx. 800nm. Then, an SiO2 film is formed by photolithography only on the desired region. Then, SiCl4 gas is flowed at 800 deg.C, and silicon crystal 7 is selectively grown at approx. 700 deg.C only on the region exposed on the silicon surface 6. Then, the crystal 7 is heated partly by the light emitted from a CW argon laser.
摘要翻译：目的：为了通过在硅晶片的所需部分上形成绝缘膜来消除鸟嘴，在除了绝缘膜形成区域之外的硅表面上选择性地生长硅晶体，然后部分地加热晶体形成区域。构成：将硅单晶晶片2在1000℃的湿O2气氛中氧化，从而生长大约2℃的SiO 2膜4。为800nm。然后，仅通过光刻法在所需区域上形成SiO 2膜。然后，SiCl 4气体在800℃流动，硅晶体7选择性地生长在约仅在暴露在硅表面6的区域上。然后，晶体7部分地被从CW氩激光器发射的光部分地加热。

6. 发明专利

JPS53108373A MANUFACTURE FOR SEMICONDUCTOR DEVICE 失效
公开(公告)号：JPS53108373A
公开(公告)日：1978-09-21
申请号：JP2268977
申请日：1977-03-04
申请人： HITACHI LTD
发明人： KISHINO SEIGOU , ISOMAE SEIICHI , TAMURA MASAO , AOKI SHIGERU , KAWAMURA MASAO , MAKI MICHIYOSHI
IPC分类号： H01L21/322 , H01L21/316 , H01L21/324
摘要： PURPOSE:To restrict the deficiency in lamination taken place on the surface of wafer, by heating-treating under nitrogen atmosphere or inactive gas atmosphere at less than 1100 deg.C immediately before the thermal oxidation process of semiconductor wafer.

7. 发明专利

JPS52133753A CRYSTAL EVALUCATION METHOD 失效
公开(公告)号：JPS52133753A
公开(公告)日：1977-11-09
申请号：JP4995376
申请日：1976-05-04
申请人： HITACHI LTD
发明人： KISHINO SEIGOU , AOKI SHIGERU , ISOMAE SEIICHI , MAKI MICHIYOSHI
IPC分类号： G01N23/207 , G01N23/20 , H01L21/66
摘要： PURPOSE:To determine the goodness or badness of crystal by diffracting X-rays of 2.7 thru 6.5Angstrom with a thin film crystal of 1mu or under and a single crystal wafer of about 350mu, and measuring the diffraction intensity, waveform, etc. of their images.

8. 发明专利

JP2007150129A Semiconductor chip having island-shaped scattering structure and manufacturing method therefor 有权
标题翻译：具有岛屿形状散射结构的半导体芯片及其制造方法
公开(公告)号：JP2007150129A
公开(公告)日：2007-06-14
申请号：JP2005345056
申请日：2005-11-30
申请人： Elpida Memory Inc , Hitachi Ltd , エルピーダメモリ株式会社 , 株式会社日立製作所
发明人： OYU SHIZUNORI , AOKI SHIGERU
IPC分类号： H01L21/02
CPC分类号： H01L23/562 , H01L21/306 , H01L21/30604 , H01L21/3065 , H01L21/308 , H01L21/78 , H01L23/26 , H01L23/3128 , H01L29/0657 , H01L2924/0002 , H01L2924/00
摘要： PROBLEM TO BE SOLVED: To provide a highly reliable semiconductor chip that scarcely gets damaged. SOLUTION: The semiconductor chip includes a semiconductor silicon substrate having a semiconductor element layer and porous silicon domain layer, wherein the silicon element layer is prepared on a front principal surface region which is one surface of the semiconductor silicon substrate, while the porous silicon domain layer is prepared on a back principal surface which is the other surface of the semiconductor silicon substrate, and the porous silicon domains in the porous silicon domain layer are scattered in an island shape on the back surface of the semiconductor silicon substrate. COPYRIGHT: (C)2007,JPO&INPIT
摘要翻译：要解决的问题：提供几乎不会损坏的高度可靠的半导体芯片。解决方案：半导体芯片包括具有半导体元件层和多孔硅畴层的半导体硅衬底，其中硅元素层制备在作为半导体硅衬底的一个表面的前主表面区域上，而多孔在作为半导体硅衬底的另一个表面的背面主表面上制备硅域层，并且多孔硅畴层中的多孔硅区域以岛状分散在半导体硅衬底的背面上。版权所有（C）2007，JPO＆INPIT

9. 发明专利

JPH07280713A MANUFACTURE OF PLANE TEM OBSERVATION SAMPLE 失效
公开(公告)号：JPH07280713A
公开(公告)日：1995-10-27
申请号：JP7038094
申请日：1994-04-08
申请人： HITACHI LTD
发明人： AOKI SHIGERU , YAMANAKA TOSHIAKI , IKEDA SHUJI
IPC分类号： G01N1/28
摘要： PURPOSE:To correctly extract an observation object, formed on a semiconductor substrate as a thin film pattern of uneven shape with height difference, without causing deformation and rupture. CONSTITUTION:The surface of a transfer film 5 is dissolved and pressed to a substrate 2 with an observation object 1 exposed, and separated so as to transfer the observation object 1 to the surface area of the transfer film 5 from the substrate 2. The observation object transfer face is pressed to the fused face of non-polar material such as paraffin wax with a fusing point lower than the boiling point of a polar solvent so as to form a pressure buffer layer 6. A sample with the pressure buffer layer 6 formed is submerged in the polar solvent, and the transfer film 5 is dissolved and removed at the liquid temperature lower than the fusing point of the non-polar material. The liquid temperature is then raised to the fusing point of the non-polar material or higher to fuse and remove the pressure buffer layer 6. Prior to the formation of the pressure buffer layer 6, the desired area of the observation object transfer face may be covered to form a reinforcing film formed of amorphous material such as carbon.

10. 发明专利

JPS61131616A Semiconductor switch 失效
标题翻译：半导体开关
公开(公告)号：JPS61131616A
公开(公告)日：1986-06-19
申请号：JP25270384
申请日：1984-11-29
申请人： Hitachi Eng Co Ltd , Hitachi Ltd
发明人： OKUTSU MITSUHIKO , SHIMURA TATSUO , KARIYA TADAAKI , OKUBO SAKATOSHI , KAWAMOTO KOJI , AOKI SHIGERU
IPC分类号： H03K17/567 , H03K17/12 , H03K17/56 , H03K17/60 , H03K17/687 , H03K17/72 , H03K17/725
摘要： PURPOSE: To prevent distortion of an AC signal gate by connecting a bipolar transistor (TR) and an MOSFET in parallel and passing a minute signal through the MOSFET.
CONSTITUTION: When a voltage at a terminal 1 starts rising, while a signal turning on a semiconductor switch is applied between terminals 3 and 4, a current flows to MOSFETs M12, 22 at first, and when the current reaches a point A, the MOSFETs M12, 22 are clamped by the diode characteristic between the source and substrate. A collector-emitter voltage of bipolar TRs B1, B2 reaches a voltage flowing an on-base current and the TRs B1, B2 are turned on. The characteristic after a point A depends on the bipolar TRs because the current drive capacity of the bipolar TRs is large. Thus, the current flows via the MOSFETs even when the voltage between terminal 1 and 2 is nearly zero thereby preventing distortion.
COPYRIGHT: (C)1986,JPO&Japio
摘要翻译：目的：通过并联连接双极晶体管（TR）和MOSFET并通过MOSFET传递微小信号来防止交流信号门的失真。构成：当端子1处的电压开始上升时，当在端子3和4之间施加半导体开关导通的信号时，电流首先流向MOSFET M12,22，并且当电流达到点A时，MOSFET M12,22被源极和衬底之间的二极管特性钳位。双极性TR B1，B2的集电极 - 发射极电压达到流过基极电流的电压，并且TR B1，B2导通。点A之后的特性取决于双极性TR，因为双极性TR的电流驱动能力很大。因此，即使端子1和端子2之间的电压几乎为零，电流也流经MOSFET，从而防止失真。

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