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1. 发明专利

JP2009058690A Storage location extracting apparatus and storage location extracting method 有权
标题翻译：存储位置提取装置和存储位置提取方法
公开(公告)号：JP2009058690A
公开(公告)日：2009-03-19
申请号：JP2007224881
申请日：2007-08-30
申请人： Fujitsu Ltd , 富士通株式会社
发明人： SHIMOYAMA TAKESHI , MIHATA AKIHIRO , SHIODA KAZUNARI , KUGIMIYA JUNICHI
IPC分类号： G09C1/00 , H04L9/10
摘要： PROBLEM TO BE SOLVED: To parallelize processes necessary for common portion extraction, and to speed up processing so as to enhance efficiency in entire processing.
SOLUTION: A common address extracting apparatus 10 performs a log addition processing of first round sieve processing to each byte and, for the value of each byte after the first round of log addition processing is completed, turns ON the parity bit attached to the address of the byte satisfying the condition. Then, the common address extracting apparatus 10 performs a log addition processing of second round sieve processing to each byte maintaining the state of holding the value of the parity bit. For each value held by the byte after the second round of sieve processing is completed, the common address extracting apparatus 10 turns OFF the parity bit attached to the address of the byte not satisfying the condition. After that, the common address extracting apparatus 10 extracts the address of the byte whose value of corresponding parity bit is 1 as the common portion of the memory address satisfying the condition.
COPYRIGHT: (C)2009,JPO&INPIT
摘要翻译：要解决的问题：并行化公共部分提取所需的处理，并且加速处理，以提高整个处理的效率。解决方案：公共地址提取装置10对每个字节执行第一圆筛处理的对数添加处理，并且对于在第一轮对数相加处理完成之后的每个字节的值，将附加到满足条件的字节的地址。然后，公共地址提取装置10对维持保持奇偶校验位的值的状态的每个字节执行第二圆筛处理的对数加法处理。对于在第二轮筛选处理结束后由字节保持的每个值，公共地址提取装置10关闭附加到不满足条件的字节的地址的奇偶校验位。之后，公共地址提取装置10将满足该条件的存储器地址的公共部分的对应奇偶校验位的值的字节的地址提取为1。版权所有（C）2009，JPO＆INPIT

2. 发明专利

JP2010220100A Phase synchronization device and digital coherent light receiver 有权
标题翻译：相位同步装置和数字相干光接收器
公开(公告)号：JP2010220100A
公开(公告)日：2010-09-30
申请号：JP2009066914
申请日：2009-03-18
申请人： Fujitsu Ltd , 富士通株式会社
发明人： SUGITANI JUICHI , SHIODA KAZUNARI , ISHII YUJI , NAKAJIMA HISAO
IPC分类号： H04B10/2507 , H04B10/61
CPC分类号： H04B10/61
摘要： PROBLEM TO BE SOLVED: To make an amount of delay invariable while making variable an averaged number of data to be acquired from a shift register. SOLUTION: A phase synchronization device acquires processing data of averaged number of data (17) from the central position (reference time: 9t) in the shift register toward the opposite ends out of (17) pieces of continuous processing data which are inputted to the shift register permitting the averaged number of data (17), carries out sigma operation on the (17) pieces of processing data thus acquired, and then outputs the operation results. COPYRIGHT: (C)2010,JPO&INPIT
摘要翻译：要解决的问题：使得一定量的延迟不变，同时使从移位寄存器获取的数据的平均数量变化。解决方案：相位同步装置从（17）个连续处理数据（17）中获取从移位寄存器中的中心位置（参考时间：9t）到相对端的平均数据数（17）的处理数据，输入到允许平均数据数（17）的移位寄存器，对这样获取的（17）个处理数据执行西格玛操作，然后输出操作结果。版权所有（C）2010，JPO＆INPIT

3. 发明专利

JP2010178222A Distortion compensation apparatus, light receiving apparatus, and light transmitting/receiving system 有权
标题翻译：失灵补偿装置，光接收装置和发光/接收系统
公开(公告)号：JP2010178222A
公开(公告)日：2010-08-12
申请号：JP2009020844
申请日：2009-01-30
申请人： Fujitsu Ltd , 富士通株式会社
发明人： TANIMURA TAKAHITO , HOSHIDA GOJI , NAKAJIMA HISAO , SHIODA KAZUNARI , SUGITANI JUICHI
IPC分类号： H03F1/32 , H03H17/06 , H03H21/00 , H04B10/07 , H04B10/2507 , H04B10/2513
CPC分类号： H04B10/6971 , H04B10/25133 , H04B10/616 , H04B10/6161 , H04B2210/252
摘要： PROBLEM TO BE SOLVED: To reduce a scale of a hardware of a distortion compensation apparatus.
SOLUTION: The distortion compensation apparatus 1, which compensates the waveform distortion of a received light signal by digital signal processing, compensates the waveform distortion by the fixed amount of compensation, has a plurality of fixed amount compensation units 2-1 to 2-N, 3-1 to 3-N whose combination of compensation operations can be changed by ON/OFF change, and the plurality of fixed amount compensation units 2-1 to 2-N, 3-1 to 3-N are connected in cascade.
COPYRIGHT: (C)2010,JPO&INPIT
摘要翻译：要解决的问题：减少失真补偿装置的硬件的规模。解决方案：通过数字信号处理补偿接收光信号的波形失真的失真补偿装置1通过固定补偿量补偿波形失真，具有多个固定量补偿单元2-1至2 -N，3-1至3-N，其补偿操作的组合可以通过ON / OFF改变而改变，并且多个固定量补偿单元2-1至2-N，3-1至3-N连接在级联。版权所有（C）2010，JPO＆INPIT

4. 发明专利

JP2006261804A Network monitoring device and network monitoring method 有权
标题翻译：网络监控设备和网络监控方法
公开(公告)号：JP2006261804A
公开(公告)日：2006-09-28
申请号：JP2005073475
申请日：2005-03-15
申请人： Fujitsu Ltd , 富士通株式会社
发明人： TAMURA NOBUYUKI , GOTOU TOMONORI , SHIODA KAZUNARI , SUGITANI JUICHI , KOMATSU RYUTA
IPC分类号： H04L12/70 , G06F13/00 , H04L29/14
CPC分类号： H04L43/0811 , H04L41/046 , H04L43/0823 , H04L43/16
摘要： PROBLEM TO BE SOLVED: To provide a network monitoring device and a network monitoring method capable of early discovering the trouble of a network without being subject to effects of differences of specifications of a plurality of communication devices for a vendor in the network composed of the communication devices. SOLUTION: Since the devices 1,000a to 1,000e each monitoring the network are fitted between routers, and the devices are constituted so as to monitor the network in an autonomous manner, the network can be monitored even in the network composed of the communication devices having the different specifications. Since the device for monitoring the network is constituted so that a network manager 500 is informed when the trouble is detected, a countermeasure to the trouble can be taken early. COPYRIGHT: (C)2006,JPO&NCIPI
摘要翻译：要解决的问题：提供一种网络监视装置和网络监视方法，其能够早日发现网络的故障，而不会受到组播的网络中供应商的多个通信设备的规格差的影响的通信设备。解决方案：由于每个监控的设备1,000a到1,000e都安装在路由器之间，并且这些设备被构造成以自主的方式监视网络，所以即使在由具有不同规格的通信设备。由于用于监视网络的设备构成为使得当检测到故障时通知网络管理器500，所以可以提前对故障的对策。版权所有（C）2006，JPO＆NCIPI

5. 发明专利

JP2005080037A Overhead transparent transmission method and device 审中-公开
标题翻译：超透明传输方法和设备
公开(公告)号：JP2005080037A
公开(公告)日：2005-03-24
申请号：JP2003309543
申请日：2003-09-02
申请人： Fujitsu Ltd , 富士通株式会社
发明人： MATSUNAGA KOJI , SHIODA KAZUNARI , TAKADA ISAO , MIYAKE MASATO , SATO MASAKI
IPC分类号： H04J3/00 , H04L12/66 , H04L12/70 , H04L12/56
摘要： PROBLEM TO BE SOLVED: To enable a high-speed transmission between branch line networks by transparently transmitting the information byte of the overhead of the SDH of a branch line used for an operation and a maintenance on a backbone network in the transmission device of a backbone (2.4 Gbps) network connected to a plurality of branch line (150 Mbps) networks. SOLUTION: Backbone SDH transmission devices 1-1 and 1-4 collectively terminate the information byte of an SDH overhead arriving from transmission lines of a backbone network and a branch line network. When the mutual entry of the SDH overhead is performed between the branch line system and the backbone system, the unused byte region (e.g. Z byte or the like) of the SDH overhead of the backbone system is utilized, and the byte of the overhead of the branch line system is mapped into the unused byte region of the SDH overhead of the backbone system to perform a transparent transmission. COPYRIGHT: (C)2005,JPO&NCIPI
摘要翻译：要解决的问题：通过透明地传输用于操作的分支线的SDH的开销的信息字节和在发送设备中的骨干网上的维护，来实现分支线路网络之间的高速传输连接到多个分支线路（150Mbps）网络的骨干网（2.4Gbps）网络。解决方案：骨干SDH传输设备1-1和1-4共同终止从骨干网络和分支线路网络的传输线路到达的SDH开销的信息字节。当在分支线路系统和主干系统之间进行SDH开销的相互入口时，主干系统的SDH开销的未使用字节区域（例如Z字节等）被利用，并且开销的字节分支线路系统被映射到骨干系统的SDH开销的未使用字节区域，以执行透明传输。版权所有（C）2005，JPO＆NCIPI

6. 发明专利

JP2014093606A Digital coherent receiver 有权
标题翻译：数字相干接收机
公开(公告)号：JP2014093606A
公开(公告)日：2014-05-19
申请号：JP2012242097
申请日：2012-11-01
申请人： Fujitsu Ltd , 富士通株式会社
发明人： SUGITANI JUICHI , SHIODA KAZUNARI , KATAYAMA HIDESATO , TANIMURA TAKAHITO
IPC分类号： H04B10/63 , H04B10/556
CPC分类号： H04B10/614 , H04B10/616
摘要： PROBLEM TO BE SOLVED: To provide an optical digital coherent receiver capable of expediting the start of processing in a subsequent stage after a polarized wave separation circuit.SOLUTION: A modulation technique used on the transmitting side is assumed to be known on the receiving side. When a modulation technique is determined, the number of peaks which appear and the percentage which a peak height occupies in a total number of symbols in a signal amplitude distribution when a polarized wave separation process is converged on the receiving side are known from the position of a signal point in a constellation. On the basis of this, a threshold for determining a signal amplitude distribution is decided, and determination is made of whether the number of peaks determined using the threshold from the signal amplitude distribution after polarized wave separation matches that of an established modulation technique; when found to match, the polarized wave separation process is assumed to have converged, upon which a processing start trigger is applied to digital signal processing in a subsequent stage after the polarized wave separation process.
摘要翻译：要解决的问题：提供一种能够在极化波分离电路之后的后续阶段加速开始处理的光学数字相干接收机。解决方案：假设在发送侧使用的调制技术在接收侧是已知的。当确定调制技术时，从极化波分离处理收敛在接收侧的信号幅度分布中，出现峰值的数量和峰值高度占据信号幅度分布的总符号数的百分比是从星座中的信号点。基于此，确定用于确定信号幅度分布的阈值，并且确定在偏振波分离之后的信号幅度分布中使用阈值确定的峰值数是否与所建立的调制技术的峰值匹配; 当发现匹配时，假设极化波分离处理已经收敛，在该偏振波分离处理之后的后续阶段中，将处理开始触发应用于数字信号处理。

7. 发明专利

JP2014050056A Signal processing device and signal processing method 审中-公开
标题翻译：信号处理装置和信号处理方法
公开(公告)号：JP2014050056A
公开(公告)日：2014-03-17
申请号：JP2012193614
申请日：2012-09-03
申请人： Fujitsu Ltd , 富士通株式会社
发明人： SUGITANI JUICHI , KATAYAMA HIDESATO , SHIODA KAZUNARI , NAKAJIMA HISAO , HOSHIDA GOJI
IPC分类号： H04B10/61 , H04B3/04 , H04J14/00 , H04J14/04 , H04J14/06
CPC分类号： H04B10/616 , H04L25/03038 , H04L25/14 , H04L27/223 , H04L2025/0342 , H04L2025/03477 , H04L2025/03687
摘要： PROBLEM TO BE SOLVED: To restrain degradation in output characteristic when only a fewer number of update control circuits than arithmetic execution circuits can be installed.SOLUTION: A signal processing circuit has P adaptive equalization filters, N individual arithmetic determination units, and an update unit. The adaptive equalization filters execute a first arithmetic process on respective input signals and output an output signal. The individual arithmetic determination units determine, for each arithmetic execution unit, a second arithmetic process necessary to reduce a difference between the value of an output signal derived by the first arithmetic process and a target value for the output signal. The update unit determines a third arithmetic process on the basis of the second arithmetic process for each arithmetic execution unit determined by the individual arithmetic determination units, and updates the arithmetic process of each arithmetic execution unit to the third arithmetic process. Each of the K arithmetic execution units has their second arithmetic process determined by either one of the N individual arithmetic determination units, and each of the N individual arithmetic determination units sequentially determines a second arithmetic process corresponding to each of the arithmetic execution units in a time division manner.
摘要翻译：要解决的问题：为了抑制只有较少数量的更新控制电路而不是算术执行电路，输出特性的降低。解决方案：信号处理电路具有P个自适应均衡滤波器，N个个别算术确定单元和更新单元。自适应均衡滤波器对各个输入信号执行第一运算处理并输出输出信号。各个算术确定单元为每个算术执行单元确定减少由第一运算处理导出的输出信号的值与输出信号的目标值之间的差异所必需的第二运算处理。更新单元基于由各个算术确定单元确定的每个算术执行单元的第二算术处理来确定第三算术处理，并且将每个算术执行单元的算术处理更新为第三算术处理。每个K个算术执行单元具有由N个个别算术确定单元中的任一个确定的第二算术处理，并且N个个体算术确定单元中的每一个依次确定与一个算术执行单元中的每一个对应的第二算术处理分割方式。

8. 发明专利

JP2001326664A RING CONFIGURATION METHOD AND ITS NODE UNIT 失效
公开(公告)号：JP2001326664A
公开(公告)日：2001-11-22
申请号：JP2000225728
申请日：2000-07-26
申请人： FUJITSU LTD
发明人： UEMATSU KUMIKO , KANZAWA HIROSHI , HONDA TAKASHI , MORIYAMA JUNICHI , SHIODA KAZUNARI , KAWAMURA HIDETOSHI , TAKADA ISAO , YOSHIHARA YUKIE , NAITO KANJI
IPC分类号： H04L12/24 , H04L12/42 , H04L12/43 , H04L12/437
摘要： PROBLEM TO BE SOLVED: To provide a ring configuration method that can configure a topology required for BLSR in an open ring and conduct switching by a BLSR switching protocol in the open ring, and to provide its node unit. SOLUTION: In the ring configuration method, where topology data are circulated to each of nodes in a network of a ring configuration in which the nodes are linearly connected to collect connection information of each of the nodes being components of the ring, thereby configuring the topology of the ring, a flag to instruct presence/absence of collection of the connection information in each node is provided to the topology data, terminal stations at both end nodes of the open ring invert the flag and loop back the topology data. The nodes, which not are the end stations, pass the data without modifying the flag and each node adds connection information to the topology data according to the flag to configure the topology. Thus, the topology required for the BLSR can automatically be configured in the open ring, and a squelch table can be configured on the basis of the configuration topology.

9. 发明专利

JP2015091068A 光受信器および光受信方法审中-公开
公开(公告)号：JP2015091068A
公开(公告)日：2015-05-11
申请号：JP2013230726
申请日：2013-11-06
申请人： FUJITSU LTD
发明人： SUGITANI JUICHI , SHIODA KAZUNARI , KATAYAMA HIDESATO
IPC分类号： H04B10/2507 , H04B3/04 , H04B10/61
摘要：【課題】適応等化のフィルタ係数の正誤を迅速に検出できること。【解決手段】光受信器の受信部は、偏波多重された受信信号を偏波分離後にデジタル信号処理する信号処理部106を有する。信号処理部106は、フィルタ係数の制御で偏波分離後の受信信号を補償する適応等化回路202と、適応等化回路202の前段の受信信号が分岐入力され、偏波別の周波数オフセットを推定する第1の周波数オフセット推定回路210と、適応等化回路202の後段の受信信号が分岐入力され、偏波別の周波数オフセットを推定する第2の周波数オフセット推定回路211と、第1の周波数オフセット推定回路210と第2の周波数オフセット推定回路211が推定した周波数オフセットの推定値を比較して得た推定値の差分によりフィルタ係数の正誤を判定する判定回路212とを有する。判定回路212は誤りとの判定時は適応等化回路202にフィルタ係数の再計算のトリガを出力する。【選択図】図2

10. 发明专利

JP2000269910A TRANSMITTER AND METHOD FOR TERMINATING DATA 失效
公开(公告)号：JP2000269910A
公开(公告)日：2000-09-29
申请号：JP6900099
申请日：1999-03-15
申请人： FUJITSU LTD
发明人： KAWAMURA HIDETOSHI , MIYAHARA SEIJI , SHIODA KAZUNARI , TAKADA ISAO , OKA AKIHIKO
IPC分类号： H04J3/00
摘要： PROBLEM TO BE SOLVED: To obtain a backbone transmitter with a large capacity and containing a plurality of channels. SOLUTION: The backbone transmitter of a large capacity consists of line interface sections 321-32n that interface communication channels, a main signal processing section 54 that branches, inserts, exchanges signals and an overhead data termination section 34 that applies termination processing to an overhead of a received signal. The overhead data termination section 34 consists of an OH-ASIC 51 which is a serial link interface section and a CPU 52 which controls the OH-ASIC 51. Serial links, consisting of serial data lines each having a plurality of layers and clock lines, are placed between the line interface sections 321-32n and the overhead data terminating section 34.

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