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1. 发明专利

JP2006261804A Network monitoring device and network monitoring method 有权
标题翻译：网络监控设备和网络监控方法
公开(公告)号：JP2006261804A
公开(公告)日：2006-09-28
申请号：JP2005073475
申请日：2005-03-15
申请人： Fujitsu Ltd , 富士通株式会社
发明人： TAMURA NOBUYUKI , GOTOU TOMONORI , SHIODA KAZUNARI , SUGITANI JUICHI , KOMATSU RYUTA
IPC分类号： H04L12/70 , G06F13/00 , H04L29/14
CPC分类号： H04L43/0811 , H04L41/046 , H04L43/0823 , H04L43/16
摘要： PROBLEM TO BE SOLVED: To provide a network monitoring device and a network monitoring method capable of early discovering the trouble of a network without being subject to effects of differences of specifications of a plurality of communication devices for a vendor in the network composed of the communication devices. SOLUTION: Since the devices 1,000a to 1,000e each monitoring the network are fitted between routers, and the devices are constituted so as to monitor the network in an autonomous manner, the network can be monitored even in the network composed of the communication devices having the different specifications. Since the device for monitoring the network is constituted so that a network manager 500 is informed when the trouble is detected, a countermeasure to the trouble can be taken early. COPYRIGHT: (C)2006,JPO&NCIPI
摘要翻译：要解决的问题：提供一种网络监视装置和网络监视方法，其能够早日发现网络的故障，而不会受到组播的网络中供应商的多个通信设备的规格差的影响的通信设备。解决方案：由于每个监控的设备1,000a到1,000e都安装在路由器之间，并且这些设备被构造成以自主的方式监视网络，所以即使在由具有不同规格的通信设备。由于用于监视网络的设备构成为使得当检测到故障时通知网络管理器500，所以可以提前对故障的对策。版权所有（C）2006，JPO＆NCIPI

2. 发明专利

JP2003199130A OPTICAL PATH CROSS CONNECT APPARATUS AND SWITCHING METHOD THEREOF 审中-公开
公开(公告)号：JP2003199130A
公开(公告)日：2003-07-11
申请号：JP2001396247
申请日：2001-12-27
申请人： FUJITSU LTD
发明人： SUGITANI JUICHI , KUROYANAGI TOMOJI
IPC分类号： H04B10/03 , H04B10/032 , H04B10/079 , H04B10/27 , H04B10/29 , H04J3/00 , H04Q3/52 , H04Q11/00 , H04B10/02
摘要： PROBLEM TO BE SOLVED: To provide an optical path cross connect apparatus for eliminating the need for insertion of an optical amplifier, preventing the cost and the apparatus scale from being increased, and ensuring the normal operation of an optical switch in a standby system even on the occurrence of a fault and to provided a switching method for the optical path cross connect apparatus, in which in-service upgrading can be carried out. SOLUTION: The optical path cross connect apparatus includes a plurality of 1×2 optical switch means 20 11 to 20 kn for distributing an input optical signal at a ratio of 1:p (1 COPYRIGHT: (C)2003,JPO

3. 发明专利

JP2015091068A 光受信器および光受信方法审中-公开
公开(公告)号：JP2015091068A
公开(公告)日：2015-05-11
申请号：JP2013230726
申请日：2013-11-06
申请人： FUJITSU LTD
发明人： SUGITANI JUICHI , SHIODA KAZUNARI , KATAYAMA HIDESATO
IPC分类号： H04B10/2507 , H04B3/04 , H04B10/61
摘要：【課題】適応等化のフィルタ係数の正誤を迅速に検出できること。【解決手段】光受信器の受信部は、偏波多重された受信信号を偏波分離後にデジタル信号処理する信号処理部106を有する。信号処理部106は、フィルタ係数の制御で偏波分離後の受信信号を補償する適応等化回路202と、適応等化回路202の前段の受信信号が分岐入力され、偏波別の周波数オフセットを推定する第1の周波数オフセット推定回路210と、適応等化回路202の後段の受信信号が分岐入力され、偏波別の周波数オフセットを推定する第2の周波数オフセット推定回路211と、第1の周波数オフセット推定回路210と第2の周波数オフセット推定回路211が推定した周波数オフセットの推定値を比較して得た推定値の差分によりフィルタ係数の正誤を判定する判定回路212とを有する。判定回路212は誤りとの判定時は適応等化回路202にフィルタ係数の再計算のトリガを出力する。【選択図】図2

4. 发明专利

JP2014093606A Digital coherent receiver 有权
标题翻译：数字相干接收机
公开(公告)号：JP2014093606A
公开(公告)日：2014-05-19
申请号：JP2012242097
申请日：2012-11-01
申请人： Fujitsu Ltd , 富士通株式会社
发明人： SUGITANI JUICHI , SHIODA KAZUNARI , KATAYAMA HIDESATO , TANIMURA TAKAHITO
IPC分类号： H04B10/63 , H04B10/556
CPC分类号： H04B10/614 , H04B10/616
摘要： PROBLEM TO BE SOLVED: To provide an optical digital coherent receiver capable of expediting the start of processing in a subsequent stage after a polarized wave separation circuit.SOLUTION: A modulation technique used on the transmitting side is assumed to be known on the receiving side. When a modulation technique is determined, the number of peaks which appear and the percentage which a peak height occupies in a total number of symbols in a signal amplitude distribution when a polarized wave separation process is converged on the receiving side are known from the position of a signal point in a constellation. On the basis of this, a threshold for determining a signal amplitude distribution is decided, and determination is made of whether the number of peaks determined using the threshold from the signal amplitude distribution after polarized wave separation matches that of an established modulation technique; when found to match, the polarized wave separation process is assumed to have converged, upon which a processing start trigger is applied to digital signal processing in a subsequent stage after the polarized wave separation process.
摘要翻译：要解决的问题：提供一种能够在极化波分离电路之后的后续阶段加速开始处理的光学数字相干接收机。解决方案：假设在发送侧使用的调制技术在接收侧是已知的。当确定调制技术时，从极化波分离处理收敛在接收侧的信号幅度分布中，出现峰值的数量和峰值高度占据信号幅度分布的总符号数的百分比是从星座中的信号点。基于此，确定用于确定信号幅度分布的阈值，并且确定在偏振波分离之后的信号幅度分布中使用阈值确定的峰值数是否与所建立的调制技术的峰值匹配; 当发现匹配时，假设极化波分离处理已经收敛，在该偏振波分离处理之后的后续阶段中，将处理开始触发应用于数字信号处理。

5. 发明专利

JP2014050056A Signal processing device and signal processing method 审中-公开
标题翻译：信号处理装置和信号处理方法
公开(公告)号：JP2014050056A
公开(公告)日：2014-03-17
申请号：JP2012193614
申请日：2012-09-03
申请人： Fujitsu Ltd , 富士通株式会社
发明人： SUGITANI JUICHI , KATAYAMA HIDESATO , SHIODA KAZUNARI , NAKAJIMA HISAO , HOSHIDA GOJI
IPC分类号： H04B10/61 , H04B3/04 , H04J14/00 , H04J14/04 , H04J14/06
CPC分类号： H04B10/616 , H04L25/03038 , H04L25/14 , H04L27/223 , H04L2025/0342 , H04L2025/03477 , H04L2025/03687
摘要： PROBLEM TO BE SOLVED: To restrain degradation in output characteristic when only a fewer number of update control circuits than arithmetic execution circuits can be installed.SOLUTION: A signal processing circuit has P adaptive equalization filters, N individual arithmetic determination units, and an update unit. The adaptive equalization filters execute a first arithmetic process on respective input signals and output an output signal. The individual arithmetic determination units determine, for each arithmetic execution unit, a second arithmetic process necessary to reduce a difference between the value of an output signal derived by the first arithmetic process and a target value for the output signal. The update unit determines a third arithmetic process on the basis of the second arithmetic process for each arithmetic execution unit determined by the individual arithmetic determination units, and updates the arithmetic process of each arithmetic execution unit to the third arithmetic process. Each of the K arithmetic execution units has their second arithmetic process determined by either one of the N individual arithmetic determination units, and each of the N individual arithmetic determination units sequentially determines a second arithmetic process corresponding to each of the arithmetic execution units in a time division manner.
摘要翻译：要解决的问题：为了抑制只有较少数量的更新控制电路而不是算术执行电路，输出特性的降低。解决方案：信号处理电路具有P个自适应均衡滤波器，N个个别算术确定单元和更新单元。自适应均衡滤波器对各个输入信号执行第一运算处理并输出输出信号。各个算术确定单元为每个算术执行单元确定减少由第一运算处理导出的输出信号的值与输出信号的目标值之间的差异所必需的第二运算处理。更新单元基于由各个算术确定单元确定的每个算术执行单元的第二算术处理来确定第三算术处理，并且将每个算术执行单元的算术处理更新为第三算术处理。每个K个算术执行单元具有由N个个别算术确定单元中的任一个确定的第二算术处理，并且N个个体算术确定单元中的每一个依次确定与一个算术执行单元中的每一个对应的第二算术处理分割方式。

6. 发明专利

JP2005295209A Layer 2 loop detection system 有权
标题翻译：层2环路检测系统
公开(公告)号：JP2005295209A
公开(公告)日：2005-10-20
申请号：JP2004107481
申请日：2004-03-31
申请人： Fujitsu Ltd , 富士通株式会社
发明人： SUGITANI JUICHI , MUTO RYOICHI , NISHI TETSUYA
IPC分类号： H04L12/24 , H04L12/26 , H04L12/44
CPC分类号： H04L41/06 , H04L12/462 , H04L41/0213 , H04L41/046 , H04L41/12 , H04L43/10 , H04L45/00 , H04L45/18
摘要： PROBLEM TO BE SOLVED: To provide a method (technique) capable of detecting a loop by a manager and surely detecting a layer 2 loop by the SNMP (simple network management protocol) manager that monitors a layer 2 network having a plurality of layer 2 switches as a monitoring target. SOLUTION: An L2 loop detecting device is provided with a means for collecting MIB (manager information base) information including information about ports of the plurality of L2 switches from the L2 switches by SNMP communication and recognizing a topology when an L2 network is normal; a means for identifying a blocking port for traffic disconnection and a disable port in a port disabled state set in accordance with a spanning tree protocol STP on the basis of topology recognition processing; a means for setting the identified blocking port and disable port in monitoring points and periodically monitoring their states; and a means for recollecting a portion of the MIB information from the plurality of L2 switches by SNMP communication when either state of the blocking port or the disable port fluctuates as a trigger and rerecognizing the topology of the L2 network to detect the L2 loop. COPYRIGHT: (C)2006,JPO&NCIPI
摘要翻译：要解决的问题：提供一种能够由管理者检测循环并且通过SNMP（简单网络管理协议）管理器确定地检测第二层环路的方法（技术），该管理器监视具有多个第2层交换机作为监控目标。解决方案：L2环路检测装置设置有用于通过SNMP通信从L2交换机收集包括关于多个L2交换机的端口的信息的MIB（管理者信息库）信息的装置，并且当L2网络是正常; 基于拓扑识别处理，根据生成树协议STP设置用于识别用于流量断开的阻塞端口和在端口禁用状态中设置的禁用端口的装置; 在监控点设置识别的阻塞端口和禁用端口并定期监视其状态的一种方法; 以及当阻塞端口或禁用端口的任一状态作为触发波动并且重新识别L2网络的拓扑以检测L2环路时，通过SNMP通信从多个L2交换机中收集MIB信息的一部分的装置。版权所有（C）2006，JPO＆NCIPI

7. 发明专利

JP2010220100A Phase synchronization device and digital coherent light receiver 有权
标题翻译：相位同步装置和数字相干光接收器
公开(公告)号：JP2010220100A
公开(公告)日：2010-09-30
申请号：JP2009066914
申请日：2009-03-18
申请人： Fujitsu Ltd , 富士通株式会社
发明人： SUGITANI JUICHI , SHIODA KAZUNARI , ISHII YUJI , NAKAJIMA HISAO
IPC分类号： H04B10/2507 , H04B10/61
CPC分类号： H04B10/61
摘要： PROBLEM TO BE SOLVED: To make an amount of delay invariable while making variable an averaged number of data to be acquired from a shift register. SOLUTION: A phase synchronization device acquires processing data of averaged number of data (17) from the central position (reference time: 9t) in the shift register toward the opposite ends out of (17) pieces of continuous processing data which are inputted to the shift register permitting the averaged number of data (17), carries out sigma operation on the (17) pieces of processing data thus acquired, and then outputs the operation results. COPYRIGHT: (C)2010,JPO&INPIT
摘要翻译：要解决的问题：使得一定量的延迟不变，同时使从移位寄存器获取的数据的平均数量变化。解决方案：相位同步装置从（17）个连续处理数据（17）中获取从移位寄存器中的中心位置（参考时间：9t）到相对端的平均数据数（17）的处理数据，输入到允许平均数据数（17）的移位寄存器，对这样获取的（17）个处理数据执行西格玛操作，然后输出操作结果。版权所有（C）2010，JPO＆INPIT

8. 发明专利

JP2010178222A Distortion compensation apparatus, light receiving apparatus, and light transmitting/receiving system 有权
标题翻译：失灵补偿装置，光接收装置和发光/接收系统
公开(公告)号：JP2010178222A
公开(公告)日：2010-08-12
申请号：JP2009020844
申请日：2009-01-30
申请人： Fujitsu Ltd , 富士通株式会社
发明人： TANIMURA TAKAHITO , HOSHIDA GOJI , NAKAJIMA HISAO , SHIODA KAZUNARI , SUGITANI JUICHI
IPC分类号： H03F1/32 , H03H17/06 , H03H21/00 , H04B10/07 , H04B10/2507 , H04B10/2513
CPC分类号： H04B10/6971 , H04B10/25133 , H04B10/616 , H04B10/6161 , H04B2210/252
摘要： PROBLEM TO BE SOLVED: To reduce a scale of a hardware of a distortion compensation apparatus.
SOLUTION: The distortion compensation apparatus 1, which compensates the waveform distortion of a received light signal by digital signal processing, compensates the waveform distortion by the fixed amount of compensation, has a plurality of fixed amount compensation units 2-1 to 2-N, 3-1 to 3-N whose combination of compensation operations can be changed by ON/OFF change, and the plurality of fixed amount compensation units 2-1 to 2-N, 3-1 to 3-N are connected in cascade.
COPYRIGHT: (C)2010,JPO&INPIT

9. 发明专利

JP2006033275A Loop frame detector and loop frame detection method 审中-公开
标题翻译：环形框架检测器和环路框架检测方法
公开(公告)号：JP2006033275A
公开(公告)日：2006-02-02
申请号：JP2004207517
申请日：2004-07-14
申请人： Fujitsu Ltd , 富士通株式会社
发明人： MUTO RYOICHI , NISHI TETSUYA , SUGITANI JUICHI
IPC分类号： H04L12/28
CPC分类号： H04L45/00 , H04L12/462 , H04L43/00 , H04L45/18 , H04L45/48
摘要： PROBLEM TO BE SOLVED: To provide a loop frame detector and a loop frame detection method capable of detecting a loop frame on an L2 network and minimizing a loop fault.
SOLUTION: The loop frame detector includes a frame transmission / reception section 2 for transmitting / receiving a frame of the layer 2 network; and a loop detection section 3 for monitoring contents of data configuring the frame received by or transmitted from the frame transmission / reception section 2, so as to detect whether or not the frame is a loop frame, and minimizes a loop fault by detecting the loop frame looped on the layer 2 network.
COPYRIGHT: (C)2006,JPO&NCIPI

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