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1. 发明专利

JP2009218959A Synchronous multiplexed transmission apparatus, synchronous multiplex transmission method, and synchronous multiplexed transmission program 审中-公开
标题翻译：同步多路复用传输设备，同步多路复用传输方法和同步多路复用传输程序（SYNCHRONOUS MULTIPLEX TRANSMISSION PROGRATUS，SYNCHRONOUS MULTIPLEX TRANSMISSION
公开(公告)号：JP2009218959A
公开(公告)日：2009-09-24
申请号：JP2008061785
申请日：2008-03-11
申请人： Fujitsu Ltd , 富士通株式会社
发明人： KUGIMIYA JUNICHI , MIHATA AKIHIRO , ISHIKAWA KENICHI , MATSUMOTO TAKESHI
IPC分类号： H04J3/00
摘要： PROBLEM TO BE SOLVED: To decrease delay of data in a transmission path.
SOLUTION: FIFO111a, b temporarily retain terminal data a, b. Read-out control parts 112a and 112b read the terminal data out of the FIFO111a and 111b at such reading timing determined by a timing determination part 122. A multiplexed information storing part 121 stores in advance the multiplexed information that specifies temporal order and the like when multiplexing the terminal data a, b. The timing determination part 122 determines a reading timing based on an apparatus clock and multiplexed information. An ACM part 123 controls a selector part 124, so that any one of the terminal data a, b read out by the reading control parts 112a and 112b is caused to be output from the selector part 124. The selector part 124 arranges the terminal data a, b within a single frame while switching them, with the acquired multiplexed data being output.
COPYRIGHT: (C)2009,JPO&INPIT
摘要翻译：要解决的问题：减少传输路径中数据的延迟。
解决方案：FIFO111a，b暂时保留终端数据a，b。读取控制部分112a和112b在由定时确定部分122确定的读取定时从FIFO111a和111b读出终端数据。多路复用信息存储部分121预先存储指定时间顺序等的多路复用信息复用终端数据a，b。定时确定部分122基于装置时钟和复用信息确定读取定时。 ACM部分123控制选择器部分124，使得由读取控制部分112a和112b读出的终端数据a，b中的任何一个从选择器部分124输出。选择器部分124将终端数据 a，b在单个帧内切换时，所获取的多路复用数据被输出。版权所有（C）2009，JPO＆INPIT

2. 发明专利

JP2009246692A Multiplex transmission apparatus 有权
标题翻译：多路传输设备
公开(公告)号：JP2009246692A
公开(公告)日：2009-10-22
申请号：JP2008090944
申请日：2008-03-31
申请人： Fujitsu Ltd , 富士通株式会社
发明人： KUGIMIYA JUNICHI , SUGIYAMA SEIJI , ISHIKAWA KENICHI , MIHATA AKIHIRO
IPC分类号： H04J3/00
摘要： PROBLEM TO BE SOLVED: To provide a multiplex transmission apparatus for outputting data to a single transmission path while adjusting a phase of the data by frame input from each of a plurality of transmission paths, without including a FIFO.
SOLUTION: A multiplex transmission apparatus 100 includes: a storage unit 2 with three memories as buffers; a frame phase detection unit 3 for detecting a phase of each frame; a write control unit 4 for sequentially writing data of the frames in association with the memories in the storage unit 2 by counting a plurality of data constituting each of the frames in order from the start of the frames based on the phase of each frame detected by the frame phase detection unit 3 and setting a count value as a write address; a read control unit 5 for designating data of a predetermined read address from among the data written into a memory other than the memory being written in the storage unit 2 and reading the data of the designated address synchronously from a common memory in each storage unit 2; and a multiplexer 6 for multiplexing a plurality of data read out by the read control unit 5.
COPYRIGHT: (C)2010,JPO&INPIT
摘要翻译：要解决的问题：提供一种用于在不包括FIFO的情况下从多个传输路径中的每一个输入数据的相位调整到单个传输路径的同时输出数据的多路复用传输装置。解决方案：复用传输设备100包括：具有三个存储器作为缓冲器的存储单元2; 帧相位检测单元3，用于检测每帧的相位; 一个写入控制单元4，用于通过从基于帧的开始的顺序根据由帧的开始的每个帧的相位开始计数构成每个帧的多个数据，顺序地将与存储器相关联的帧的数据写入存储单元2中帧相位检测单元3，并将计数值设置为写入地址; 读取控制单元5，用于从写入存储单元2中的存储器以外的存储器中写入的数据中指定预定读取地址的数据，并从每个存储单元2中的公共存储器同步地读取指定地址的数据 ; 以及多路复用器6，用于复用由读取控制单元5读出的多个数据。版权所有：（C）2010，JPO＆INPIT

3. 发明专利

JP2009058690A Storage location extracting apparatus and storage location extracting method 有权
标题翻译：存储位置提取装置和存储位置提取方法
公开(公告)号：JP2009058690A
公开(公告)日：2009-03-19
申请号：JP2007224881
申请日：2007-08-30
申请人： Fujitsu Ltd , 富士通株式会社
发明人： SHIMOYAMA TAKESHI , MIHATA AKIHIRO , SHIODA KAZUNARI , KUGIMIYA JUNICHI
IPC分类号： G09C1/00 , H04L9/10
摘要： PROBLEM TO BE SOLVED: To parallelize processes necessary for common portion extraction, and to speed up processing so as to enhance efficiency in entire processing.
SOLUTION: A common address extracting apparatus 10 performs a log addition processing of first round sieve processing to each byte and, for the value of each byte after the first round of log addition processing is completed, turns ON the parity bit attached to the address of the byte satisfying the condition. Then, the common address extracting apparatus 10 performs a log addition processing of second round sieve processing to each byte maintaining the state of holding the value of the parity bit. For each value held by the byte after the second round of sieve processing is completed, the common address extracting apparatus 10 turns OFF the parity bit attached to the address of the byte not satisfying the condition. After that, the common address extracting apparatus 10 extracts the address of the byte whose value of corresponding parity bit is 1 as the common portion of the memory address satisfying the condition.
COPYRIGHT: (C)2009,JPO&INPIT
摘要翻译：要解决的问题：并行化公共部分提取所需的处理，并且加速处理，以提高整个处理的效率。解决方案：公共地址提取装置10对每个字节执行第一圆筛处理的对数添加处理，并且对于在第一轮对数相加处理完成之后的每个字节的值，将附加到满足条件的字节的地址。然后，公共地址提取装置10对维持保持奇偶校验位的值的状态的每个字节执行第二圆筛处理的对数加法处理。对于在第二轮筛选处理结束后由字节保持的每个值，公共地址提取装置10关闭附加到不满足条件的字节的地址的奇偶校验位。之后，公共地址提取装置10将满足该条件的存储器地址的公共部分的对应奇偶校验位的值的字节的地址提取为1。版权所有（C）2009，JPO＆INPIT

4. 发明专利

JP2005252333A Transmission control system using link aggregation 有权
标题翻译：使用链路聚合的传输控制系统
公开(公告)号：JP2005252333A
公开(公告)日：2005-09-15
申请号：JP2004055911
申请日：2004-03-01
申请人： Fujitsu Ltd , 富士通株式会社
发明人： DOI MASAHIRO , IMOTO KAZUYUKI , TAWARA TETSUYA , KUGIMIYA JUNICHI , TANAKA KAZUMICHI , OOTSURU HIROSHI
IPC分类号： H04L13/08 , H04L1/00 , H04L29/08
CPC分类号： H04L47/36 , H04L47/34
摘要： PROBLEM TO BE SOLVED: To efficiently utilize a band by preventing overflow of a port, without using a large-scale look-up table or a large-capacity transmission queue, in transmission which uses link aggregation. SOLUTION: The distributor 212 of a transmission device 201 unitizes a plurality variable length frames per predetermined size and allocates them to each of a plurality of ports per unit and transmits them. A receiver 202 accumulates received frames in each port, and a collector 227 collects frames per unit from each port. COPYRIGHT: (C)2005,JPO&NCIPI
摘要翻译：要解决的问题：在使用链路聚合的传输中，通过防止端口的溢出而不使用大型查找表或大容量传输队列来有效地利用频带。解决方案：传输设备201的分布器212将每个预定大小的多个可变长度帧相组合，并将其分配给每个单元的多个端口中的每个端口并发送它们。接收机202在每个端口中累积接收到的帧，并且收集器227从每个端口收集每单位的帧。版权所有（C）2005，JPO＆NCIPI

5. 发明专利

JP2005269779A Power supply system 有权
标题翻译：电源系统
公开(公告)号：JP2005269779A
公开(公告)日：2005-09-29
申请号：JP2004078260
申请日：2004-03-18
申请人： Fujitsu Ltd , 富士通株式会社
发明人： KUGIMIYA JUNICHI , IKEDA AKIFUMI , OOTSURU HIROSHI
IPC分类号： H02J1/00 , H04L29/00
摘要： PROBLEM TO BE SOLVED: To make common an Ether feed power supply part and a power supply part of a transmission device main part, related to a power supply system. SOLUTION: The power supply device is constituted by including: a power supply circuit 7 that feeds power to the backbone transmission device main part 15 from a power supply source 1; a total supply power calculation means 6 that calculates total supply power from the peripheral temperature of the power supply source 1, and also calculates supply power to the backbone transmission device main part from a voltage of the power supply source 1 and a current to the backbone transmission main part 15; an Ether feeding circuit 9 that receives feeding from the power supply source 1; an Ether feeding power calculation means 8 that calculates Ether feeding power from a value obtained by subtracting the supply power to the backbone transmission device power part 15 from the total supply power, and a voltage and a current of the Ether feeding circuit 9; a feeding switch 10 that turns on/off the Ether feeding circuit 9; and an Ether feeding control circuit 13 that on/off-controls the feeding switch 10 by receiving a control signal from the Ether feeding power calculation means 8. COPYRIGHT: (C)2005,JPO&NCIPI
摘要翻译：要解决的问题：与电源系统相关，使传统设备主要部分的以太供电电源部分和电源部分相通。解决方案：电源装置包括：电源电路7，其从电源1向主干传输装置主体部15供电; 总供电功率计算装置6，其从电源1的外围温度计算总供电功率，并且还根据电源1的电压和到主干的电流来计算到主干传输装置主要部分的供电变速箱主体15; 从电源1接收供电的以太网供电电路9; 以太网供电功率计算装置8，从总供电功率减去主干传输装置电源部分15的供电功率和以太供电电路9的电压和电流计算出以太网供电功率; 供给开关10，其接通/断开以太供给电路9; 以及通过从以太网供电功率计算装置8接收控制信号来对供电开关10进行开/关控制的以太网供电控制电路13.（C）2005，JPO＆NCIPI

6. 发明专利

JP2002026916A TRAFFIC CONTROLLER 失效
公开(公告)号：JP2002026916A
公开(公告)日：2002-01-25
申请号：JP2000208069
申请日：2000-07-10
申请人： FUJITSU LTD
发明人： KUGIMIYA JUNICHI , KAJIWARA TAKAHARU , KUSAYANAGI MICHIO
IPC分类号： H04L12/865 , H04Q11/04 , H04L12/28
摘要： PROBLEM TO BE SOLVED: To provide a traffic controller 100 that controls the transmission rate of data of channels and effectively utilizes transmission rates (band) of at least a transmission channel and a virtual path and to provide a simple variable priority encoder. SOLUTION: A transmission request counter 20 counts a transmission request signal 64 generated by a transmission request generating section 10 at a prescribed interval set to each channel, a priority decision section 30 decides the transmission priority of each channel by the round robin system or other system on the basis of the count of the transmission request counter 20 and transmits a highest priority channel designation signal (cell transmission channel number) 71 that designates the transmission of the highest priority channel and a signal 66 to decrement the transmission request counter 20 corresponding to the highest priority channel.

7. 发明专利

JPH02222205A AUTOMATIC GAIN CONTROLLER 失效
公开(公告)号：JPH02222205A
公开(公告)日：1990-09-05
申请号：JP4243189
申请日：1989-02-22
申请人： FUJITSU LTD
发明人： AWATA YUTAKA , KAWADA KINJI , TOKIWA KOJI , KUGIMIYA JUNICHI , MARUYAMA KAZUYOSHI
IPC分类号： H03G3/20 , H03G3/30
摘要： PURPOSE:To facilitate circuit integration by applying power operation of a signal so as to attain gain control thereby adjusting an output signal level to a desired level correctly automatically. CONSTITUTION:A gain setting section 3 sets the gain of an amplifier 1 so that an inputted power operation value PW is a power object. An output GC of the gain setting section 3 is a gain code setting the gain of the amplifier 1 and the gain of the amplifier 1 is set stepwise at a prescribed gain increment DELTAg[dB]. When the input to an A/D converter 2 is too large ro too small and the result of operation of power operation section 4 reaches the outside of the resulting accurate range, the gain setting section 3 resets the gain of the amplifier 1 forcibly that the result of power operation is an accurate result to apply the AGC normally. Thus, an output signal level is kept to a correct desired level in a line equalizer (sq. rt. fAGC equalizer).

8. 发明专利

JPH08254997A VOICE ENCODING AND DECODING METHOD 失效
公开(公告)号：JPH08254997A
公开(公告)日：1996-10-01
申请号：JP5770295
申请日：1995-03-16
申请人： FUJITSU LTD
发明人： KATAYAMA HIROSHI , KURIHARA HIDEAKI , KATO MASAKO , KUGIMIYA JUNICHI
IPC分类号： G10L11/02 , G10L19/04 , G10L19/08 , H03M7/30 , H04B14/04 , G10L9/14
摘要： PURPOSE: To give a hearer a natural background noise having no unnatural feeling at the time of a transmission interruption by making an apaptive code book not to be used in the encoding processing of the background noise and making periodicity not appear in a reproduced voice. CONSTITUTION: When an input voice is discriminated to be a silent in a presence/absence of voice discriminating part 30, a voice encoding device 100 transmits the post-amble signal being a signal notifying beforehand the transmission interruption from a voice information transmitting part 40 to a voice decoding device 200. Then, after the post-amble signal is transmitted, the adaptive sign code having one frame length is selected by using only a fixed sign note in a voice coding part 20. The selected adaptive sign code is transmitted to the voice decoding device 200 as a voice endcoding code. Then, since a voice in which periodicity hardly occurs is reproduced in the voice decoding device 200 receiving the post-amble signal, the background noise having no unnatural feeling is given to the hearer.

9. 发明专利

JPH03184437A TIMING REGENERATION CIRCUIT 失效
公开(公告)号：JPH03184437A
公开(公告)日：1991-08-12
申请号：JP32265389
申请日：1989-12-14
申请人： FUJITSU LTD
发明人： AWATA YUTAKA , OTA SHINJI , KUGIMIYA JUNICHI
IPC分类号： H04L7/00
摘要： PURPOSE:To accurately find a timing phase by smoothing an impulse response string receiving the influence of inter-code interference at a low-pass filter means. CONSTITUTION:An evaluation function arithmetic part 14 shifts the timing of sampling at a prescribed interval for one signal duration, and performs the calculation of respective sampling timing corresponding to an impulse response from the sample value fk and the digital identification value ak of a reception signal from past to the present within constant time, and stores the string of impulse response obtained at plural sampling timing. A filter arithmetic part 15 realizes the function of the low-pass filter means 6, and smoothes the above stated string of impulse response. A maximum value phase decision means 9 decides the sampling timing which supplies the maximum value of the smoothed string of impulse response as the optimum timing phase for the reception signal.

10. 发明专利

JPH02222206A LINE EQUALIZER 失效
公开(公告)号：JPH02222206A
公开(公告)日：1990-09-05
申请号：JP4243489
申请日：1989-02-22
申请人： FUJITSU LTD
发明人： KAWADA KINJI , AWATA YUTAKA , TOKIWA KOJI , KUGIMIYA JUNICHI , MARUYAMA KAZUYOSHI
IPC分类号： H03G3/30
摘要： PURPOSE:To avoid useless power operation time with respect to an input signal with an excess or deficient amplitude by discriminating the quantity of the input signal level from the amplitude and applying the processing in parallel with the power operation. CONSTITUTION:A comparator section 5 decided whether an amplitude of an input waveform is within a normal range larger than the minimum amplitude not including a quantizing error and smaller than a maximum amplitude not saturated from the output of an A/D converter 2 and informs the result to a gain control section 4. The gain control section 4 adjusts the gain of an equalizer 1 quantitatively immediately without awaiting the arrival of an output of a power calculation section 3 when the output of a comparator section 5 is at the outside of the normal range. Thus, no useless power operation with respect to an input of an excess or deficient amplitude is applied to set the gain of an eualizer.

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