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1. 发明专利

JPH1124591A ELEVATING/LOWERING TYPE DISPLAY TOWER 失效
公开(公告)号：JPH1124591A
公开(公告)日：1999-01-29
申请号：JP17954597
申请日：1997-07-04
申请人： FUJITSU LTD
发明人： WATANABE SHOZO , MORITA TOSHIYUKI , MORI HIROAKI
IPC分类号： G09F9/00
摘要： PROBLEM TO BE SOLVED: To enable race judges and spectators to see a race without being troubled by an obstacle during the race by providing an elevating/lowering mechanism elevating/ lowering a display part between a housing position at the inside of a housing hole where the display part is housed on a side lower than a specified installation position and the display position on the side upper than the installation position at the inside of the housing hole. SOLUTION: The housing hole 5 housing the display part 2 is made on the lower side of the specified installation position (the ground surface GL), and the elevating/ lowering mechanism 3 is provided at the inside of the housing hole 5. The display part 2 is elevated and lowered together with a rotating mechanism 4 between the housing position at the inside of the housing hole 5 and the display position on the side upper of the installation position GL. Then, when display is executed, the display part 2 is installed at the display position on the upper side than the specified installation position, and on the other hand when the display is not executed, the display part 2 is installed at the housing position at the inside of the housing hole 5. Thus, in the case of displaying the race result at the bicycle race track or the like, the race judge and the spectator can see the race without being troubled by the obstacle during the race.

2. 发明专利

JPS63119338A AUXILIARY SIGNAL REPEATING TRANSMISSION SYSTEM 失效
公开(公告)号：JPS63119338A
公开(公告)日：1988-05-24
申请号：JP26383986
申请日：1986-11-07
申请人： FUJITSU LTD
发明人： SASAKI SUSUMU , MORITA TOSHIYUKI
IPC分类号： H04J3/08
摘要： PURPOSE:To prevent disconnection of an auxiliary signal transmission line by extracting and inserting a digital auxiliary signal by an auxiliary device and transferring a multiplex signal from a receiving part to a transmitting part without passing the auxiliary device at the time of abnormality in the auxiliary device or by a specific control signal. CONSTITUTION:At the time of normalcy, a switch circuit 5 is switched to the side of an auxiliary device 6 and the multiplex signal received by a receiving part 2 is applied to the auxiliary device 6 and is demultiplexed or multiplexed by auxiliary signal extraction or insertion and is applied to a transmitting part 3 through the switch circuit 5 and is modulated in the transmitting part 3 and is transmitted. If abnormality occurs or the specific control signal is applied, the switch circuit 5 is switched from the side of the auxiliary device 6 to the side of a delay circuit 4. Since the multiplex signal received by the receiving part 2 is applied to the transmitting part 3 through the delay circuit 4 then, the received auxiliary signal is transmitted together with a main signal, and the auxiliary signal line is not disconnected.

3. 发明专利

JPS61287345A DIFFERENT ROUTE SIGNAL STOP SYSTEM 失效
公开(公告)号：JPS61287345A
公开(公告)日：1986-12-17
申请号：JP12861485
申请日：1985-06-13
申请人： FUJITSU LTD
发明人： HODOHARA KIYOAKI , MORITA TOSHIYUKI
IPC分类号： H04L1/00
摘要： PURPOSE:To discriminate whether or not a signal is different route signal without lowering the transmission efficiency by using the same pattern as a sending side to descramble a reception signal at the reception end and to extract it and stopping the transmission when the signal has an error. CONSTITUTION:A pattern corresponding to a route among patterns having different phases generated by a pattern generator 21 respectively is selected by a selector 22 at the sending side, the transmission signal is scrambled and sent by using the selected pattern, a reception signal is descrambled to extract the transmission signal by using the same pattern as that at the sending side generated by a pattern generator 24 at the receiving side, and when an erroneous extracted transmission signal is detected by an error detection circuit 27, the external sending of the extracted transmission signal is stopped. Since no special bit for discriminating whether the signal is the reception signal from a different route is not inserted, the transmission efficiency is not lowered.

4. 发明专利

JPS6096031A SQUELCH CONTROL CIRCUIT 失效
公开(公告)号：JPS6096031A
公开(公告)日：1985-05-29
申请号：JP20401883
申请日：1983-10-31
申请人： FUJITSU LTD
发明人： MORITA TOSHIYUKI
IPC分类号： H04B1/10 , H04B7/155
摘要： PURPOSE:To transmit correctly error information of a fault generated in a relay station to a supervisory station by driving a squelch circuit with an output signal from a discriminating means for discriminating whether or not a transmission line identification signal is a designated signal inserted in a reception signal or a signal representing that the reception level reaches a designated level or below in a digital radio heterodyne relay device. CONSTITUTION:In order to identify whether a received wave inputted from a reception antenna 13 is a desired wave or an interference wave, transmission line identification signals FR-1-n included in the received wave are detected. Thus, the received wave converted into an intermediate frequency is demodulated by a demodulator 5, further a transmission line identification signal detector 21 extracts the transmission line identification signals FR-1-n to discriminate whether the extracted transmission line identification signal is a desired wave or not, and when the wave is the interference wave, the signal is inputted to a terminal 2 of an OR circuit 20. On the other hand, a signal representing that the reception input level is a designated input level or below is inputted from a terminal (a) of a DC amplifier 4 to a terminal 1 of an OR circuit 20. When any of the signals is inputted to the OR circuit 20, an output from the circuit interrupts the squelch circuit 6 and the connection between the reception section and the transmission section is disconnected.

5. 发明专利

JPS58190155A Fault location system 失效
标题翻译：故障定位系统
公开(公告)号：JPS58190155A
公开(公告)日：1983-11-07
申请号：JP7290782
申请日：1982-04-30
申请人： Fujitsu Ltd
发明人： MORITA TOSHIYUKI , ITOU HIDEAKI
IPC分类号： H04L1/00 , H04B17/40 , H04J3/14 , H04L25/02 , H04L25/52
CPC分类号： H04B17/406
摘要： PURPOSE:To locate an intermediate repeater station which generates a code error at a terminal station of the receiving side, by transmitting consecutively the code error factor of a frame synchronizing signal with addition of a discriminating code of the intermediate repeater station. CONSTITUTION:A receiver 1 discriminates and reproduces a digital signal containing a frame synchronizing signal region F. Then the frame synchronizing signal is sampled after a frame synchronizing circuit 4 obtains the frame synchronization. The code error factor is counted by a code error factor counting circuit 5. The result of this counting is transmitted continuously to a terminal station of the receiving side with addition of a code of the number of a repeater station through a transmitter 2'. As a result, the terminal station of the receiving side can instantaneously discriminate the intermediate repeater station having a code error. This ensures location even with an incidental fault.
摘要翻译：目的：为了定位在接收侧的终端站产生码错误的中间中继站，通过附加中间中继站的识别码连续发送帧同步信号的码错误因子。构成：接收机1识别并再现包含帧同步信号区域F的数字信号。然后，在帧同步电路4获得帧同步之后对帧同步信号进行采样。代码误差因子由代码误差因子计数电路5计数。该计数的结果通过发送器2'添加中继站号码的代码，连续发送到接收侧的终端站。结果，接收端的终端可以对具有代码错误的中间中继站进行瞬时辨别。这确保了位置，即使是偶然的故障。

6. 发明专利

JPS56129430A HIGH-SPEED BINARY SEQUENCE CIRCUIT HAVING FEEDBACK CIRCUIT 失效
公开(公告)号：JPS56129430A
公开(公告)日：1981-10-09
申请号：JP3267080
申请日：1980-03-17
申请人： FUJITSU LTD
发明人： TODA YOSHIFUMI , MORITA TOSHIYUKI , ITOU HIDEAKI , HODOHARA KIYOAKI
IPC分类号： H03K3/84 , H03K23/54
摘要： PURPOSE:To remove the limit of the maximum operating frequency of the circuit, by picking up the feedback signal from before n bits so that the delay time of the feedback can be neglected and making feedback with a delay, in a binary sequence circuit in which a plurality of FF circuits are in cascade connection. CONSTITUTION:FF circuits FF11-F13 are in cascade connection, the feedback signal is picked up from the output of FF11 and FF12 and it is fed to the delay line DL1 from the OR gate circuit G12, and delay is given by Td1 corresponding to one- bit's share and feedback input is made to the 1st stage FF11 of FF circuit. In comparison with the case that both the outputs of FF2, FF3 in FF circuit are fed directly back to FF1 conventionally, the delay time at the feedback circuit can be neglected by the feedback point before one bit, and high-speed operation can be made up to the toggle frequency of FF circuit.

7. 发明专利

JPS5465415A TIME MATCHING CIRCUIT 失效
公开(公告)号：JPS5465415A
公开(公告)日：1979-05-26
申请号：JP13146377
申请日：1977-11-04
申请人： FUJITSU LTD
发明人： SHIMOYAMA TSUNAYOSHI , MORITA TOSHIYUKI , TAKANO TOSHIHARU
IPC分类号： H04J3/00 , H03K5/00 , H04J3/06
摘要： PURPOSE:To ensure an automatic adjustment for the bit time of the 2-series signals of the same signal source and different route in the radio PCM transmission by comparing the shift output of the input signal and the reference signal. CONSTITUTION:Adjusted signal DATA is shifted automatically by one bit through shift register 12, and one of he shifted signals is compared (18) with the reference signal which passed through delay circuit 13. If no coincidence is obtained in the above comparison, another signal shifted automatically is compared (18) with the reference signal again. With repetition of this action, the coincident signal is delivered.

8. 发明专利

JPS53134395A DISPLAY SELECTION SYSTEM 失效
公开(公告)号：JPS53134395A
公开(公告)日：1978-11-22
申请号：JP4852577
申请日：1977-04-28
申请人： FUJITSU LTD
发明人： SATOU OSAMI , MORITA TOSHIYUKI
IPC分类号： G08B5/36 , G09F9/00 , G09F13/00 , G09G3/14
摘要： PURPOSE:To realize the system enabling to change over the display with one make contact, by utilizing the difference between the forward voltages for the light emitting diodes.

9. 发明专利

JPS5321599A LAMP DISCONNECTION DETECTING CIRCUIT 失效
公开(公告)号：JPS5321599A
公开(公告)日：1978-02-28
申请号：JP9636376
申请日：1976-08-12
申请人： FUJITSU LTD
发明人： MORITA TOSHIYUKI , NAKAJIMA TOSHIO , SATOU OSAMI
IPC分类号： H05B37/03 , G09F13/00
摘要： PURPOSE:To achieve the improvement in the reliability of display of display boards and control panels using a multiplicity of lamps by monitoring the presence or absence of disconnection of lamps at all times and outputting a disconnection detection signal immediately when any disconnection occurs.

10. 发明专利

JPS61287348A SCRAMBLE CIRCUIT 失效
公开(公告)号：JPS61287348A
公开(公告)日：1986-12-17
申请号：JP12861985
申请日：1985-06-13
申请人： FUJITSU LTD
发明人： HODOHARA KIYOAKI , MORITA TOSHIYUKI
IPC分类号： H04L9/06 , H04L9/14 , H04L9/22 , H04L27/00 , H04L27/34 , H04L27/36 , H04L27/38
摘要： PURPOSE:To enhance the secrecy of a data while facilitating the change in a scramble pattern by deciding the read timing of a memory written with the scramble pattern at an address set optionally externally corresponding to plural series of data. CONSTITUTION:The title circuit consists of a counter 17 for designating an address, a selection circuit selecting an address set optionally corresponding to plural series of data, an adder (subtractor) 16 adding or subtracting address outputs from both the circuits, a serial/parallel circuit 19 and a timing circuit 20. Since the address of the adder (subtractor) 16 is set optionally set, an optional scramble pattern is obtained easily from one series of scramble pattern written in a memory 18 by changing the said address. Other stations not recognizing the order of the change cannot intercept the data. In outputting the former pattern, the circuit 20 activates the conversion circuit 19 and the selection circuit 15 correspondingly.

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