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1. 发明专利

JP2001358300A SEMICONDUCTOR INTEGRATED CIRCUIT DEVICE 失效
公开(公告)号：JP2001358300A
公开(公告)日：2001-12-26
申请号：JP2000176041
申请日：2000-06-12
申请人： FUJITSU LTD
发明人： GOTO KUNIHIKO , AIZAWA KATSUAKI , KITANI KAZUHIRO , KUSAKARI MASAYASU
IPC分类号： H01L27/04 , H01L21/82 , H01L21/822 , H01L27/02 , H01L27/118 , H03K19/003
摘要： PROBLEM TO BE SOLVED: To effectively prevent the breakdown of a protection transistor for composing a protection circuit without changing the characteristics of an output circuit in a semiconductor integrated circuit device having a protection circuit for preventing the breakdown of the gate oxide film of a MOS transistor by static electricity or the like. SOLUTION: In the I/O circuit of a master slice system, a protection circuit to an internal circuit 20 is arranged where a row of protection elements 2 consisting of a P-channel MOS transistor 21, resistance elements 25 and 26, and an N-channel MOS transistor 22 can be connected in parallel, and a proper number of rows of protection elements 2 are connected in parallel according to desired drive capacity.

2. 发明专利

JPH05102066A MANUFACTURE OF SEMICONDUCTOR ELEMENT 失效
公开(公告)号：JPH05102066A
公开(公告)日：1993-04-23
申请号：JP25687591
申请日：1991-10-04
申请人： FUJITSU LTD
发明人： AIZAWA KATSUAKI
IPC分类号： H01L21/28 , H01L21/324
摘要： PURPOSE:To form an electrode having a low and uniform contact resistance by employing a structure in which a supporting member and a lifter pin do not affect influence to a temperature distribution of a compound semiconductor substrate. CONSTITUTION:A structure in which a supporting member 13 is brought into contact only with an invalid region 2B of a compound semiconductor substrate 2 is employed, and a mutual contact area is reduced. Thus, a temperature difference of front and rear surfaces of the substrate is reduced, and rising of an entire temperature is accelerated. An arm 15A extended under the peripheral region of the substrate 2 is connected to the upper end of a lifter pin 15, and a protrusion 15B in contact with the region 2B of the substrate 2 is provided at the end of the arm 15A. The pins 15 are disposed uniformly at least at three positions on the periphery of a heater 11. Accordingly, when the substrate is placed on the heater by the pins, an irregularity in temperature of a valid region does not occur.

3. 发明专利

JPH0370340A SWITCHING DEVICE 失效
公开(公告)号：JPH0370340A
公开(公告)日：1991-03-26
申请号：JP20728889
申请日：1989-08-10
申请人： FUJITSU LTD
发明人： AIZAWA KATSUAKI
IPC分类号： H04L29/08 , H04L29/10
摘要： PURPOSE:To attain automation for connection changeover with a small circuit scale by applying changeover via a changeover switch so as to allow communication controller to make communication with a data terminal equipment. CONSTITUTION:A communication controller 1 connects normally to a 1st data terminal equipment 3 via an interface section 2 and a changeover switch 10, and when a transmission request data is outputted from a data line 7 of a 2nd data terminal equipment 4, a signal detector 11 detects it to input an interrupt signal to the communication controller 1. The communication controller 1 sends a switching signal to the changeover switch 10 when not busy with a 1st data terminal equipment 3, to make communication via the interface section 2. When the communication with the 2nd data terminal equipment 4 is finished, a switching signal is sent to restore the changeover switch 10. Thus, one interface section is enough for serial parallel conversion, the connection changeover is automated with small circuit scale.

4. 发明专利

JPH02201657A PROVISIONING SYSTEM 失效
公开(公告)号：JPH02201657A
公开(公告)日：1990-08-09
申请号：JP2191389
申请日：1989-01-31
申请人： FUJITSU LTD
发明人： AIZAWA KATSUAKI , KOBAYASHI SEIICHI
IPC分类号： G06F11/20 , G06F15/16 , G06F15/177 , H04J3/00 , H04L1/22
摘要： PURPOSE:To shorten the processing time of a processor in a device occupied with a switching processing by providing a front processor and a secondary data base belonging to the front processor, and executing the processing of line attribute succession from a troubled currently-used system to an auxiliary system. CONSTITUTION:A front processor is provided as the overhang of a main processor 104 to control the operation of the system, and for a secondary data base 109, the device attribute belonging to respective currently-used operating unit devices 112 is set by a data base 105 of the main processor 104. Further the front processor 106 makes an auxiliary operating unit device 113 carry on the various attributes necessary for the substitution of the function of the currently-used operating unit device 112 with the use of the data of the secondary data base 109, and the processor 106 switches and re-switches the both currently-used and auxiliary operating devices. Thus the processing time of the processor in the device occupied by the switching processing can be shortened.

5. 发明专利

JP2004071991A Semiconductor integrated circuit device 审中-公开
公开(公告)号：JP2004071991A
公开(公告)日：2004-03-04
申请号：JP2002232096
申请日：2002-08-08
申请人： Fujitsu Ltd , 富士通株式会社
发明人： SAITO NORIAKI , AIZAWA KATSUAKI , KITANI KAZUHIRO
IPC分类号： H01L27/04 , G11C7/24 , H01L21/822 , H01L21/8238 , H01L23/60 , H01L23/62 , H01L27/00 , H01L27/02 , H01L27/06 , H01L27/092
CPC分类号： H01L27/0266
摘要： PROBLEM TO BE SOLVED: To provide a semiconductor integrated circuit device equipped with a protecting element for preventing the electrostatic destruction of an MOS transistor for making uniform an ESD load to be imposed on each protecting element within a protecting circuit, and preventing the destruction of a transistor for protecting an internal circuit.
SOLUTION: In an N channel transistor area 28, concerning resistance elements 25a and 25b in a plurality of protecting elements connected in parallel between a signal line 3 and a power source line VSS, a resistance value RA of the resistance element 25a included in a pad side area A is made larger than a resistance value RB of a resistance element 25b included in an internal circuit side area B only by a resistance value rAB of the parasitic resistance of part(from the A point to the B point) included in the pad side area A so that the resistance values of those respective protecting elements can be made equal or almost the same. The resistance elements within the plurality of protecting elements connected in parallel between the signal line 3 and the power line VDD are similarly processed.
COPYRIGHT: (C)2004,JPO

6. 发明专利

JPH08139173A SEPARATION OF DEVICES 失效
公开(公告)号：JPH08139173A
公开(公告)日：1996-05-31
申请号：JP27868694
申请日：1994-11-14
申请人： FUJITSU LTD
发明人： AIZAWA KATSUAKI
IPC分类号： H01L21/76
摘要： PURPOSE: To separate devices from each other by forming a dummy pattern, of the same material as a gate metal, parallel or nearly parallel to a crystal axis between the devices formed on a (100) plane through ion-implantation of an N-type impurity and by forming a dielectric film covering the pattern for imparting compressive stress to a substrate. CONSTITUTION: An N-type impurity is ion-implanted on a (100) plane in GaAs, etc., to form a source/drain electrode 23 and implanted resistors 24, 25. A dummy pattern 26, consisting of the same material as a gate metal 22, parallel or nearly parallel to the [011] or [01-1] direction is formed between respective devices. A dielectric film 27 is formed between respective devices for imparting compressive stress to a substrate under an interface between the dummy pattern 26 and the substrate. Thus, a piezo-electric charge is produced in the substrate between respective devices, and the N-type impurity existing due to diffusion of the device edges can be compensated so that insulation between the devices can be strengthened. Therefore, separation between the devices can be achieved efficiently to decrease leakage currents without complicated process.

7. 发明专利

JPH03245696A DIGITAL CROSS CONNECT CONTROL SYSTEM 失效
公开(公告)号：JPH03245696A
公开(公告)日：1991-11-01
申请号：JP4125390
申请日：1990-02-23
申请人： FUJITSU LTD
发明人： AIZAWA KATSUAKI
IPC分类号： H04Q11/04
摘要： PURPOSE:To save the capacity of a buffer memory and to reduce cost by providing an output section decoding an input signal into an original signal based on an additional byte of a VT signal outputted from a time division switch section and dispersing and inserting the plural additional bytes into VT signals respectively at an input section. CONSTITUTION:A time division switch section 2 uses a control section 4 to connect lines with replacement of time slots or the like and the changeover control between lines is implemented by cross connect information fed to the control section 4. When a read clock signal RCK is missing by one pulse at a time, e.g. (t), one additional byte is read from an additional byte memory 12 by using a read clock signal RCK' at the time (t) and added to an OR circuit 13. One pulse of missing is formed to each of 26 pulses of the read clock signal RCK and the read clock signal RCK' is added to the additional byte memory 12 at that point of time to insert by additional byte to each of 26 bytes of the VT signal.

8. 发明专利

JPH02182097A ALARM INFORMATION COLLECTION SYSTEM WITH POWER FAILURE COMPENSATION 失效
公开(公告)号：JPH02182097A
公开(公告)日：1990-07-16
申请号：JP220889
申请日：1989-01-09
申请人： FUJITSU LTD
发明人： AIZAWA KATSUAKI , KOBAYASHI SEIICHI
IPC分类号： H04Q9/00
摘要： PURPOSE:To maintain system operation in the occurrence of a power failure and a fault of a power supply system by providing a relay contact between transmission reception terminals of a level converter, opening the relay contact at application of power normally and closing the contact at interruption of power supply. CONSTITUTION:Switch elements (800-1)-(800-n) are provided between one input terminal and an output of an AND circuit connecting to the receiver side of a transmitter- receiver and the sender side of the transmitter-receiver. For example, if a power supply of a transmitter having a transmitter-receiver 200-1 is interrupted, switch elements 800-1 and 850-1 connecting respectively between the input and output of AND circuits 300-1 and 400-1 are closed to bypass the transmitter-receiver 200-1. Then alarm information for a transmitter-receiver 200-2 and succeeding is transferred to a remote monitor 600 and the control information from the remote monitor 600 is transferred to the transmitter-receiver 200-2 and succeeding while bypassing the transmitter-receiver 200-1. As a result, the transmission and reception of alarm information and control information are attained between the transmitter-receiver of a transmitter and a remote monitor equipment even at power failure.

9. 发明专利

JP2004221441A Semiconductor integrated circuit device 审中-公开
公开(公告)号：JP2004221441A
公开(公告)日：2004-08-05
申请号：JP2003009116
申请日：2003-01-17
申请人： Fujitsu Ltd , 富士通株式会社
发明人： AIZAWA KATSUAKI
IPC分类号： H01L29/417 , H01L21/822 , H01L21/8234 , H01L27/04 , H01L27/088 , H01L29/41 , H01L29/78
CPC分类号： H01L29/7835 , H01L29/0696 , H01L29/41758
摘要： PROBLEM TO BE SOLVED: To provide a semiconductor integrated circuit device capable of downsizing a protective element having a silicide block region of the device more than that of prior arts.
SOLUTION: In the semiconductor integrated circuit device, at least one of the drain region 16D or the source region 16S of a MOS transistor configuring the protective element of an input output circuit is separated by an interdigital pattern extended in the widthwise direction of a gate electrode 14 and the interdigital patterns are combined as a nest. Electrode contacts 19 are formed to interdigital teeth, the silicide block regions 18 are formed between the electrode contacts 19 and the gate electrodes 14, and the electrode contacts 19 and the silicide block regions 18 are respectively arranged as a row or a plurality of rows in the widthwise direction of the gate electrodes 14.
COPYRIGHT: (C)2004,JPO&NCIPI

10. 发明专利

JPH09232945A FREQUENCY DIVIDER, RING COUNTER AND PLL CIRCUIT 失效
公开(公告)号：JPH09232945A
公开(公告)日：1997-09-05
申请号：JP3827096
申请日：1996-02-26
申请人： FUJITSU LTD
发明人： NAITO HIDETOSHI , KUBOTA MIKI , AIZAWA KATSUAKI
IPC分类号： H03K23/54 , H03L7/08 , H03L7/18
摘要： PROBLEM TO BE SOLVED: To prevent problems attended with production of incorrect duty pulses while correcting a phase deviation of a frequency divider by applying logic arithmetic operation to an output of a flip-flop and an output of a latch element and outputting the result as a frequency division clock. SOLUTION: A clock CK is given to a D FF 11 and a phase control signal P is given to a latch element 12 simultaneously. The clock CK is frequency- divided by 2 with the FF 11 and the resulting clock signal is given to one input of an EX-OR element 13. Simultaneously the latched signal P is outputted synchronously with the rising of the clock CK. An output of the element 12 and an output of the FF 11 are given to the element 13, in which the clock CK is frequency-divided by 2 into a division clock CK/2. In this case, at need, a level of the signal P is switched, e.g. from '0' to '1', the output logic of the element 13 is inverted and a prescribed phase is obtained.

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