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1. 发明专利

JP2011171647A Method for manufacturing semiconductor device 有权
标题翻译：制造半导体器件的方法
公开(公告)号：JP2011171647A
公开(公告)日：2011-09-01
申请号：JP2010036114
申请日：2010-02-22
申请人： Ebara Corp , Toshiba Corp , 株式会社東芝 , 株式会社荏原製作所
发明人： NAKANISHI MASAYUKI , TOGAWA TETSUJI , ITO KENYA , SEKI MASAYA , IWADE KENJI , KUBOTA TAKEO
IPC分类号： H01L21/304
CPC分类号： H01L21/02038 , B24B9/065 , B24B21/002 , B24B37/042 , H01L21/02087 , H01L21/304 , H01L21/76256
摘要： PROBLEM TO BE SOLVED: To efficiently polish an outer periphery of a silicon substrate by using a polishing tape under polishing conditions respectively suited to a deposition film and silicon arranged under the deposition film.
SOLUTION: While rotating a device substrate 14 configured by depositing a deposition film on the surface of silicon at a first rotation speed, a first polishing tape 34 is pressed to the outer periphery of the device substrate 14 to remove the deposition film 12 located on the outer periphery of the device substrate 14, and while rotating the device substrate 14 at a second rotational speed, a second polishing tape 52 is pressed to the silicon 10 located on the outer periphery of the device substrate 14 exposed by removing the deposition film 12 to grind the silicon 10 up to predetermined depth.
COPYRIGHT: (C)2011,JPO&INPIT
摘要翻译：要解决的问题：通过在分别适合沉积膜和布置在沉积膜下方的硅的研磨条件下使用研磨带来有效地抛光硅衬底的外周。解决方案：在通过以第一转速将沉积膜沉积在硅表面上而构成的器件衬底14的同时，将第一研磨带34按压到器件衬底14的外周，以去除沉积膜12 位于器件基板14的外周上，并且在以第二转速旋转器件基板14的同时，将第二研磨带52压在位于器件基板14的外周上的硅10上，通过去除沉积薄膜12将硅10研磨至预定深度。版权所有（C）2011，JPO＆INPIT

2. 发明专利

JP2011224680A Polishing method and device 审中-公开
标题翻译：抛光方法和装置
公开(公告)号：JP2011224680A
公开(公告)日：2011-11-10
申请号：JP2010094732
申请日：2010-04-16
申请人： Ebara Corp , Toshiba Corp , 株式会社東芝 , 株式会社荏原製作所
发明人： NAKANISHI MASAYUKI , ITO KENYA , SEKI MASAYA , IWADE KENJI , KUBOTA TAKEO
IPC分类号： B24B9/00 , B24B21/00 , H01L21/304
CPC分类号： B24B21/002 , B24B9/065 , B24B21/04 , B24B37/042
摘要： PROBLEM TO BE SOLVED: To obtain a good polishing profile that a semiconductor layer never removes from a silicon substrate even when, for example, the whole outer circumference of the semiconductor layer is polished and removed, and further an edge of the silicon substrate is polished and removed to a predetermined depth to manufacture a laminated wafer such as an SOI (silicon on insulator) substrate.SOLUTION: A polishing head 2 is positioned at an immediately upper position of a polishing start position on the edge of the rotating substrate W. The polishing head 2 is moved down, causing a polishing tool 10 of the polishing head 2 to contact with the polishing start position on the edge of the rotating substrate under a predetermined pressure. After a lapse of a predetermined time, the polishing head 2 is moved toward an outer circumference end of the substrate, while the polishing tool 10 keeps contact with the edge of the rotating substrate under the predetermined pressure.
摘要翻译：要解决的问题：为了获得即使例如半导体层的整个外周被抛光和去除，半导体层也不会从硅衬底去除的良好的抛光轮廓，并且还有一个硅的边缘将衬底抛光并去除预定深度以制造诸如SOI（绝缘体上硅）衬底的层叠晶片。解决方案：抛光头2位于旋转基板W的边缘上的抛光开始位置的紧邻上部位置。抛光头2向下移动，使抛光头2的抛光工具10接触在旋转基板的边缘上的抛光开始位置处于预定压力下。经过预定时间后，研磨头2朝向基板的外周端移动，同时抛光工具10在预定压力下与旋转基板的边缘保持接触。版权所有（C）2012，JPO＆INPIT

3. 发明专利

JP2011177842A Polishing apparatus and method 审中-公开
标题翻译：抛光装置和方法
公开(公告)号：JP2011177842A
公开(公告)日：2011-09-15
申请号：JP2010044846
申请日：2010-03-02
申请人： Ebara Corp , Toshiba Corp , 株式会社東芝 , 株式会社荏原製作所
发明人： NAKANISHI MASAYUKI , TOGAWA TETSUJI , ITO KENYA , SEKI MASAYA , IWADE KENJI , KUBOTA TAKEO , NISHIOKA TAKESHI
IPC分类号： B24B21/00 , B24B9/00 , B24B21/18 , B24B53/10
CPC分类号： B24B1/00 , B24B55/00
摘要： PROBLEM TO BE SOLVED: To prevent abrasive particles from falling from a polishing tape as much as possible during polishing; and to prevent the fallen abrasive particles from entering an element forming area or the like in a center of a substrate even if the abrasive particles are fallen from the polishing tape during polishing a surface peripheral part of the substrate. SOLUTION: A polishing apparatus includes: a polishing head 12 that polishes a surface of the substrate W by pressing a surface of the polishing tape 20 to a surface of the substrate W while running the polishing tape 20, which has the abrasive particles fixed on the surface thereof, in one direction; and a conditioning apparatus (cleaning apparatus) 30 that is arranged at an upstream side of the polishing head 12 along the running direction of the polishing tape 20 and that conditions the surface in advance for preventing the abrasive particles from falling during polishing the surface of the polishing tape 20. COPYRIGHT: (C)2011,JPO&INPIT
摘要翻译：要解决的问题：为了防止磨料颗粒在抛光过程中尽可能多地从研磨带落下; 并且即使在抛光衬底的表面周边部分期间研磨颗粒从研磨带中掉落时，也可防止掉落的磨料颗粒进入衬底中心的元件形成区域等。解决方案：抛光装置包括：抛光头12，其抛光基材W的表面，通过将研磨带20的表面压在基板W的表面上，同时运行具有磨料颗粒的研磨带20 在一个方向上固定在其表面上; 以及沿研磨带20的行进方向配置在研磨头12的上游侧的调理装置（清洗装置）30，并且预先调整表面，以防止研磨颗粒在抛光过程中的表面抛光抛光胶带20.版权所有（C）2011，JPO＆INPIT

4. 发明专利

JP2003282507A Determining method of residual film by optical measurement 有权
标题翻译：通过光学测量确定残留膜的方法
公开(公告)号：JP2003282507A
公开(公告)日：2003-10-03
申请号：JP2002089775
申请日：2002-03-27
申请人： Toshiba Corp , 株式会社東芝
发明人： KUBOTA TAKEO , SHIGETA ATSUSHI
IPC分类号： G01N21/27 , G01N21/84 , G01R31/265 , H01L21/304 , H01L21/3205 , H01L21/66 , H01L21/768
CPC分类号： G01N21/8422 , G01N21/55 , G01R31/2656 , H01L22/12
摘要： PROBLEM TO BE SOLVED: To provide a determining method of a residual film by optical measurement wherein a residual film on an insulating film is easily determined in a short time without needing the calculation of a complex optical model and precision optical measurement.
SOLUTION: The method determines the presence of a second metal film on an insulating film in a specimen which contains a first metal film whose reflectance is changed by the wavelength of measurement light and the insulating film formed on the first metal film. A process wherein the measurement light is irradiated on the specimen, changes in the intensity of reflected light from the specimen the change of which is caused by the wavelength is measured and a reflectance spectrum curve is obtained, and a process wherein the reflectance spectrum curve is divided into a plurality of wavelength regions and the presence of the second metal film on the insulating film is determined by the amplitude of the reflectance spectrum curve in each wavelength region are provided in the method.
COPYRIGHT: (C)2004,JPO
摘要翻译：要解决的问题：为了通过光学测量提供残留膜的确定方法，其中在短时间内容易地确定绝缘膜上的残留膜，而不需要计算复杂的光学模型和精确的光学测量。解决方案：该方法确定在包含第一金属膜的试样中的绝缘膜上存在第二金属膜，其反射率随测量光的波长和形成在第一金属膜上的绝缘膜而变化。测量光照射在样本上的方法，测量由波长引起其变化的样本的反射光强度的变化，并获得反射光谱曲线，并且反射光谱曲线为分为多个波长区域，并且在该方法中提供了在每个波长区域中的反射光谱曲线的振幅来确定绝缘膜上的第二金属膜的存在。版权所有（C）2004，JPO

5. 发明专利

JP2007150185A Peripheral processing method and manufacturing method of semiconductor device 有权
标题翻译：半导体器件的外围加工方法和制造方法
公开(公告)号：JP2007150185A
公开(公告)日：2007-06-14
申请号：JP2005345800
申请日：2005-11-30
申请人： Toshiba Corp , 株式会社東芝
发明人： KUBOTA TAKEO , SHIGETA ATSUSHI , KUSAHARA KAORI , HONDA AKIRA , EZAWA HIROKAZU
IPC分类号： H01L21/316 , H01L21/02
CPC分类号： H01L21/268 , H01L21/02238 , H01L21/02255 , H01L21/28518 , H01L21/31654 , H01L21/31658 , H01L21/31662 , H01L21/32 , H01L21/67115 , H01L21/76807 , H01L21/76814 , H01L21/7684
摘要： PROBLEM TO BE SOLVED: To provide a peripheral processing method capable of suppressing metallic contamination generated from a peripheral and caused to a substrate to be processed in the substrate to be processed including an Si substrate, and to provide a manufacturing method of a semiconductor device using the method.
SOLUTION: The oxidizing speed at the periphery is made higher than the oxidizing speed of the natural oxide film 33 of the surface of a silicon group substrate 11 by at least either of local heating to the periphery of the substrate 10 to be processed including the silicon group substrate 11, and selective supply of reactive species to the peripheral so as to form an oxide film 31 thicker than the thickness of the natural oxide film 33 along the peripheral.
COPYRIGHT: (C)2007,JPO&INPIT
摘要翻译：解决的问题：提供一种能够抑制由外围产生的金属污染并引起待处理的基板的待处理基板的外围加工方法，其包括Si基板，并且提供一种半导体器件采用该方法。解决方案：周边的氧化速度比硅基板11的表面的天然氧化物膜33的氧化速度要高于要加工的基板10的周边的局部加热中的至少一种包括硅基底板11，以及向周边选择性地供应反应性物质，以形成比沿着周边的天然氧化膜33的厚度更厚的氧化膜31。版权所有（C）2007，JPO＆INPIT

6. 发明专利

JP2010135543A Fabricating method of nonvolatile semiconductor storage apparatus 有权
标题翻译：非挥发性半导体存储装置的制造方法
公开(公告)号：JP2010135543A
公开(公告)日：2010-06-17
申请号：JP2008309634
申请日：2008-12-04
申请人： Toshiba Corp , 株式会社東芝
发明人： MATSUI YUKITERU , KUBOTA TAKEO , TATEYAMA YOSHIKUNI , MINAMI YOSHIHIRO , KANETANI HIROYUKI
IPC分类号： H01L21/8246 , H01L27/105
CPC分类号： H01L27/11507 , H01L21/0206 , H01L21/31053 , H01L21/32139 , H01L28/55
摘要： PROBLEM TO BE SOLVED: To reduce etching failure of a ferroelectric material, caused by the dust on a hard mask. SOLUTION: After stacking an electrode film 23, a ferroelectric film 24, and an electrode film 25 sequentially on a semiconductor substrate 11, a hard mask HM is stacked. Then, by using a surfactant, the surface of the hard mask HM is scrub-cleaned, and thereafter, the hard mask HM is patterned in compliance with the planar shape of a ferroelectric capacitor 26. By anisotropically etching the electrode film 25, the ferroelectric film 24, and the electrode film 23 and sequentially using the patterned hard mask HM, a top electrode 25a, a ferroelectric layer 24a, and the bottom electrode 23a of the ferroelectric capacitor 26 are formed on the semiconductor substrate 11. COPYRIGHT: (C)2010,JPO&INPIT
摘要翻译：要解决的问题：减少由硬掩模上的灰尘引起的铁电材料的蚀刻失效。解决方案：在半导体衬底11上依次层叠电极膜23，铁电体膜24和电极膜25之后，堆叠硬掩模HM。然后，通过使用表面活性剂，对硬质掩模HM的表面进行擦洗处理，然后根据强电介质电容器26的平面形状将硬掩模HM图案化。通过各向异性蚀刻电极膜25，铁电体膜24和电极膜23，并依次使用图案化硬掩模HM，上电极25a，强电介质层24a和强电介质电容器26的底电极23a形成在半导体衬底11上。版权所有：（C）2010，JPO＆INPIT

7. 发明专利

JP2008124338A Polishing method for semiconductor wafer, and polishing device for semiconductor wafer 有权
标题翻译：半导体波形抛光方法及半导体波形抛光装置
公开(公告)号：JP2008124338A
公开(公告)日：2008-05-29
申请号：JP2006308250
申请日：2006-11-14
申请人： Toshiba Corp , 株式会社東芝
发明人： KUBOTA TAKEO , SHIGETA ATSUSHI , FUKUSHIMA MASARU
IPC分类号： H01L21/304 , B24B9/00 , B24B21/00
CPC分类号： B24B9/065
摘要： PROBLEM TO BE SOLVED: To provide a polishing method for a semiconductor wafer that can effectively apply pressure to a broad area of a semiconductor wafer's peripheral part, thus polishing it. SOLUTION: While turning a semiconductor wafer 10 in a circumferential direction, the semiconductor wafer 10 having a surface to be polished on its peripheral part, polishing is done to a surface to be polished by pressing a polishing member 41 against the surface to be polished along the circumference of the semiconductor wafer with a plurality of pressing parts 32. COPYRIGHT: (C)2008,JPO&INPIT
摘要翻译：要解决的问题：为了提供可以有效地对半导体晶片的周边部分的大面积施加压力的半导体晶片的抛光方法，从而进行抛光。解决方案：在圆周方向转动半导体晶片10的同时，在其周边部分具有要抛光的表面的半导体晶片10通过将抛光构件41压靠在表面上而进行抛光表面的抛光表面至沿着半导体晶片的周边用多个按压部件32抛光。版权所有（C）2008，JPO＆INPIT

8. 发明专利

JP2006088261A Polishing method 有权
标题翻译：抛光方法
公开(公告)号：JP2006088261A
公开(公告)日：2006-04-06
申请号：JP2004275562
申请日：2004-09-22
申请人： Toshiba Corp , 株式会社東芝
发明人： KUBOTA TAKEO
IPC分类号： B24B37/00 , B24B49/12 , B24B57/02
CPC分类号： B24B37/0056 , B24B37/042 , B24B49/12 , B24B57/02
摘要： PROBLEM TO BE SOLVED: To measure the ion concentration of slurry in the course of polishing with good accuracy.
SOLUTION: A polishing device includes: a pad 2 disposed on a turn table 1 rotatable around the central axis; a nozzle 4a disposed above the pad 2 to supply the slurry 3; a nozzle 4b disposed above the pad 2 to supply an oxidant 5; and a carrier 7 for pressing an object 6 to be polished on the pad 2 to polish the object. A hole 11 is formed in an upper layer pad 10 of the pad 2, a pH test sheet 12 is disposed in the interior of the hole 11, whereby while the slurry 3 is supplied onto the pad 2 to be polished, a change in color of the pH test sheet 12 due to the slurry 3 flowing into the hole 11 is detected, so that the pH value of the slurry 3 in the course of polishing can be analyzed on a real time basis to quickly grasp whether or not the component of the slurry 3 is abnormal.
COPYRIGHT: (C)2006,JPO&NCIPI
摘要翻译：要解决的问题：以高精度测量抛光过程中浆料的离子浓度。解决方案：抛光装置包括：垫2，设置在可围绕中心轴线旋转的转台1上; 设置在垫2上方以供应浆料3的喷嘴4a; 设置在焊盘2上方以供应氧化剂5的喷嘴4b; 以及用于在衬垫2上按压被抛光物体6以对物体进行抛光的载体7。在焊盘2的上层焊盘10中形成孔11，在孔11的内部设置有pH测试片12，由此当将浆料3供给到要抛光的焊盘2上时，颜色变化检测由于浆料3流入孔11而导致的pH测试片12的pH值，从而可以实时地分析浆料3在抛光过程中的pH值，以快速掌握浆料3异常。版权所有（C）2006，JPO＆NCIPI

9. 发明专利

JP2009164175A Method for fabricating semiconductor device 审中-公开
标题翻译：制造半导体器件的方法
公开(公告)号：JP2009164175A
公开(公告)日：2009-07-23
申请号：JP2007339321
申请日：2007-12-28
申请人： Toshiba Corp , 株式会社東芝
发明人： KUBOTA TAKEO
IPC分类号： H01L21/768
CPC分类号： H01L21/76802 , H01L21/0332 , H01L21/31144 , H01L21/76829
摘要： PROBLEM TO BE SOLVED: To provide a method for fabricating semiconductor device which can control processing damages, when an insulating film is etched, using a metal material as a hard mask.
SOLUTION: A fabrication process of a semiconductor device includes a step S104 for forming an insulating film on a base; a step S108 for forming a film containing a metal on the insulating film, a step S110 for forming a film containing Si and C or N and C on the film containing a metal; a step S118 for etching the film containing carbon selectively; a step S126 for etching the film containing a metal selectively such that an opening formed by etching is transferred; and a step S128 for etching the insulating film using the film containing carbon and the film containing a metal as a mask, in a state where the surface different from the opening of the film containing carbon is exposed.
COPYRIGHT: (C)2009,JPO&INPIT
摘要翻译：要解决的问题：为了提供一种可以控制处理损伤的半导体器件的制造方法，当绝缘膜被蚀刻时，使用金属材料作为硬掩模。解决方案：半导体器件的制造工艺包括用于在基底上形成绝缘膜的步骤S104; 用于在绝缘膜上形成含有金属的膜的步骤S108，在含有金属的膜上形成含有Si和C或N和C的膜的步骤S110; 选择性地蚀刻含有碳的膜的步骤S118; 选择性地蚀刻含有金属的膜，使得通过蚀刻形成的开口被转印的步骤S126; 以及在与含有碳的膜的开口不同的表面露出的状态下，使用含有碳的膜和含有金属作为掩模的膜蚀刻绝缘膜的步骤S128。版权所有（C）2009，JPO＆INPIT

10. 发明专利

JP2007012943A Substrate processing method 审中-公开
标题翻译：基板处理方法
公开(公告)号：JP2007012943A
公开(公告)日：2007-01-18
申请号：JP2005193136
申请日：2005-06-30
申请人： Toshiba Corp , 株式会社東芝
发明人： KUBOTA TAKEO , SHIGETA ATSUSHI , TOYODA GEN
IPC分类号： H01L21/304
CPC分类号： H01L21/02087 , B24B9/065 , B24B21/002 , C09G1/04 , H01L21/302
摘要： PROBLEM TO BE SOLVED: To rapidly remove an SiN film sticking to a fringe of a processing substrate by polishing, and to realize improvement of through-put and reduction in a processing cost while restraining generation of defects.
SOLUTION: In the substrate processing method, a fringe 11 of a processing substrate 10 is polished by sliding the fringe 11 of the processing substrate 10 and a polishing material 21 for removing an SiN film sticking to the fringe 11 of the processing substrate 10. Water solution containing polyethylenimine or tetramethylammonium hydroxide is supplied to a sliding part between the fringe 11 of the processing substrate 10 and the polishing material 21.
COPYRIGHT: (C)2007,JPO&INPIT
摘要翻译：要解决的问题：通过抛光来快速除去粘附在处理基板边缘上的SiN膜，并且在抑制缺陷产生的同时实现加工成本的提高和加工成本的降低。解决方案：在基板处理方法中，通过滑动处理基板10的边缘11和抛光材料21来抛光处理基板10的边缘11，抛光材料21用于去除粘附到处理基板的边缘11的SiN膜将含有聚乙烯亚胺或四甲基氢氧化铵的水溶液供给到处理基板10的边缘11和抛光材料21之间的滑动部分。（C）2007，JPO＆INPIT

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