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1. 发明专利

JP2014099865A Semiconductor device and electronic apparatus 有权
标题翻译：半导体器件和电子设备
公开(公告)号：JP2014099865A
公开(公告)日：2014-05-29
申请号：JP2013254249
申请日：2013-12-09
申请人： Semiconductor Energy Lab Co Ltd , 株式会社半導体エネルギー研究所
发明人： KOYAMA JUN , ASAMI MUNEHIRO , SHIONOIRI YUTAKA , ATAMI TOMOAKI
IPC分类号： G09G3/36 , H03K19/0185 , G02F1/133 , G09G3/20 , G09G3/30 , G09G3/32 , H01L51/50
CPC分类号： H03K19/018578 , G09G3/3208 , G09G3/3225 , G09G3/3685 , G09G2310/0289 , G09G2310/0291
摘要： PROBLEM TO BE SOLVED: To provide a level shifter having sufficient amplitude converting capabilities even when the voltage amplitude of an input signal is low while corresponding to the reduced driving voltage of a driving circuit.SOLUTION: A level shifter using a current mirror circuit 150 and a differential circuit 160 is used for a converting section of the voltage amplitude of a signal. Since the potential difference of a signal input through transistors 105 and 106 to a differential circuit 160 is amplified and output, normal voltage amplitude conversion can be performed without being affected by the influence of the thresholds of the transistors even when the voltage amplitude of the input signal is low.
摘要翻译：要解决的问题：即使在输入信号的电压幅度低的同时也提供具有足够的幅度转换能力的电平移位器，同时对应于驱动电路的降低的驱动电压。解决方案：使用电流镜电路150的电平移位器和差分电路160用于信号的电压幅度的转换部分。由于通过晶体管105和106输入到差分电路160的信号的电位差被放大和输出，所以即使在输入的电压幅度时也可以进行正常的电压振幅转换，而不受晶体管的阈值的影响信号低。

2. 发明专利

JP2013093856A Semiconductor device 有权
标题翻译：半导体器件
公开(公告)号：JP2013093856A
公开(公告)日：2013-05-16
申请号：JP2012254001
申请日：2012-11-20
申请人： Semiconductor Energy Lab Co Ltd , 株式会社半導体エネルギー研究所
发明人： KOYAMA JUN , ASAMI MUNEHIRO , SHIONOIRI YUTAKA , ATAMI TOMOAKI
IPC分类号： G09G3/36 , H03K19/0185 , G02F1/133 , G09G3/20 , G09G3/32
CPC分类号： H03K19/018578 , G09G3/3208 , G09G3/3225 , G09G3/3685 , G09G2310/0289 , G09G2310/0291
摘要： PROBLEM TO BE SOLVED: To provide a level shifter capable of dealing with reduction in a drive voltage of a drive circuit and having a sufficient amplitude conversion capability even when a voltage amplitude of an input signal is small.SOLUTION: A level shifter utilizing a current mirror circuit 150 and a differential circuit 160 is used for a conversion part of a voltage amplitude of a signal. Since a potential difference between signals inputted to the differential circuit 160 via transistors 105 and 106 is amplified and outputted, even when the voltage amplitude of an input signal is small, normal conversion of the voltage amplitude is possible without being affected by a threshold of transistors.
摘要翻译：要解决的问题：即使当输入信号的电压幅度小时，也能够提供能够处理驱动电路的驱动电压降低且具有足够的振幅转换能力的电平移位器。解决方案：使用电流镜电路150和差分电路160的电平移位器用于信号的电压幅度的转换部分。由于经由晶体管105和106输入到差分电路160的信号之间的电位差被放大并输出，所以即使当输入信号的电压幅度小时，电压幅度的正常转换也可能不受晶体管的阈值的影响。版权所有（C）2013，JPO＆INPIT

3. 发明专利

JP2013008946A Semiconductor device 有权
标题翻译：半导体器件
公开(公告)号：JP2013008946A
公开(公告)日：2013-01-10
申请号：JP2012097372
申请日：2012-04-23
申请人： Semiconductor Energy Lab Co Ltd , 株式会社半導体エネルギー研究所
发明人： IEDA YOSHINORI , ISOBE ATSUO , SHIONOIRI YUTAKA , ATAMI TOMOAKI
IPC分类号： H01L21/8244 , H01L21/336 , H01L21/8234 , H01L21/8238 , H01L21/8242 , H01L27/08 , H01L27/088 , H01L27/092 , H01L27/10 , H01L27/105 , H01L27/108 , H01L27/11 , H01L29/786
CPC分类号： H01L27/1207 , H01L27/092 , H01L27/105 , H01L27/1052 , H01L27/10805 , H01L27/115 , H01L27/11551 , H01L27/1156 , H01L27/1225 , H01L27/1255 , H01L27/1259 , H01L28/40 , H01L29/04 , H01L29/16 , H01L29/24 , H01L29/42384 , H01L29/4908 , H01L29/78 , H01L29/78648 , H01L29/7869
摘要： PROBLEM TO BE SOLVED: To provide a semiconductor device operating at high speed and consuming less power.SOLUTION: A semiconductor device comprises: a memory element including a first transistor having crystalline silicon in a channel formation region; a capacitor storing data of the memory element; and a second transistor serving as a switching element for controlling the supplying, holding, and releasing of charges of the capacitor. The second transistor is located on an insulation film covering the first transistor. The first and second transistors share a source electrode and a drain electrode. The insulation film includes a first oxide insulation film from which oxygen is partially removed by heating, and a second oxide insulation film preventing diffusion of oxygen and provided around the first oxide insulation film. An oxide semiconductor film included in the second transistor includes a first region being in contact with the first oxide insulation film and serving as the channel formation region, and a pair of second regions having the first region sandwiched therebetween and being in contact with the first and second oxide insulation films.
摘要翻译：要解决的问题：提供以高速运转并消耗较少功率的半导体器件。解决方案：半导体器件包括：存储元件，其包括在沟道形成区域中具有晶体硅的第一晶体管; 存储所述存储元件的数据的电容器; 以及用作控制电容器的电荷的供给，保持和释放的开关元件的第二晶体管。第二晶体管位于覆盖第一晶体管的绝缘膜上。第一和第二晶体管共享源电极和漏电极。绝缘膜包括通过加热部分地除去氧的第一氧化物绝缘膜和防止氧扩散并设置在第一氧化物绝缘膜周围的第二氧化物绝缘膜。包括在第二晶体管中的氧化物半导体膜包括与第一氧化物绝缘膜接触并用作沟道形成区的第一区域，以及一对第二区域，其中第一区域夹在其间并与第一和第二区域接触，第二氧化物绝缘膜。版权所有（C）2013，JPO＆INPIT

4. 发明专利

JP2012256408A Semiconductor memory device and driving method thereof 有权
标题翻译：半导体存储器件及其驱动方法
公开(公告)号：JP2012256408A
公开(公告)日：2012-12-27
申请号：JP2012100730
申请日：2012-04-26
申请人： Semiconductor Energy Lab Co Ltd , 株式会社半導体エネルギー研究所
发明人： ATAMI TOMOAKI , TAKEWAKI YOSHIYA
IPC分类号： G11C11/406
CPC分类号： G11C5/10 , G11C11/401 , G11C11/404 , G11C11/406 , G11C11/4091 , G11C11/4099 , H01L27/10873 , H01L27/10897 , H01L27/1218 , H01L27/1225
摘要： PROBLEM TO BE SOLVED: To provide a semiconductor memory device including a refresh timing detection circuit having a small area and low power consumption.SOLUTION: A memory module includes: a memory cell array including memory cells arranged in matrix, each including a first transistor using an oxide semiconductor and a first capacitor; and a refresh timing detection circuit including a reference cell including a p-channel third transistor, a second capacitor, and a second transistor using an oxide semiconductor, and a resistor and a comparator. In the memory module, when a potential is supplied to the first capacitor through the first transistor, a potential is supplied to the second capacitor through the second transistor, in which a drain current value of the third transistor is changed in accordance with the potential stored in the second capacitor, and in which when the drain current value of the third transistor is higher than a given value, refresh operations of the memory cell array and the reference cell are performed.
摘要翻译：要解决的问题：提供一种包括具有小面积和低功耗的刷新定时检测电路的半导体存储器件。存储器模块包括：存储单元阵列，包括以矩阵形式布置的存储单元，每个存储单元包括使用氧化物半导体的第一晶体管和第一电容器; 以及包括具有p沟道第三晶体管，第二电容器和使用氧化物半导体的第二晶体管的参考单元的刷新定时检测电路，以及电阻器和比较器。在存储器模块中，当通过第一晶体管向第一电容器提供电位时，通过第二晶体管将电位提供给第二电容器，其中第三晶体管的漏极电流值根据存储的电位而改变在第二电容器中，当第三晶体管的漏极电流值高于给定值时，执行存储单元阵列和参考单元的刷新操作。版权所有（C）2013，JPO＆INPIT

5. 发明专利

JP2010108585A Semiconductor memory device 有权
标题翻译：半导体存储器件
公开(公告)号：JP2010108585A
公开(公告)日：2010-05-13
申请号：JP2009218321
申请日：2009-09-23
申请人： Semiconductor Energy Lab Co Ltd , 株式会社半導体エネルギー研究所
发明人： OUMARU TAKUO , ATAMI TOMOAKI , SAITO TOSHIHIKO
IPC分类号： G11C29/04
CPC分类号： G11C29/44 , G11C16/3459 , G11C16/349 , G11C29/4401 , G11C29/808 , G11C2029/0409 , G11C2029/0411 , G11C2029/4402
摘要： PROBLEM TO BE SOLVED: To achieve memory access for repairing defects simply and at high speed.
SOLUTION: A redundant memory cell array that stores the number of times that defects are repaired is provided in a spare memory in a semiconductor memory device. When a signal from the outside is received, the signal is switched to the redundant memory cell array, and the number of repair times is determined. Then, based on the result of the determination, it is determined whether to determine a defective memory cell or to terminate the determination and write data to a main memory cell. Thus, the redundant memory cell array stores the number of repair times, thereby quickly determining a memory repair state.
COPYRIGHT: (C)2010,JPO&INPIT
摘要翻译：要解决的问题：为了简单和高速地实现对缺陷进行修复的存储器访问。解决方案：存储缺陷修复次数的冗余存储单元阵列在半导体存储器件的备用存储器中提供。当接收到来自外部的信号时，将该信号切换到冗余存储单元阵列，并确定修复次数。然后，基于确定结果，确定是否确定有缺陷的存储器单元，或者终止确定并将数据写入主存储单元。因此，冗余存储单元阵列存储修复次数，从而快速地确定存储器修复状态。版权所有（C）2010，JPO＆INPIT

6. 发明专利

JP2009259395A Display device and electronic equipment 审中-公开
标题翻译：显示设备和电子设备
公开(公告)号：JP2009259395A
公开(公告)日：2009-11-05
申请号：JP2009183466
申请日：2009-08-06
申请人： Semiconductor Energy Lab Co Ltd , 株式会社半導体エネルギー研究所
发明人： KOYAMA JUN , ATAMI TOMOAKI
IPC分类号： G11C11/418 , G02F1/1345 , G11C11/41
摘要： PROBLEM TO BE SOLVED: To solve the problem such as deterioration in a yield of a memory circuit or decrease in a response speed due to variance in a thin-film transistor in the memory circuit using the thin-film transistor. SOLUTION: Improvement of the yield of a memory cell and increase of the response speed are achieved by driving word lines with a voltage different from a logical amplitude of the memory cell. The improvement is adaptable for SRAM, DRAM, mask ROM, etc., and by integrally forming the memory circuit with the display device, a configuration of the more multi-functional display device is attainable. COPYRIGHT: (C)2010,JPO&INPIT
摘要翻译：解决问题：为了解决使用薄膜晶体管的存储电路中由于薄膜晶体管的差异导致存储电路的产量劣化或响应速度降低的问题。解决方案：通过用不同于存储单元的逻辑振幅的电压驱动字线来实现存储器单元的产量的提高和响应速度的增加。该改进适用于SRAM，DRAM，掩模ROM等，并且通过与显示装置一体地形成存储电路，可以实现更多功能的显示装置的配置。版权所有（C）2010，JPO＆INPIT

7. 发明专利

JP2007005778A Semiconductor device 审中-公开
标题翻译：半导体器件
公开(公告)号：JP2007005778A
公开(公告)日：2007-01-11
申请号：JP2006142206
申请日：2006-05-23
申请人： Semiconductor Energy Lab Co Ltd , 株式会社半導体エネルギー研究所
发明人： SHIONOIRI YUTAKA , ATAMI TOMOAKI , INOUE HIROKI
IPC分类号： H01L21/822 , G06K19/07 , H01L27/04 , H01L29/786 , H01Q7/00 , H03H5/02
摘要： PROBLEM TO BE SOLVED: To provide a semiconductor device in which the layout area of static capacitance can be reduced, and the resonance frequency can be easily adjusted. SOLUTION: The semiconductor device has an antenna and a resonance circuit, including a capacitor connected to the antenna in parallel, wherein the capacitor is made up of x pieces of first capacitor or capacitors (x is an arbitrary natural number), y pieces of second capacitor or capacitors (y is an arbitrary natural number), and z pieces of third capacitor or capacitors (z is an arbitrary natural number) connected in parallel; and the first capacitor or capacitors, the second capacitor or capacitors, and the third capacitor or capacitors each have capacitance that is different from each another. It is preferable that each of the first capacitor or capacitors, the second capacitor or capacitors, and the third capacitor or capacitors be an MIS capacitor. Furthermore, at least one of the first capacitor or capacitors, the second capacitor or capacitors, and the third capacitor or capacitors is preferably is constituted of a plurality of capacitors that are connected in parallel. COPYRIGHT: (C)2007,JPO&INPIT
摘要翻译：要解决的问题：提供一种其中可以减小静态电容的布局面积并且可以容易地调节谐振频率的半导体器件。解决方案：半导体器件具有天线和谐振电路，包括并联连接到天线的电容器，其中电容器由x个第一电容器或电容器组成（x是任意自然数），y 第二电容器或电容器（y是任意自然数），和并联连接的z个第三电容器或电容器（z是任意自然数）; 并且第一电容器或电容器，第二电容器或电容器以及第三电容器或电容器各自具有彼此不同的电容。优选地，第一电容器或电容器，第二电容器或电容器以及第三电容器或电容器中的每一个都是MIS电容器。此外，第一电容器或电容器，第二电容器或电容器以及第三电容器或电容器中的至少一个优选地由并联连接的多个电容器构成。版权所有（C）2007，JPO＆INPIT

8. 发明专利

JP2005038557A Memory circuit and display device having memory circuit 有权
标题翻译：具有存储器回路的存储器电路和显示器件
公开(公告)号：JP2005038557A
公开(公告)日：2005-02-10
申请号：JP2003277068
申请日：2003-07-18
申请人： Semiconductor Energy Lab Co Ltd , 株式会社半導体エネルギー研究所
发明人： KOYAMA JUN , ATAMI TOMOAKI
IPC分类号： G02F1/1345 , G02F1/133 , G02F1/1368 , G09G3/20 , G09G3/30 , G09G3/36 , G11C7/00 , G11C8/08 , G11C11/407 , G11C11/408 , G11C11/413 , G11C11/418 , G11C17/18 , H01L51/50 , H05B33/14
CPC分类号： G11C8/08 , G11C11/4085 , G11C11/418
摘要： PROBLEM TO BE SOLVED: To solve the problems of reduction of a yield of a memory circuit and reduction of a response speed caused by fluctuation of transistors, in the memory circuit using thin film transistors. SOLUTION: The yield of the memory cell and response speed are enhanced by driving a wordline with a voltage having an amplitude different from the logical amplitude of the memory cell. This memory circuit can be applied to an SRAM, a DRAM, a mask ROM and the like and a display device having multiple functions can be formed by forming the memory circuit integrally with the display device. COPYRIGHT: (C)2005,JPO&NCIPI
摘要翻译：要解决的问题：在使用薄膜晶体管的存储电路中，解决存储电路的产量降低和由晶体管的波动引起的响应速度的降低的问题。解决方案：通过用具有与存储器单元的逻辑幅度不同的电压的电压驱动字线来增强存储单元的产量和响应速度。该存储器电路可以应用于SRAM，DRAM，掩模ROM等，并且可以通过与显示装置一体地形成存储电路来形成具有多种功能的显示装置。版权所有（C）2005，JPO＆NCIPI

9. 发明专利

JP2014103662A Central management system 有权
标题翻译：中央管理系统
公开(公告)号：JP2014103662A
公开(公告)日：2014-06-05
申请号：JP2013219995
申请日：2013-10-23
申请人： Semiconductor Energy Lab Co Ltd , 株式会社半導体エネルギー研究所
发明人： YAMAZAKI SHUNPEI , NISHIJIMA TATSUJI , KOBAYASHI HIDETOMO , ATAMI TOMOAKI , KATO KIYOSHI
IPC分类号： H04Q9/00
CPC分类号： H02M3/156 , G01R19/00 , G05B15/02 , G05B19/048 , G05B2219/24024 , G06F1/32 , G08B26/007 , G08B29/181 , H04L12/2825 , H04W4/043 , Y02B90/241 , Y02D70/00 , Y02D70/144 , Y04S20/242 , Y04S20/32 , Y04S20/36
摘要： PROBLEM TO BE SOLVED: To provide a central management system capable of performing central management on an electric apparatus and a sensor device, and capable of reducing power consumption of the electric apparatus and the sensor device.SOLUTION: There is provided a central management system at least comprising a central management unit, an electric apparatus or a sensor device, and output means. The central management system carries out arithmetic calculation on information transmitted from the electric apparatus or the sensor device, and causes the output means to output information according to a result of the calculation. A user is allowed to know a state of the electric apparatus or the sensor apparatus even when the user is away from the electric apparatus or the sensor device. The electric apparatus or the sensor device includes a transistor which uses a semiconductor having a wider band gap than that of a single-crystalline silicon as an active layer.
摘要翻译：要解决的问题：提供一种能够对电气设备和传感器设备执行中央管理并且能够降低电气设备和传感器设备的功耗的中央管理系统。解决方案：提供了一种中央管理系统，至少包括中央管理单元，电气设备或传感器设备以及输出装置。中央管理系统对从电气设备或传感器设备发送的信息进行算术计算，并使输出装置根据计算结果输出信息。即使用户离开电气设备或传感器设备，也允许用户知道电气设备或传感器设备的状态。电气装置或传感器装置包括使用具有比单晶硅作为有源层的带隙更宽的带隙的半导体的晶体管。

10. 发明专利

JP2014099165A Microcontroller and method for manufacturing the same 有权
标题翻译：微控制器及其制造方法
公开(公告)号：JP2014099165A
公开(公告)日：2014-05-29
申请号：JP2013215950
申请日：2013-10-17
申请人： Semiconductor Energy Lab Co Ltd , 株式会社半導体エネルギー研究所
发明人： NISHIJIMA TATSUJI , KOBAYASHI HIDETOMO , ATAMI TOMOAKI , KATO KIYOSHI , YAMAZAKI SHUNPEI
IPC分类号： G06F1/32 , G06F1/30 , H01L21/822 , H01L21/8234 , H01L21/8242 , H01L27/04 , H01L27/088 , H01L27/10 , H01L27/105 , H01L27/108 , H01L29/786
CPC分类号： G06F1/3296 , G06F1/3206 , G06F1/3243 , G06F1/3275 , G06F1/3287 , Y02B60/1239 , Y02B60/1282 , Y02D10/152 , Y02D10/171
摘要： PROBLEM TO BE SOLVED: To provide a microcontroller which operates in a low power consumption mode.SOLUTION: A microcontroller includes a CPU, a memory, and a peripheral circuit such as a timer circuit. A register in the peripheral circuit is provided in an interface with a bus line. A power gate for controlling power supply is provided. The microcontroller can operate not only in a normal operation mode where all circuits are active, but also in a low power consumption mode where only some of the circuits are active. A volatile memory and nonvolatile memory are provided in a register, such as a register of the CPU, which does not receive power supply in the low power consumption mode. Data in the volatile memory is backed up in the nonvolatile memory before the power supply is stopped when it shifts to the low power consumption mode. If the operation mode returns to the normal mode, when power supply is started again, data in the nonvolatile memory is written back into the volatile memory.
摘要翻译：要解决的问题：提供以低功耗模式工作的微控制器。解决方案：微控制器包括CPU，存储器和诸如定时器电路的外围电路。外围电路中的寄存器设置在与总线线路的接口中。提供用于控制电源的电源门。微控制器不仅可以在所有电路都有效的正常工作模式下工作，而且还可以在只有一些电路处于活动状态的低功耗模式下工作。在诸如CPU的寄存器的寄存器中提供易失性存储器和非易失性存储器，其在低功耗模式下不接收电源。在电源停止转移到低功耗模式之前，易失性存储器中的数据被备份在非易失性存储器中。如果操作模式返回正常模式，则当再次启动电源时，非易失性存储器中的数据被写回到易失性存储器中。

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