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81. 发明专利

JPS60201654A SEMICONDUCTOR INTEGRATED CIRCUIT DEVICE 失效
公开(公告)号：JPS60201654A
公开(公告)日：1985-10-12
申请号：JP5881884
申请日：1984-03-27
申请人： NIPPON ELECTRIC CO
发明人： SATOU MASAKATSU
IPC分类号： H01L27/04 , H01L21/822 , H01L29/8605
摘要： PURPOSE:To enable to realize a high resistor using a small occupying area without necessitating a specially additional process at a semiconductor integrated circuit device by a method wherein one conductive diffusion region made to come in contact with both of the sides and the upper part of a reversely conductive diffusion region, and formed to higher concentration of impurity concentration and moreover deeper than the reversely conductive diffusion region is provided. CONSTITUTION:A P type diffusion layer 12 formed at the same time with the base of an NPN transistor of reversely conductive diffusion region is formed in an N type epitaxial silicon substrate 11 of single-conductive semiconductor substrate, and an N type diffusion layer 13 made to come in contact with both the sides and the upper part of the P type diffusion layer 12 thereof, and made to have higher concentration of impurity concentration and moreover made as to be deeper than the P type diffusion layer 12, and formed at the same time with diffusion performed to reduce collector series resistance of the NPN transistor is provided. Moreover a silicon oxide film 14 is formed on the surface of the N type epitaxial silicon substrate. The P type diffusion layer 12 is used as a resistance part like this, while because the deep N type diffusion layer 13 surrounds the region of P type diffusion layer 12 from the sides as to be superposed at the upper part, a high resistor can be realized.

82. 发明专利

JPS60147154A RESISTANCE STRUCTURE 失效
公开(公告)号：JPS60147154A
公开(公告)日：1985-08-03
申请号：JP17166184
申请日：1984-08-20
申请人： IBM
发明人： IGOO ANTEIPOBU
IPC分类号： H01L27/04 , H01L21/285 , H01L21/331 , H01L21/822 , H01L29/10 , H01L29/73 , H01L29/732 , H01L29/8605

83. 发明专利

JPS60128652A SEMICONDUCTOR DEVICE 失效
公开(公告)号：JPS60128652A
公开(公告)日：1985-07-09
申请号：JP23613383
申请日：1983-12-16
申请人： HITACHI LTD
发明人： NAGAYAMA YOSHIHARU , YOSHINAGA MAKI
IPC分类号： H01L27/04 , H01L21/76 , H01L21/822 , H01L29/8605
摘要： PURPOSE:To realize a pinch resistor less dependent on voltage by a method wherein the impurity region of a first conductivity type constituting the current path for the pinch resistor is formed in an insulator-isolating region and then a plurality of impurity regions of a second conductivity type opposite in conductiviey to the first type are formed within the impurity region of the first conductivity type. CONSTITUTION:On a P type Si semiconductor substrate 11, a P channel stopper region 12, SiO2 insulating-isolating layer 13, and an N epitaxial layer 14 are formed. In the N epitaxial layer 14 (activation region) insulated from other semiconductor element regions, a P impurity region 15 (first conductivity type impurity region) is formed for the formation of a current path for a pinch resistor. Further, in the P impurity region 15, a plurality of N impurity regions 16 (second conductivity type impurity region) are formed along the path of current. The end surface 16a of the N impurity region 16 abuts against the insulating-isolating layer 13.

84. 发明专利

JPS60123052A SEMICONDUCTOR DEVICE 失效
公开(公告)号：JPS60123052A
公开(公告)日：1985-07-01
申请号：JP22991583
申请日：1983-12-07
申请人： HITACHI LTD
发明人： KOIKE JIYUNICHI
IPC分类号： H01L29/78 , H01L21/762 , H01L27/02 , H01L27/06 , H01L29/45 , H01L29/8605
摘要： PURPOSE:To reduce the total layout area of a gate protective circuit or an input pad, and to increase the degree of integration by forming an input resistor for the gate protective circuit by a diffusion layer and forming the input pad on the diffusion layer. CONSTITUTION:An oxide film 40 is shaped on the main surface of an N type silicon substrate 20, windows 41 are formed to the oxide film, and boron ions are implanted while using the oxide film as a mask, and diffused through treatment at a high temperature to form P type diffusion layers 21, 21A. An SiO2 film 42 is shaped on the whole surface, an Si2N3 film 43 is formed on the film 42, and the film 43 is oxidized selectively to shape field oxide films 22. An NMOS transistor QN and a PMOS transistor QP are formed through a normal method, high- concentration impurity layers 27, 28 are formed at the same time as diffusion layers 31, 31 for the PMOS transistor QP, and Al layers 34-36 are formed and brought into contact while a wiring layer 37 and an input pad 38 are shaped, thus completing a semiconductor device.

85. 发明专利

JPS6063954A RESISTOR INCORPORATED IN SEMICONDUCTOR IC 失效
公开(公告)号：JPS6063954A
公开(公告)日：1985-04-12
申请号：JP17179683
申请日：1983-09-16
申请人： SANYO ELECTRIC CO , TOKYO SANYO ELECTRIC CO
发明人： ATSUMI TSUGUKAZU
IPC分类号： H01L27/04 , H01L21/822 , H01L29/8605
摘要： PURPOSE:To contrive to improve the integration degree by reduction of the occupation area of the resistor by contriving the reduction of pattern by a method wherein a resistance region of reverse conductivity type is arranged by bending in an island region of one conductivity type, and gaps between the resistance regions are gradually increased from the high potential side to the low potential side. CONSTITUTION:The island region 11 is formed by P-N isolation through isolation and diffusion after an N-epitaxial layer is grown on a P type semiconductor substrate. The resistance regions 12 are formed by selective diffusion of a P type impurity in the island 11 and then by bending at fixed pitches d1, d2, d3, and d4. For example, a 10kOMEGA resistor is formed in a semiconductor IC of a high withstand voltage at 50V. The resistance region 12 has a width of 15mum, length of about 1,000mum, and plane resistance Rs of 150OMEGA/square. The gaps between the regions 12 are gradually increased from the high potential side to the low potential side; where, d1 is 20mum, d2 25mum, d3 30mum, and d4 32.5mum respectively. Since the region 11 is biased at a power source voltage of 50V, the reverse bias voltage is ''0'' on the high potential side of 50V of the region 12, and a depletion layer is determined only by the diffused potential, coming to approx. 1mum.

86. 发明专利

JPS59214251A Semiconductor element 失效
标题翻译：半导体元件
公开(公告)号：JPS59214251A
公开(公告)日：1984-12-04
申请号：JP8973083
申请日：1983-05-20
申请人： Matsushita Electronics Corp
发明人： OOTA MITSUHARU , YOSHIDA ISAO
IPC分类号： H01L27/04 , H01L21/822 , H01L29/8605
CPC分类号： H01L29/8605
摘要： PURPOSE:To realize a high resistance with small area by narrowing the width of epitaxial region surrounded by a separation layer and connecting the upper part of epitaxial region with a separation layer through diffusion of separation layer. CONSTITUTION:An epitaxial resistance 16' is formed on a substrate 17 and it is surrounded by a separated diffusion region 20. The epitaxial resistance 16' is connected externally through the contact region 19 and contact window 18. The separated diffusion region 20 is formed in such a way as connecting the upper layer of epitaxial resistance 16'. Therefore, an average width W becomes narrow and a high resistance can be obtained.
摘要翻译：目的：通过使由分离层包围的外延区域的宽度变窄并通过分离层的扩散将外延区域的上部与分离层连接起来，实现小面积的高电阻。构成：外延电阻16'形成在衬底17上并被分离的扩散区域20包围。外延电阻16'通过接触区域19和接触窗口18外部连接。分离的扩散区域20形成在这种连接外延电阻16'的上层的方式。因此，平均宽度W变窄并且可以获得高电阻。

87. 发明专利

JPS59214250A Semiconductor device 失效
标题翻译：半导体器件
公开(公告)号：JPS59214250A
公开(公告)日：1984-12-04
申请号：JP8857283
申请日：1983-05-20
申请人： Toshiba Corp
发明人： SAKAMOTO MASAFUMI
IPC分类号： H01L27/04 , H01L21/822 , H01L29/8605
CPC分类号： H01L29/8605
摘要： PURPOSE:To raise a resistance value without increase in size of diffusion resistance element by forming a recess at a part of surface of diffusion resistance region. CONSTITUTION:A semiconductor layer 4 of the second conductivity type formed at the surface of a semiconductor layer 3 of the first conductivity type becomes a diffusion resistance region. A recess 9 is formed at least a part of surface, except for both ends of resistance region 4. The surface of semiconductor layers 3, 4 are covered with an insulating film 5 and electrodes 71, 72 are provided on such insulator 5. The electrodes 71, 72 are connected to the resistance region 4 through the contact holes 61, 62. The resistance region 4 becomes thin and its sheet resistance increases by forming a recess to a part of surface of resistance region 4.
摘要翻译：目的：通过在扩散电阻区域的表面的一部分形成凹部来提高电阻值而不增大扩散电阻元件的尺寸。构成：形成在第一导电类型的半导体层3的表面上的第二导电类型的半导体层4成为扩散电阻区域。在电阻区域4的两端除了表面的至少一部分形成有凹部9。半导体层3,4的表面被绝缘膜5覆盖，电极71,72设置在绝缘体5上。电极 71，72通过接触孔61,62连接到电阻区域4.电阻区域4变薄，并且通过在电阻区域4的表面的一部分形成凹部来增加薄膜电阻。

88. 发明专利

JPS59144167A Semiconductor resistance device 失效
标题翻译：半导体电阻器件
公开(公告)号：JPS59144167A
公开(公告)日：1984-08-18
申请号：JP1734783
申请日：1983-02-07
申请人： Hitachi Ltd
发明人： SHIMIZU ISAO
IPC分类号： H01L27/04 , H01L21/822 , H01L21/8226 , H01L27/082 , H01L29/8605
CPC分类号： H01L29/8605
摘要： PURPOSE:To reduce an element in size by forming the first conductive type semiconductor layer of high density directly under the second conductive type layer, thereby forming a high resistance of small pattern without altering a diffusing process. CONSTITUTION:A high density n type buried layer 6 in which n type impurity is previously diffused is formed between an Si substrate 5 and an n type Si layer 1. A doner having large diffusion velocity is diffused in the layer 1 from the layer 6 to form a high density n type layer 7, and part is superposed and formed in a p type region 2. In this manner, the depth of the region 2 is substantially reduced in depth to increase the pinch resistance.
摘要翻译：目的：通过直接在第二导电型层下形成高密度的第一导电型半导体层，从而在不改变扩散过程的情况下形成小图案的高电阻，从而减小尺寸元件。构成：在Si衬底5和n型Si层1之间形成有预先扩散n型杂质的高密度n +型埋层6.在层1中从扩散速度大的扩散层扩散到层1中层6以形成高密度n型层7，并且部分重叠并形成在ap型区域2中。以这种方式，区域2的深度在深度上显着减小以增加夹持电阻。

89. 发明专利

JPS59121966A Manufacture of semiconductor device 失效
标题翻译：半导体器件的制造
公开(公告)号：JPS59121966A
公开(公告)日：1984-07-14
申请号：JP22899682
申请日：1982-12-28
申请人： Nec Corp
发明人： MURASE MASAMICHI
IPC分类号： H01L27/04 , H01L21/822 , H01L29/8605
CPC分类号： H01L29/8605
摘要： PURPOSE:To compensate the variance of layer resistance resulting from a manufacturing process finally, and to improve quality by forming a plurality of opening sections to an insulating film on a resistance region formed on a semiconductor substrate, forming ohmic contactors in the opening sections, measuring the layer resistance of the resistance region and adjusting the length of the ohmic contactor by containing a forming process for the resistance region, a forming process for the opening sections, a measuring process for the layer resistance and a forming process for a conductive layer. CONSTITUTION:One P type diffusion resistance region 2 is formed to the surface of the N type semiconductor substrate 1, and the surface of the region 2 is coated with the first insulating film 13. A plurality of contact through-holes 4 are formed to the first insulating film 13 on the diffusion resistance region 2. The ohmic contactors 15 are formed to a plurality of the contact through-holes 4 sections to measure the layer resistance of the diffusion resistance region 2. A second insulating film 16 is formed on the N type semiconductor substrate 1, contact through-holes 17 are formed to the second insulating film 16 on the ohmic contactors selected as optimum resistance values by measurement, and the conductive layers 18 are formed on the contact through-holes 17, thus completing a resistance element.
摘要翻译：目的：为了最终补偿由制造过程产生的层电阻的变化，并且通过在形成在半导体衬底上的电阻区域上的绝缘膜上形成多个开口部分来提高质量，在开口部分中形成欧姆接触器，测量通过包含用于电阻区域的成形工艺，开口部分的成形工艺，用于层电阻的测量方法和导电层的形成工艺来调节电阻区域的层电阻并调节欧姆接触器的长度。构成：在N型半导体衬底1的表面上形成一个P型扩散电阻区域2，并且区域2的表面涂覆有第一绝缘膜13.多个接触通孔4形成于在扩散电阻区域2上形成第一绝缘膜13.欧姆接触器15形成为多个接触通孔4部分，以测量扩散电阻区域2的层电阻。第二绝缘膜16形成在N 在通过测量被选择为最佳电阻值的欧姆接触器上的第二绝缘膜16上形成接触通孔17，并且在接触通孔17上形成导电层18，从而完成电阻元件。

90. 发明专利

JPS5880858A RESISTOR 失效
公开(公告)号：JPS5880858A
公开(公告)日：1983-05-16
申请号：JP17835181
申请日：1981-11-09
申请人： NIPPON TELEGRAPH & TELEPHONE
发明人： MORI MASAMICHI , KANAMORI SHIYUUICHI
IPC分类号： H01L27/04 , H01L21/822 , H01L29/41 , H01L29/8605
摘要： PURPOSE:To obtain a resistor which can be continuously corrected at its resistance value by forming a planar shape of a regulating region in a projecting shape with narrow width smaller than that of an essential region. CONSTITUTION:The first electrode 12 is contacted through a contacting hole 14 opened at an insulating film 13 coated on the surfaces of a semiconductor layer 11 and a substrate 10 with the first prescribed region 15 at one end of the layer 11, and the second prescribed region 16 of the other end is contacted directly with the second electrode 18 through a contacting hole 17 opened at the film 13. The first region 15 is formed of a rectangular essential region 15a of plane shape and a projected regulating region 15b, and when a large DC current is flowed through a resistor, the current density becomes high at the end 19 of 15b, a ovid is formed in the first electrode 12 of the end 19, and since no current flows through the void, the length of a current path between the first and second electrodes 12 and 18 becomes longer than the length of the void 20, and the resistance value of the resistor becomes large.

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