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81. 发明专利

JP2014170778A Silicon carbide semiconductor device 有权
标题翻译：硅碳化硅半导体器件
公开(公告)号：JP2014170778A
公开(公告)日：2014-09-18
申请号：JP2013040542
申请日：2013-03-01
申请人： Sumitomo Electric Ind Ltd , 住友電気工業株式会社
发明人： MASUDA TAKEYOSHI , WADA KEIJI , HIRATSUKA KENJI
IPC分类号： H01L29/78 , H01L21/336 , H01L21/8234 , H01L27/04 , H01L27/06 , H01L29/06 , H01L29/12 , H01L29/47 , H01L29/872
CPC分类号： H01L21/0495 , H01L29/045 , H01L29/0619 , H01L29/0623 , H01L29/0661 , H01L29/0878 , H01L29/1608 , H01L29/41766 , H01L29/4236 , H01L29/66068 , H01L29/7397 , H01L29/7806 , H01L29/7811 , H01L29/7813 , H01L29/872
摘要： PROBLEM TO BE SOLVED: To provide a silicon carbide semiconductor device that is high in withstanding voltage and small in size.SOLUTION: A silicon carbide film 90 includes a drift layer 81 configuring a first principal surface P1 and having a first conductivity type. The drift layer 81 comprises: a first region 81A configuring the first principal surface P1; and a second region 81B provided on the first region 81A via an interface IF. The interface IF has a center surface FC, and an outer edge surface FT surrounding the center surface FC. The silicon carbide film 90 includes an embedded region partially provided at the interface IF and having a second conductivity type. The embedded region comprises an electric field alleviation region 71 provided on the center surface FC, and a guard ring region 73 provided on the outer edge surface FT. A transistor element and a Schottky barrier diode element are arranged on the center surface FC and on the outer edge surface.
摘要翻译：要解决的问题：提供耐受电压高，尺寸小的碳化硅半导体器件。解决方案：碳化硅膜90包括构成第一主表面P1并具有第一导电类型的漂移层81。漂移层81包括：构成第一主面P1的第一区域81A; 以及经由接口IF设置在第一区域81A上的第二区域81B。接口IF具有中心表面FC和围绕中心表面FC的外边缘表面FT。碳化硅膜90包括部分设置在界面IF处并具有第二导电类型的嵌入区域。嵌入区域包括设置在中心表面FC上的电场缓和区域71和设置在外边缘表面FT上的保护环区域73。晶体管元件和肖特基势垒二极管元件布置在中心表面FC上和外边缘表面上。

82. 发明专利

JP2014160715A Semiconductor device and method of manufacturing the same 有权
标题翻译：半导体器件及其制造方法
公开(公告)号：JP2014160715A
公开(公告)日：2014-09-04
申请号：JP2013030018
申请日：2013-02-19
申请人： Rohm Co Ltd , ローム株式会社
发明人： NAKANO YUUKI
IPC分类号： H01L29/78 , H01L21/336 , H01L29/06 , H01L29/12
CPC分类号： H01L29/4236 , H01L29/0615 , H01L29/0623 , H01L29/0653 , H01L29/0696 , H01L29/1095 , H01L29/1602 , H01L29/1608 , H01L29/2003 , H01L29/407 , H01L29/66045 , H01L29/66068 , H01L29/66613 , H01L29/66734 , H01L29/78 , H01L29/7811 , H01L29/7813
摘要： PROBLEM TO BE SOLVED: To provide a semiconductor device which has a surface metal layer with improved flatness without sacrificing conventional device performance, and to provide a method of manufacturing the semiconductor device.SOLUTION: A semiconductor device 1 includes: an ntype epitaxial layer 13 in which a gate trench 5 is formed; a gate electrode 21 embedded into the gate trench 5; an ntype source region 6, a p-type channel region 16, and an ntype drain region 15 which are formed in the ntype epitaxial layer 13; and a source trench 7 formed in a source portion 30 of the ntype epitaxial layer 13. A trench buried layer 23 is embedded into the source trench 7. In the source portion 30, a ptype channel contact region 8 is formed in a position higher than the bottom of the source trench 7. A source pad 10 in the source portion 30 is electrically connected to the ntype source region 6 and the ptype channel contact region 8.
摘要翻译：要解决的问题：提供一种半导体器件，其具有在没有牺牲常规器件性能的情况下具有改善的平坦度的表面金属层，并且提供一种制造半导体器件的方法。解决方案：半导体器件1包括：n型外延层13，形成栅极沟槽5; 嵌入栅极沟槽5中的栅电极21; 形成在n型外延层13中的n型源极区6，p型沟道区16和n型漏极区15; 以及源极沟槽7，其形成在n型外延层13的源极部分30中。沟槽掩埋层23嵌入到源极沟槽7中。在源极部分30中，p型沟道接触区域8形成在高于源极沟槽7的底部。源极部分30中的源极焊盘10电连接到n型源极区域6和p型沟道接触区域8。

83. 发明专利

JP5579758B2 Fixed for the structure and the fitting structure 有权
公开(公告)号：JP5579758B2
公开(公告)日：2014-08-27
申请号：JP2012015456
申请日：2012-01-27
申请人：インフィネオンテクノロジーズアーゲーInfineon Technologies Ag
发明人：ヒルラーフランツ , リーガーヴァルター , シュマルツバウアーウヴェ , ツェルザッハールドルフ , ツンデルマルクス
IPC分类号： H01L29/78 , H01L21/3205 , H01L21/336 , H01L21/768 , H01L23/522 , H01L29/06
CPC分类号： H01L29/7813 , H01L21/743 , H01L23/535 , H01L29/407 , H01L29/4236 , H01L29/42372 , H01L29/4238 , H01L29/7811 , H01L2924/0002 , H01L2924/00
摘要： An anchoring structure for a metal structure of a semiconductor device includes an anchoring recess structure having at least one overhanging side wall, the metal structure being at least partly arranged within the anchoring recess structure.

84. 发明专利

JP2014150113A Semiconductor device, and method of manufacturing the same 审中-公开
标题翻译：半导体器件及其制造方法
公开(公告)号：JP2014150113A
公开(公告)日：2014-08-21
申请号：JP2013016943
申请日：2013-01-31
申请人： Toyota Motor Corp , トヨタ自動車株式会社
发明人： YAMAZAKI SHINYA
IPC分类号： H01L29/78 , H01L21/336 , H01L29/739
CPC分类号： H01L21/22 , H01L29/0619 , H01L29/0634 , H01L29/0696 , H01L29/1095 , H01L29/66348 , H01L29/66734 , H01L29/7397 , H01L29/7811 , H01L29/7813
摘要： PROBLEM TO BE SOLVED: To provide a technology capable of uniformizing temperature distribution in a semiconductor device while suppressing increase in physical constitution of the semiconductor device.SOLUTION: A semiconductor device comprises a semiconductor substrate to which an element region is formed. The element region comprises: a first conductivity type first region located on a surface side of the semiconductor substrate; a second conductivity type second region located at a position deeper than the first region, and contacted with the first region; a first conductivity type third region located at a position deeper than the second region, contacted with the second region, and separated from the first region by the second region; and a gate arranged in a trench extending from the surface of the semiconductor substrate to the third region, and contacted with the second region in a range that the first region and the third region are separated, via an insulating film. A thickness in a depth direction, of the second region becomes gradually larger from a peripheral part of the element region toward a central part of the element region.
摘要翻译：要解决的问题：提供能够在抑制半导体器件的物理结构的增加的同时在半导体器件中均匀化温度分布的技术。解决方案：半导体器件包括形成有元件区域的半导体衬底。元件区域包括：位于半导体衬底的表面侧的第一导电类型的第一区域; 位于比第一区域更深的位置并与第一区域接触的第二导电类型的第二区域; 位于比第二区域更深的位置的第一导电类型的第三区域，与第二区域接触，并且与第一区域分离第二区域; 以及设置在从半导体衬底的表面延伸到第三区域的沟槽中的栅极，并且经由绝缘膜在与第一区域和第三区域分离的范围内与第二区域接触。第二区域的深度方向的厚度从元件区域的周边部朝向元件区域的中央部逐渐变大。

85. 发明专利

JPWO2012137412A1 半導体装置有权
公开(公告)号：JPWO2012137412A1
公开(公告)日：2014-07-28
申请号：JP2013508733
申请日：2012-03-12
申请人：三菱電機株式会社
发明人：大塚　健一 , 健一大塚 , 寛渡邊 , 寛渡邊
IPC分类号： H01L29/872 , H01L21/027 , H01L21/329 , H01L21/336 , H01L29/06 , H01L29/12 , H01L29/47 , H01L29/78 , H01L29/861 , H01L29/868
CPC分类号： H01L21/26506 , H01L21/046 , H01L23/544 , H01L29/0615 , H01L29/0657 , H01L29/0661 , H01L29/0692 , H01L29/0696 , H01L29/1095 , H01L29/1608 , H01L29/6606 , H01L29/66068 , H01L29/7395 , H01L29/7811 , H01L29/872 , H01L2223/5442 , H01L2223/54426 , H01L2223/54453 , H01L2924/0002 , H01L2924/00
摘要：半導体装置の終端構造を製造する際に、イオン注入の工程またはフォトリソグラフィー工程の数が増加して、製造コストが増加する場合があった。これを解決するために、半導体基板上に形成されたn型のドリフト層と、ドリフト層の表層部に形成された素子領域と、素子領域から所定の間隔をおいて外側のドリフト層にリング状に形成されたリセス部と、リセス部の底部からリセス部の内側にわたって形成され、リセス部のある箇所よりリセス部のない箇所で厚いp型の不純物領域とを備えた半導体装置にする。

86. 发明专利

JP2014138048A Silicon carbide semiconductor device 审中-公开
标题翻译：硅碳化硅半导体器件
公开(公告)号：JP2014138048A
公开(公告)日：2014-07-28
申请号：JP2013005132
申请日：2013-01-16
申请人： Sumitomo Electric Ind Ltd , 住友電気工業株式会社
发明人： WADA KEIJI , MASUDA TAKEYOSHI , HIYOSHI TORU
IPC分类号： H01L29/78 , H01L29/06 , H01L29/12 , H01L29/47 , H01L29/739 , H01L29/861 , H01L29/868 , H01L29/872
CPC分类号： H01L29/0619 , H01L29/0615 , H01L29/0692 , H01L29/0696 , H01L29/1608 , H01L29/6606 , H01L29/66068 , H01L29/7395 , H01L29/7811 , H01L29/872
摘要： PROBLEM TO BE SOLVED: To provide a silicon carbide semiconductor device capable of improving a withstanding voltage without excessively reducing an element region.SOLUTION: A silicon carbide semiconductor device 1 comprises a silicon carbide substrate 10. The silicon carbide substrate 10 consists of an element region IR provided with a semiconductor element part 7, and a terminal end region OR surrounding the element region IR in a plan view. The semiconductor element part 7 includes a drift region 12 of a first conductivity type. The terminal end region OR includes: a first electric field alleviation region 2 of a second conductivity type different from the first conductivity type, contacted with the element region IR; and a second electric field alleviation region 3 arranged outside the first electric field alleviation region in a plan view, and having the second conductivity type, and separated from the first electric field alleviation region 2. A ratio obtained by dividing a width W1 of the first electric field alleviation region 2 by a thickness T of the drift region 12 is 0.5 or more and 1.83 or less.
摘要翻译：要解决的问题：提供能够提高耐受电压而不会过度减少元件区域的碳化硅半导体器件。解决方案：碳化硅半导体器件1包括碳化硅衬底10.碳化硅衬底10由元件区域设置有半导体元件部分7的IR以及在平面图中围绕元件区域IR的终端区域OR。半导体元件部分7包括第一导电类型的漂移区12。末端区域OR包括：与元件区域IR接触的与第一导电类型不同的第二导电类型的第一电场缓和区域2; 以及第二电场缓和区域3，其在俯视图中配置在第一电场缓和区域的外侧，具有第二导电类型，并与第一电场缓和区域2分离。通过将第一电场缓和区域的宽度W1除以电场缓和区域2的漂移区域12的厚度T为0.5以上且1.83以下。

87. 发明专利

JP2014132612A Vertical type power mosfet 有权
标题翻译：垂直型功率MOSFET
公开(公告)号：JP2014132612A
公开(公告)日：2014-07-17
申请号：JP2013000384
申请日：2013-01-07
申请人： Renesas Electronics Corp , ルネサスエレクトロニクス株式会社
发明人： EGUCHI SOJI , NAKAZAWA YOSHITO , TAMAKI TOMOHIRO
IPC分类号： H01L29/78 , H01L21/20 , H01L21/336 , H01L29/06
CPC分类号： H01L29/0619 , H01L29/0626 , H01L29/0634 , H01L29/0696 , H01L29/0878 , H01L29/0886 , H01L29/402 , H01L29/41741 , H01L29/41766 , H01L29/66727 , H01L29/7802 , H01L29/7811
摘要： PROBLEM TO BE SOLVED: To solve the problem in the formation of a superjunction based on a buried epitaxial process, that a taper angle of dry etching in trench formation etching generally is adjusted to create a graded column in order to prevent a withstand voltage from getting lowered by a concentration fluctuation in the buried epitaxial layer, but this method makes device design increasingly difficult as the need for high withstand voltage arises.SOLUTION: The present invention pertains to a vertical type power MOSFET having a superjunction based on a buried epitaxial process, in which a concentration in an intermediate substrate epitaxy type column region in each substrate epitaxy type column region constituting the superjunction is raised to be higher than in other regions of the substrate epitaxy type column region.
摘要翻译：要解决的问题为了解决基于埋入式外延工艺形成超级结的问题，通常调整沟槽形成蚀刻中的干蚀刻的锥角以产生分级柱，以防止耐受电压降低了埋入式外延层中的浓度波动，但是由于需要高耐受电压，这种方法使得器件设计变得越来越困难。解决方案：本发明涉及具有基于掩埋外延工艺的超级结的垂直型功率MOSFET，其中构成超结的每个衬底外延型列区域中的中间衬底外延型列区域中的浓度升高到高于衬底外延型列区域的其它区域中的浓度。

88. 发明专利

JP2014132600A Semiconductor device 审中-公开
标题翻译：半导体器件
公开(公告)号：JP2014132600A
公开(公告)日：2014-07-17
申请号：JP2011088071
申请日：2011-04-12
申请人： Renesas Electronics Corp , ルネサスエレクトロニクス株式会社
发明人： HASHIMOTO TAKAYUKI , MASUNAGA MASAHIRO
IPC分类号： H01L27/04 , H01L21/76 , H01L21/8234 , H01L27/088 , H01L29/739 , H01L29/78 , H02M3/155
CPC分类号： H01L29/7809 , H01L21/823885 , H01L21/823892 , H01L24/48 , H01L24/49 , H01L27/0922 , H01L29/0619 , H01L29/0696 , H01L29/1095 , H01L29/41766 , H01L29/42368 , H01L29/4238 , H01L29/66727 , H01L29/66734 , H01L29/7397 , H01L29/7803 , H01L29/7811 , H01L29/7813 , H01L2224/04042 , H01L2224/0603 , H01L2224/48137 , H01L2224/48247 , H01L2224/48257 , H01L2224/49111 , H01L2224/49171 , H01L2224/49177 , H01L2924/00014 , H01L2924/10253 , H01L2924/12032 , H01L2924/1305 , H01L2924/13055 , H01L2924/13091 , H01L2924/30107 , H01L2924/00 , H01L2924/00012 , H01L2224/45099 , H01L2224/45015 , H01L2924/207
摘要： PROBLEM TO BE SOLVED: To resolve a problem that, although a bouncing voltage is generated at switching in a power system active element having an insulation gate, such as a power MOSFET, used for a power supply or a power conversion device and the like, this bouncing voltage becomes noise for a power-supplied circuit, such as a digital signal processing circuit, which may be a factor of malfunction of a logic circuit and the like.SOLUTION: In a semiconductor device that has a power system active element having an insulation gate such as a power MOSFET, a sub active cell region having a threshold voltage lower than that of the other region and having a relatively narrow occupied area is provided in an active cell region.
摘要翻译：要解决的问题：为了解决在用于电源或电力转换装置等的具有绝缘栅极的功率系统有源元件（例如功率MOSFET）中切换时产生跳动电压的问题，这种弹跳电压成为诸如数字信号处理电路的电力供应电路的噪声，其可能是逻辑电路等的故障的因素。解决方案：在具有电力系统有源元件的半导体器件中，具有诸如功率MOSFET的绝缘栅极，具有阈值电压低于另一区域的阈值电压并且具有相对较窄占用面积的子有源单元区域被提供在有源单元区域中。

89. 发明专利

JP2014130896A Semiconductor device 有权
标题翻译：半导体器件
公开(公告)号：JP2014130896A
公开(公告)日：2014-07-10
申请号：JP2012287323
申请日：2012-12-28
申请人： Toyota Motor Corp , トヨタ自動車株式会社 , Toyota Central R&D Labs Inc , 株式会社豊田中央研究所
发明人： TAKATANI HIDESHI , NAGAO MASARU , SOEJIMA SHIGEMASA
IPC分类号： H01L29/78 , H01L29/06 , H01L29/12
CPC分类号： H01L29/0623 , H01L29/0649 , H01L29/0661 , H01L29/1608 , H01L29/42368 , H01L29/42372 , H01L29/4238 , H01L29/7397 , H01L29/7811 , H01L29/7813 , H01L29/8611
摘要： PROBLEM TO BE SOLVED: To provide an art capable of preventing a damage of a gate pad even when a high voltage is applied to a semiconductor device.SOLUTION: A semiconductor device 10 disclosed in the present specification comprises a semiconductor substrate 11 having an element region 12 and a peripheral region 14 which surrounds the element region 12. In the element region 12, an insulated gate semiconductor element having a gate electrode 16 is formed. In the peripheral region 14, a second breakdown voltage holding structure 18 surrounding the element region 12 and a first breakdown voltage holding structure surrounding the second breakdown voltage holding structure 18 are formed. A gate pad 22 electrically connected with the gate electrode 16 is arranged at a position on a surface side of the semiconductor substrate 11, and on the first breakdown voltage holding structure 20 side over a boundary of the second breakdown voltage holding structure 18 on the element region 12 side, and on the second breakdown voltage holding structure 18 side over a boundary of the first breakdown voltage holding structure 20 on the element region 12 side.
摘要翻译：要解决的问题：提供一种即使在对半导体器件施加高电压时也能够防止栅极焊盘的损坏的技术。解决方案：本说明书中公开的半导体器件10包括具有元件区域的半导体衬底11 12和围绕元件区域12的周边区域14.在元件区域12中，形成具有栅极电极16的绝缘栅极半导体元件。在周边区域14中，形成围绕元件区域12的第二击穿电压保持结构18和围绕第二击穿电压保持结构18的第一击穿电压保持结构。与栅电极16电连接的栅极焊盘22配置在半导体基板11的表面侧的位置，第一击穿电压保持结构20侧的第一击穿电压保持结构18的边界上的元件区域12侧，第二击穿电压保持结构18侧在元件区域12侧的第一击穿电压保持结构体20的边界上。

90. 发明专利

JP5539355B2 A semiconductor device and a method for manufacturing the same power 有权
公开(公告)号：JP5539355B2
公开(公告)日：2014-07-02
申请号：JP2011522623
申请日：2009-07-15
申请人：三菱電機株式会社
发明人：昭裕渡辺 , 修平中田 , 成久三浦
IPC分类号： H01L29/78 , H01L21/336 , H01L29/12
CPC分类号： H01L29/7811 , H01L29/0696 , H01L29/1095 , H01L29/1608 , H01L29/66068

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