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71. 发明专利

JP2014192690A Directional coupler 有权
标题翻译：方向耦合器
公开(公告)号：JP2014192690A
公开(公告)日：2014-10-06
申请号：JP2013066143
申请日：2013-03-27
申请人： Mitsubishi Electric Corp , 三菱電機株式会社
发明人： HIROTA AKEMICHI , OWADA SATORU , IYOMASA KAZUHIRO , WATANABE SHINSUKE , YAMAMOTO KAZUYA
IPC分类号： H01P5/18
CPC分类号： H01P5/187
摘要： PROBLEM TO BE SOLVED: To obtain a directional coupler with a good directivity even in a case where a coupling line impedance becomes lower than a terminal impedance due to restrictions on manufacture.SOLUTION: A directional coupler comprises a first deletion part 1301 provided on a first ground conductor 1201, arranged immediately above a first signal conductor 1001 and a second signal conductor 1002, having a function of delaying a phase, and consisting of a discontinuous structure smaller than 1/4 wavelength of an operation frequency. Thereby, even in a case where a coupling line impedance is smaller than a terminal impedance, although, at an even mode operation, a phase is affected by the first deletion part 1301 and delayed compared with a case where there is no first deletion part 1301, at an odd mode operation, because symmetrical surfaces of the first signal conductor 1001 and the second signal conductor 1002 become electrical walls, a passing phase is not affected by the first deletion part 1301, and not changed. Therefore, because the passing phase at the even mode operation and the passing phase at the odd mode operation can be accorded with each other, the directivity can be improved.
摘要翻译：要解决的问题：即使在由于制造限制而导致耦合线路阻抗变得低于端子阻抗的情况下，也能获得具有良好方向性的定向耦合器。解决方案：定向耦合器包括设置在第一接地导体1201，其布置在第一信号导体1001和第二信号导体1002正上方，具有延迟相位的功能，并且由小于操作频率的1/4波长的不连续结构组成。因此，即使在耦合线路阻抗小于端子阻抗的情况下，尽管在偶数模式操作中，相位受到第一删除部分1301的影响，并且与没有第一删除部分1301的情况相比延迟在奇模式操作中，由于第一信号导体1001和第二信号导体1002的对称表面变成电壁，所以通过相位不受第一删除部分1301的影响，并且不改变。因此，由于偶模式操作中的通过相位和奇数模式操作中的通过相位可以相一致，因此可提高方向性。

72. 发明专利

JP2014033552A Power circuit and power conditioner 审中-公开
标题翻译：电源电路和电源调节器
公开(公告)号：JP2014033552A
公开(公告)日：2014-02-20
申请号：JP2012173275
申请日：2012-08-03
申请人： Mitsubishi Electric Corp , 三菱電機株式会社
发明人： KISHIDA YUKIMORI , YAMAMOTO KAZUYA
IPC分类号： H02M1/08 , H02M3/155 , H02M7/48
CPC分类号： Y02E10/56
摘要： PROBLEM TO BE SOLVED: To provide a power circuit and power conditioner capable of achieving further miniaturization of a power transformer.SOLUTION: The power circuit 10 includes: a power transformer 60; a first gate power circuit 64 that converts an AC power supply from one secondary winding 63 of a plurality of secondary windings into a DC power supply; a switching circuit 71; a plurality of pulse transformers 72-1 to 72-n that are connected in parallel to the output side of the switching circuit 71, are provided by the number corresponding to the number of respective switching elements and insulate high-frequency power converted by the switching circuit 71 for output; and a plurality of second rectification circuits 73-1 to 73-n and a plurality of second smoothing circuits 74-1 to 74-n that convert AC power supply from the respective pulse transformers 72-1 to 72-n into DC power supply and output the DC power supply as gate power supply.
摘要翻译：要解决的问题：提供能够实现电力变压器进一步小型化的电力电路和功率调节器。解决方案：电力电路10包括：电力变压器60; 第一栅极电源电路64，其将来自多个次级绕组的一个次级绕组63的交流电源转换成直流电源; 开关电路71; 与开关电路71的输出侧并联连接的多个脉冲变压器72-1〜72-n由对应于各个开关元件的数量的数量提供，并且将通过开关转换的高频功率绝缘电路71输出; 以及多个第二整流电路73-1至73-n和多个第二平滑电路74-1至74-n，其将来自各个脉冲变压器72-1至72-n的交流电源转换为直流电源，输出直流电源作为门电源。

73. 发明专利

JP2012249231A Power amplifier 有权
标题翻译：功率放大器
公开(公告)号：JP2012249231A
公开(公告)日：2012-12-13
申请号：JP2011121491
申请日：2011-05-31
申请人： Mitsubishi Electric Corp , 三菱電機株式会社
发明人： OKAMURA ATSUSHI , YAMAMOTO KAZUYA , MATSUZUKA TAKAYUKI
IPC分类号： H03F1/02 , H03F1/30 , H03F1/32 , H03F3/24
CPC分类号： H03F3/211 , H03F1/0261 , H03F1/301 , H03F1/302 , H03F1/32 , H03F2200/18 , H03F2200/405 , H03F2200/93
摘要： PROBLEM TO BE SOLVED: To obtain a power amplifier that can sufficiently improve operation efficiency also at the time of medium or low output operation.SOLUTION: Input signals are input to the bases of amplification elements Tr1 and Tr2, collector voltages are applied to collectors, and emitters are grounded. Bias circuits Bias1 and Bias2 supply bias currents to the bases of the amplification elements Tr1 and Tr2. The bias circuits Bias1 and Bias2 include bias current reduction circuits 12 reducing the bias currents when the collector voltages become lower than predetermined threshold values.
摘要翻译：要解决的问题：为了获得在中等或低输出操作时也能够充分提高运行效率的功率放大器。
解决方案：输入信号输入到放大元件Tr1和Tr2的基极，集电极电压施加到集电极，发射极接地。偏置电路Bias1和Bias2向放大元件Tr1和Tr2的基极提供偏置电流。偏置电路Bias1和Bias2包括偏置电流降低电路12，当集电极电压变得低于预定阈值时，降低偏置电流。版权所有（C）2013，JPO＆INPIT

74. 发明专利

JP2012134627A Power amplifier 有权
标题翻译：功率放大器
公开(公告)号：JP2012134627A
公开(公告)日：2012-07-12
申请号：JP2010283156
申请日：2010-12-20
申请人： Mitsubishi Electric Corp , 三菱電機株式会社
发明人： YAMAMOTO KAZUYA , MIYASHITA MIYO , MATSUZUKA TAKAYUKI , MUKAI KENJI
IPC分类号： H03F3/24 , H03G3/10
CPC分类号： H03F3/191 , H03F1/56 , H03F3/193 , H03F2200/15 , H03F2200/18 , H03F2200/211 , H03F2200/222 , H03F2200/318 , H03F2200/387 , H03F2200/411 , H03G1/007
摘要： PROBLEM TO BE SOLVED: To provide a power amplifier with an interstage attenuator which can implement gain switching while suppressing a deterioration in input reflection loss before and after the gain switching, and can implement gain switching while suppressing an increase in phase shift difference before and after the gain switching.SOLUTION: IN, OUT are RF input/output terminals; and Tr1, Tr2 are HBTs (heterojunction bipolar transistors). Fa1, Fa2 are FETs (field effect transistors). Cc1, Cc2 are decoupling capacities; Vc1, Vc2 are collector power terminals of the power stages Tr1, Tr2; Ra1, Ra2, Raa2, Rg1, Rg2 are resistance; Cs1 is an interstage matching capacity; Cp1 is an attenuator parallel capacity; and Vg1, Vg2 are attenuator control terminals. A capacity Ca1 is disposed in series with the resistance Ra1.
摘要翻译：要解决的问题：为了提供具有级间衰减器的功率放大器，其可以在抑制增益切换之前和之后的输入反射损耗的劣化的同时实现增益切换，并且可以在抑制相移差的增加的同时实现增益切换增益切换前后。解决方案：IN，OUT是RF输入/输出端子; Tr1，Tr2是HBT（异质结双极晶体管）。 Fa1，Fa2是FET（场效应晶体管）。 Cc1，Cc2是去耦能力; Vc1，Vc2是功率级Tr1，Tr2的集电极电源端子; Ra1，Ra2，Raa2，Rg1，Rg2为电阻; Cs1是级间匹配能力; Cp1是衰减器并联容量; Vg1，Vg2是衰减器控制端子。电容Ca1与电阻Ra1串联设置。版权所有（C）2012，JPO＆INPIT

75. 发明专利

JP2012120104A Power amplifier 有权
标题翻译：功率放大器
公开(公告)号：JP2012120104A
公开(公告)日：2012-06-21
申请号：JP2010270484
申请日：2010-12-03
申请人： Mitsubishi Electric Corp , 三菱電機株式会社
发明人： UEDA KAZUHIRO , YAMAMOTO KAZUYA , MATSUZUKA TAKAYUKI
IPC分类号： H03F3/24
摘要： PROBLEM TO BE SOLVED: To provide a power amplifier capable of switching between connection and non-connection of a feedback path according to a path to be used without increasing a chip size.SOLUTION: A switch SW1 is an on-input and multi-output switch for connecting an input terminal Tin1 to either one of an output terminal Tout1 and an output terminal Tout2 in response to a control signal. The input terminal Tin1 of the switch SW1 is connected to the collector (an output terminal) of a transistor Tr1. A feedback path 12 connects the output terminal Tout1 of the switch SW1 to the base (an input terminal) of the transistor Tr1.
摘要翻译：要解决的问题：提供一种能够在不增加芯片尺寸的情况下根据要使用的路径在反馈路径的连接和非连接之间进行切换的功率放大器。
解决方案：开关SW1是用于响应于控制信号将输入端子Tin1连接到输出端子Tout1和输出端子Tout2中的任一个的输入和多输出开关。开关SW1的输入端子Tin1连接到晶体管Tr1的集电极（输出端子）。反馈路径12将开关SW1的输出端Tout1连接到晶体管Tr1的基极（输入端）。版权所有（C）2012，JPO＆INPIT

76. 发明专利

JP2011160256A Emitter-follower type bias circuit 审中-公开
标题翻译：发射器 - 型号偏置电路
公开(公告)号：JP2011160256A
公开(公告)日：2011-08-18
申请号：JP2010021073
申请日：2010-02-02
申请人： Mitsubishi Electric Corp , 三菱電機株式会社
发明人： MATSUZUKA TAKAYUKI , YAMAMOTO KAZUYA , ASADA TOMOYUKI
IPC分类号： H03F1/30 , H03F3/19
CPC分类号： H03F3/16
摘要： PROBLEM TO BE SOLVED: To provide an emitter-follower type bias circuit which can operate at a low reference voltage suited to a reference voltage generating circuit using a GaAs BiFET (HBT+FET) process.
SOLUTION: The emitter-follower type bias circuit includes bias circuits Bias1 and Bias2 for supplying bases of amplification stage transistors Tr1 and Tr2 with a bias voltage. This bias circuit includes an Fdb1 which is a depletion-mode FET for boosting the reference voltage and an emitter-follower circuit for generating the bias voltage in response to the reference voltage boosted by the Fdb1. As the depletion-mode FET for boosting the reference voltage is provided, the emitter-follower type bias circuit can operate at the low reference voltage.
COPYRIGHT: (C)2011,JPO&INPIT
摘要翻译：要解决的问题：提供可以使用GaAs BiFET（HBT + FET）工艺在适合于参考电压产生电路的低参考电压下工作的发射极跟随器型偏置电路。发射极跟随器型偏置电路包括用于向放大级晶体管Tr1和Tr2的基极提供偏置电压的偏置电路Bias1和Bias2。该偏置电路包括Fdb1，其是用于升高参考电压的耗尽型FET，以及用于响应于由Fdb1升压的参考电压产生偏置电压的发射极跟随器电路。提供用于升压参考电压的耗尽型FET，发射极跟随器型偏置电路可以在低参考电压下工作。版权所有（C）2011，JPO＆INPIT

77. 发明专利

JP2010124408A Reference voltage generating circuit and bias circuit 有权
标题翻译：参考电压发生电路和偏置电路
公开(公告)号：JP2010124408A
公开(公告)日：2010-06-03
申请号：JP2008298431
申请日：2008-11-21
申请人： Mitsubishi Electric Corp , 三菱電機株式会社
发明人： YAMAMOTO KAZUYA , MIYASHITA MIYO
IPC分类号： H03F1/30
CPC分类号： G05F3/185
摘要： PROBLEM TO BE SOLVED: To provide a reference voltage generating circuit and bias circuit, for suppressing gain variation caused by process variation. SOLUTION: F1-F3 are depression-mode FETs, Tr1-Tr4 are HBTs, R1-R6 are resistors, Vcb is a power supply terminal, Ven is an enable terminal, and Vref is a reference voltage terminal. A threshold voltage compensation circuit includes F3, R5, R6, Tr4. In the case where a threshold voltage Vth of the depression-mode FET is deep, a drawing current I1 of the threshold voltage compensation circuit is increased. Hence, currents flowing in Tr1 and R3 are decreased, which suppresses voltage elevation at a collector end of Tr1. COPYRIGHT: (C)2010,JPO&INPIT
摘要翻译：要解决的问题：提供一种用于抑制由过程变化引起的增益变化的参考电压产生电路和偏置电路。
解决方案：F1-F3为抑制型FET，Tr1-Tr4为HBT，R1-R6为电阻，Vcb为电源端子，Ven为使能端子，Vref为参考电压端子。阈值电压补偿电路包括F3，R5，R6，Tr4。在按压模式FET的阈值电压Vth较深的情况下，阈值电压补偿电路的牵引电流I1增加。因此，在Tr1和R3中流动的电流降低，这抑制了Tr1集电极端的电压上升。版权所有（C）2010，JPO＆INPIT

78. 发明专利

JP2009302859A Power amplifier 有权
标题翻译：功率放大器
公开(公告)号：JP2009302859A
公开(公告)日：2009-12-24
申请号：JP2008154492
申请日：2008-06-12
申请人： Mitsubishi Electric Corp , 三菱電機株式会社
发明人： YAMAMOTO KAZUYA , MIYASHITA MIYO
IPC分类号： H03F3/24 , H03F1/32
CPC分类号： H03F3/191 , H03F1/0261 , H03F3/72 , H03F2200/18 , H03F2200/408 , H03F2203/7239
摘要： PROBLEM TO BE SOLVED: To provide a power amplifier which reduces minimum operation voltage and input/output impedance mismatching in an attenuation mode, increases the degree of freedom in designing, and suppresses the degradation of distortion characteristic only when a large power is input in the attenuation mode.
SOLUTION: A serial resonance circuit SRC is connected between a base of a transistor Tr2 for amplification and a grounding point, and a resonance frequency is set to an operation frequency band of Tr2. A switch SW is connected between the serial resonance circuit SRC and the grounding point. In the amplification mode, a bias circuit B2 supplies a bias current to Tr2, and a first current mirror circuit CM1 turns off first and second diodes Da1 and Da2 and the switch SW is turned off. On the other hand, in the attenuation mode, the bias circuit B2 does not supply the bias current to Tr2, and the first current mirror circuit CM1 turns on the first and second diodes Da1 and Da2 and the switch SW is turned on.
COPYRIGHT: (C)2010,JPO&INPIT
摘要翻译：要解决的问题：为了提供在衰减模式中降低最小工作电压和输入/输出阻抗失配的功率放大器，增加了设计的自由度，并且仅在大功率为输入衰减模式。解决方案：串联谐振电路SRC连接在用于放大的晶体管Tr2的基极和接地点之间，并且谐振频率被设置为Tr2的操作频带。开关SW连接在串联谐振电路SRC和接地点之间。在放大模式中，偏置电路B2向Tr2提供偏置电流，第一电流镜电路CM1截止第一和第二二极管Da1和Da2，并且断开开关SW。另一方面，在衰减模式中，偏置电路B2不向Tr2提供偏置电流，并且第一电流镜电路CM1导通第一和第二二极管Da1和Da2，并且开关SW导通。版权所有（C）2010，JPO＆INPIT

79. 发明专利

JP2009164930A Power amplifier 有权
标题翻译：功率放大器
公开(公告)号：JP2009164930A
公开(公告)日：2009-07-23
申请号：JP2008000976
申请日：2008-01-08
申请人： Mitsubishi Electric Corp , 三菱電機株式会社
发明人： MATSUZUKA TAKAYUKI , YAMAMOTO KAZUYA
IPC分类号： H03F3/24 , H03F3/60
CPC分类号： H03F3/245 , H03F1/0261 , H03F1/302 , H03F1/303 , H03F3/19 , H03F2200/165 , H03F2200/168 , H03F2200/171 , H03F2200/18 , H03F2200/411 , H03F2200/451
摘要： PROBLEM TO BE SOLVED: To obtain a power amplifier which is capable of controlling an idle current of an amplification element in an analog manner in accordance with a control voltage and also switching a bias mode in accordance with the control voltage. SOLUTION: The amplification element Tr1 amplifies an RF signal. An emitter follower section performs constant voltage drive upon the amplification element Tr1 in accordance with a reference voltage applied from the outside to a reference terminal Vref. A current injection section performs constant current drive upon the amplification element Tr1 in accordance with the reference voltage. An analog control section controls, in an analog manner, an output voltage of the emitter follower section in accordance with a control voltage applied from the outside to a control terminal Vcon. A mode switching section switches whether to operate the emitter follower section in accordance with the control voltage. COPYRIGHT: (C)2009,JPO&INPIT
摘要翻译：要解决的问题：获得能够根据控制电压以模拟方式控制放大元件的空闲电流并且还根据控制电压切换偏置模式的功率放大器。解决方案：放大元件Tr1放大RF信号。射极跟随器部分根据从外部施加到参考端子Vref的参考电压对放大元件Tr1执行恒定电压驱动。电流注入部根据参考电压对放大元件Tr1进行恒定电流驱动。模拟控制部分以模拟的方式根据从外部施加到控制端子Vcon的控制电压来控制射极跟随器部分的输出电压。模式切换部分根据控制电压来切换是否操作发射极跟随器部分。版权所有（C）2009，JPO＆INPIT

80. 发明专利

JP2009164908A Power amplifier 有权
标题翻译：功率放大器
公开(公告)号：JP2009164908A
公开(公告)日：2009-07-23
申请号：JP2008000722
申请日：2008-01-07
申请人： Mitsubishi Electric Corp , 三菱電機株式会社
发明人： YAMAMOTO KAZUYA , MIYASHITA MIYO
IPC分类号： H03G3/10 , H03F3/24
CPC分类号： H03F3/191 , H03G1/0052
摘要： PROBLEM TO BE SOLVED: To obtain a power amplifier capable of increasing flexibility in design by reducing a bottom operational voltage and reducing input/output impedance mismatches in an attenuation mode. SOLUTION: An amplifying transistor Tr for amplifying an RF signal is provided between an input terminal and an output terminal. A cathode of a diode Da1 is connected to the input terminal, and an anode of a diode Da2 is connected to the output terminal. A matching and attenuating circuit MA is connected between an anode of the diode Da1 and a cathode of the diode Da2. The matching and attenuating circuit MA reduces impedance mismatches between an input terminal side and an output terminal side and attenuates the RF signal. During an amplification mode, a bias circuit B2 supplies a bias current to the amplifying transistor Tr and a current mirror circuit CM turns off the diodes Da1, Da2. During an attenuation mode, the bias circuit B2 does not supply the bias current to the amplifying transistor Tr and the current mirror circuit CM turns on the diodes Da1, Da2. COPYRIGHT: (C)2009,JPO&INPIT
摘要翻译：要解决的问题：为了获得能够通过降低底部操作电压并降低衰减模式中的输入/输出阻抗失配来提高设计灵活性的功率放大器。解决方案：在输入端子和输出端子之间设置用于放大RF信号的放大晶体管Tr。二极管Da1的阴极连接到输入端子，二极管Da2的阳极连接到输出端子。匹配和衰减电路MA连接在二极管Da1的阳极和二极管Da2的阴极之间。匹配和衰减电路MA减少输入端侧和输出端侧之间的阻抗失配，并且衰减RF信号。在放大模式期间，偏置电路B2向放大晶体管Tr提供偏置电流，电流镜电路CM关断二极管Da1，Da2。在衰减模式期间，偏置电路B2不向放大晶体管Tr提供偏置电流，并且电流镜电路CM导通二极管Da1，Da2。版权所有（C）2009，JPO＆INPIT

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