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51. 发明专利

JPS605552A SEMICONDUCTOR DEVICE 失效
公开(公告)号：JPS605552A
公开(公告)日：1985-01-12
申请号：JP11272983
申请日：1983-06-24
申请人： HITACHI LTD
发明人： YAMAZAKI KOUICHI , OKADA YUTAKA , KANEKO KENJI , WATABE TOMOYUKI , OKABE TAKAHIRO
IPC分类号： H01L21/8226 , H01L21/331 , H01L27/082 , H01L29/72 , H01L29/73 , H01L29/732 , H01L27/08
摘要： PURPOSE:To reduce the collector or emitter position dependency by forming a half of an emitter diffused region coupled to an emitter or a collector electrode with the first side of a base region and the residue with the second side opposed to the first side in walled structures, and forming the both diffused layers with the residual three sides in non-walled structure. CONSTITUTION:The first emitter diffused layer 5 which becomes a walled structure only with the first side of a base region established with an oxidized film 3, and the second emitter diffused layer 5' which becomes a walled structure only with the second side opposed to the first side of the base region are provided, and connected via an electrode 6. One side of the emitter diffused layer is in a walled structure, and the other side is formed in non-walled structure, and since a space is formed between the layers 5 and 5', the sheet resistance of this part can be reduced, and a parasitic base series resistance can be reduced. Since the layers 5, 5' are connected via an electrode, the emitter area observed from the electrode can be, even if masks are displaced, always maintained constant.

52. 发明专利

JPS59171124A Method for burying photoresist film 失效
标题翻译：曝光胶片的方法
公开(公告)号：JPS59171124A
公开(公告)日：1984-09-27
申请号：JP4424683
申请日：1983-03-18
申请人： Hitachi Ltd
发明人： NAKAMURA TOORU , NAKAZATO KAZUO , SUGASHIRO SHIYOUJIROU , HONMA YOSHIO , MIYAZAKI TAKAO , KAMIYAMA TAKAMITSU , OKABE TAKAHIRO , NAGATA MINORU
IPC分类号： H01L21/302 , H01L21/3065
CPC分类号： H01L21/302
摘要： PURPOSE:To simplify the flattening of the surface of a semiconductor substrate by a method wherein, when the semiconductor substrate having roughened surface is going to be flattened, photoresist is buried in the recessed part of the substrate. CONSTITUTION:A photoresist film 22 is provided in a large-sized recess part among the recessed parts generated on a semiconductor substrate 21 giving a little gap on the circumference while the surface is being made even, and an interlayer film 24 consisting of metal or Si is coated on the whole surface including the photoresist film 22 and the small-sized recessed part. Thus, the film 24 is adhered on the bottom face and the wall surface of the recessed part, and a photoresist film 23 is applied on the whole surface filling up the above-mentioned recessed part. Subsequently, an etching is performed until the surface 34 of the film 24 is exposed, and the surface of the substrate 21 is flattened leaving the resist film 23 in the recessed part. Through these procedures, the yield rate when an IC and the like is manufactured can be improved.
摘要翻译：目的：为了简化半导体衬底的表面的平坦化，其中当具有粗糙表面的半导体衬底将变平时，光致抗蚀剂被掩埋在衬底的凹陷部分中。构成：在半导体基板21上产生的凹部中的大尺寸凹部中设置光致抗蚀剂膜22，在表面平坦化的同时在圆周上产生小的间隙，并且由金属或Si构成的中间膜24 涂覆在包括光致抗蚀剂膜22和小尺寸凹部的整个表面上。因此，膜24粘附在凹部的底面和壁面上，并且在填充上述凹部的整个表面上涂布光致抗蚀剂膜23。随后，进行蚀刻，直到膜24的表面34露出，并且使基板21的表面平坦化，使抗蚀剂膜23留在凹部中。通过这些方法，可以提高制造IC等的成品率。

53. 发明专利

JPS59149053A Semiconductor device and manufacture thereof 失效
标题翻译：半导体器件及其制造
公开(公告)号：JPS59149053A
公开(公告)日：1984-08-25
申请号：JP2274383
申请日：1983-02-16
申请人： Hitachi Ltd
发明人： KANEKO KENJI , OKADA YUTAKA , OGURA SADAO , NISHIMURA TAKANORI , KUDOU SATOSHI , NAGATA NOBORU , OKABE TAKAHIRO
IPC分类号： H01L21/8226 , H01L21/331 , H01L27/082 , H01L29/417 , H01L29/72 , H01L29/73
CPC分类号： H01L29/72
摘要： PURPOSE:To form an emitter region and a thick oxide film region for isolating elements through a self-alignment method by one mask in order to remove a restriction on a distance between both a base electrode and an emitter electrode while preventing a short circuit between a collector and an emitter by using a metal as the base electrode and polycrystalline silicon as the emitter electrode in order to reduce base resistance. CONSTITUTION:An impurity is diffused to a P type base region 811 from a polycrystalline silicon layer 813 to form an emitter region 815. Both ends of the emitter region 815 are determined by thin oxide films 802 protruding from both ends of thick oxide films 808. Consequenly, a transistor of non-walled-emitter structure keeping a predetermined distance by interposing P type base regions 812 of shallow junctions between the emitter region 815 and the thick oxide films 808 for isolating elements can be obtained. The whole surface is oxidized to form oxide films 816 while an emitter is diffused, the oxide films 816 are removd partially while using photo-resist films 817 as masks, and base terminal extracting holes 818 are bored. Lastly, a metal 819 for a base terminal electrode is applied to form a pattern, and a bipolar transistor of structure in the figure (s) is acquired.
摘要翻译：目的：通过一个掩模通过自对准方法形成用于隔离元件的发射极区域和厚氧化膜区域，以便消除对基极和发射极之间的距离的限制，同时防止在集电极和发射极通过使用金属作为基极和多晶硅作为发射电极，以降低基极电阻。构成：杂质从多晶硅层813扩散到P型基极区域811以形成发射极区域815.发射极区域815的两端由从厚氧化膜808的两端突出的薄氧化膜802确定。因此，可以获得通过在发射极区域815和用于隔离元件的厚氧化膜808之间插入浅结的P型基极区域812而保持预定距离的非壁 - 发射极结构的晶体管。整个表面被氧化形成氧化物膜816，同时发射极扩散，氧化物膜816被部分地去除，同时使用光刻胶膜817作为掩模，并且基极端子提取孔818是无孔的。最后，施加用于基极端子电极的金属819以形成图案，并且获得图中的结构的双极晶体管。

54. 发明专利

JPS5911644A Manufacture of semiconductor device 失效
标题翻译：半导体器件的制造
公开(公告)号：JPS5911644A
公开(公告)日：1984-01-21
申请号：JP11994782
申请日：1982-07-12
申请人： Hitachi Ltd
发明人： OKADA YUTAKA , KANEKO KENJI , YAMAZAKI KOUICHI , OKABE TAKAHIRO , NAGATA MINORU
IPC分类号： H01L21/8226 , H01L21/331 , H01L21/76 , H01L21/762 , H01L27/082 , H01L29/73 , H01L29/78
CPC分类号： H01L21/76202
摘要： PURPOSE:To form a high density impurity region at the desired position on the circumferential part of an active area by a method wherein impurities are doped at the prescribed position on a semiconductor region by performing a self-alignment method using a mask material pattern as a mask, and a thick oxide film region is formed by performing a selective oxidation. CONSTITUTION:A P type region 13 can be formed on the circumference of the region which will be turned to the active area of a transistor when a thick oxide film 10 is formed at the part which is not covered by a nitride film 102 when an oxidation is performed. A P type base region 4 is formed by removing the nitride film 102. Besides, after an oxide film 11 has been deposited, an emitter region 5 is formed, and metal electrodes 7 and 8 for base and emitter are formed. As the region 13 is formed by performing a self-matching method, no increase is made in transistor area, thereby producing an excellent effect in a high degree. Besides, the impurities on the circumference of the base region 4 can be formed in high density by having the region 13.
摘要翻译：目的：通过使用掩模材料图案作为自对准方法进行自对准方法，通过在半导体区域上的规定位置掺杂杂质的方法，在有源区的圆周部分的期望位置处形成高密度杂质区域掩模，并且通过进行选择性氧化形成厚的氧化膜区域。构成：当氧化为氧化膜时，在未被氮化物膜102覆盖的部分形成厚氧化膜10时，AP型区域13可以形成在将被转向晶体管的有源区域的区域的圆周上执行。通过去除氮化物膜102来形成P型基区4.此外，在沉积氧化物膜11之后，形成发射区5，形成用于基极和发射极的金属电极7和8。由于通过执行自匹配方法形成区域13，所以在晶体管区域中不会增加，从而在高度上产生优异的效果。此外，通过具有区域13，可以高密度地形成基底区域4的圆周上的杂质。

55. 发明专利

JPS58159294A SEMICONDUCTOR STORAGE DEVICE 失效
公开(公告)号：JPS58159294A
公开(公告)日：1983-09-21
申请号：JP4078682
申请日：1982-03-17
申请人： HITACHI LTD
发明人： KANEKO KENJI , OKABE TAKAHIRO , NAGATA MINORU
IPC分类号： G11C11/411 , G11C11/416 , H01L21/8229 , H01L27/102
摘要： PURPOSE:To prevent malfunction of a storage device, by providing a load element for a bit line, holding the potential of the bit line higher than the potential of a word line to operate inversely a transistor (TR) connected to the bit line. CONSTITUTION:The bit line Bi is provided with the load element (such as resistor and nonlinear element) and the potential of the bit line Bi is kept higher than the potential of the word line W2 at the lower side at all times at readout. Thus, TRs N1B, N2B are inverted, no current flows to the bit line but the current is absorbed conversely from the bit line, allowing to prevent the destruction of information on cells.

56. 发明专利

JPS5875847A SEMICONDUCTOR DEVICE 失效
公开(公告)号：JPS5875847A
公开(公告)日：1983-05-07
申请号：JP17306381
申请日：1981-10-30
申请人： HITACHI LTD
发明人： SAKAMOTO MITSUZOU , WATABE TOMOYUKI , OKABE TAKAHIRO , NAGATA MINORU
IPC分类号： H01L27/04 , H01L21/3205 , H01L21/822 , H01L23/52
摘要： PURPOSE:To enable to form a crossunder and emitter diffused resistor even with an emitter diffused layer formed by a washed emitter method or an ion implantation method by forming insulating layers in double. CONSTITUTION:N type buried layers 2A-2C and an N type epitaxial layer 3 are formed, for example, on a P type substrate 1, and elements are isolated via an etching groove 100. A P type diffused layer 5 is formed by base diffusion, and a high density N type layer 6 is formed simultaneously upon emitter diffusion of an N-P-N type transistor. An insulating layer 8 made of thermosetting resin such as PIQ is formed on the thin layer 4 formed to the completion of the emitter diffusion. An electrode lead port is formed at the insulating layer, thereby forming wirings 9A, 9B, 9C. In this manner, a crossunder can be completed.

57. 发明专利

JPS5873156A SEMICONDUCTOR DEVICE 失效
公开(公告)号：JPS5873156A
公开(公告)日：1983-05-02
申请号：JP17144381
申请日：1981-10-28
申请人： HITACHI LTD
发明人： NAKAZATO KAZUO , NAKAMURA TOORU , MATSUDA MASATOSHI , MIYAZAKI TAKAO , KURE TOKUO , OKABE TAKAHIRO , NAGATA MINORU
IPC分类号： H01L21/8222 , H01L21/033 , H01L21/3205 , H01L21/331 , H01L27/06 , H01L29/423 , H01L29/70 , H01L29/72 , H01L29/73 , H01L29/732 , H01L29/735
摘要： PURPOSE:To flatten the surface of a semiconductor device by a method wherein metal electrodes are provided having the same height, and insulating films are formed in a part of regions between the metal electrodes thereof. CONSTITUTION:An N type buried layer 22 is formed on a P type Si substrate 21. Then an oxide film 27 is formed on the substrate 21, opening parts are formed in the film 27 thereof, and N type regions 23, P type regions 24, and N type regions 25 consisting of epitaxial layers are formed in the opening parts thereof. At a bipolar transistor TR formed by this way, a semiconductor region 211 under a collector electrode 20' of the vertical transistor TR is formed with an Si epitaxial layer the same with the active regions 23-25 of the TR. Insulating layers 210 are formed between electrodes by oxidizing polycrystalline semiconductor layers the same with a base electrode 28. Accordingly metal electrodes 20, 20' are made to have the same height, and the surfaces of the active regions of the semiconductor device can be flattened. As a result, structure suitable for a multilayer wiring can be formed.

58. 发明专利

JPS5873149A SEMICONDUCTOR DEVICE 失效
公开(公告)号：JPS5873149A
公开(公告)日：1983-05-02
申请号：JP17144481
申请日：1981-10-28
申请人： HITACHI LTD
发明人： NAKAMURA TOORU , NAKAZATO KAZUO , OKADA YUTAKA , OKABE TAKAHIRO , NAGATA MINORU
IPC分类号： H01L21/8226 , H01L27/02 , H01L27/082
摘要： PURPOSE:To arbitrarily determine the switching speed of each transistor of the titled semiconductor device by a method wherein the current running to each transistor of an I L circuit is controlled by varying the width of the base region opposing to an injector. CONSTITUTION:Regions of n type 36, 361 and 362 are provided between a p type injector region 31 and a p type base region 32, and the current running into the region 32 is controlled. Besides, the aperture part of said regions is located in the vicinity of collector regions 33-35, and the lag time of each transistor TR is controlled by changing the length W1-W3. The I L circuit is operated, as shown in an aequivalent circuit, in the form wherein the collector region of a pnp TR is directly connected to the base of npn TR, because the base regions in the vicinity of each collector region are opposing to an injector region with the width of W1, W2 or W3. As a result, the resistance of the base is reduced, and the switching speed is increased even for the TR which is located farther than a base electrode 37. Also, if the W1 of the nearby TR is narrowed, a switching speed slower than the TR located in the distance can be obtained.

59. 发明专利

JPS5813046B2 失效
公开(公告)号：JPS5813046B2
公开(公告)日：1983-03-11
申请号：JP847476
申请日：1976-01-30
申请人： HITACHI LTD
发明人： KOBAYASHI TOORU , OKABE TAKAHIRO , KANEKO KENJI
IPC分类号： H03K3/2893 , H03K17/30

60. 发明专利

JPS57197835A SEMICONDUCTOR DEVICE 失效
公开(公告)号：JPS57197835A
公开(公告)日：1982-12-04
申请号：JP8301982
申请日：1982-05-19
申请人： HITACHI LTD
发明人： OKADA YUTAKA , OKABE TAKAHIRO , WATANABE TOMOYUKI , KANEKO KENJI , NAKAMURA TOORU
IPC分类号： H01L27/082 , H01L21/331 , H01L21/761 , H01L21/8226 , H01L27/02 , H01L29/73
摘要： PURPOSE:To allow the isolation of an NPN (or PNP) transistor, by surrounding a base region of an inverse NPN (or PNP) transistor on the same island region as I L circuit by the same conductive type region reduced down to earth potential. CONSTITUTION:Emitters 6, 6', bases 1, 1' and collector 5 of inverse NPN transistors are formed on a semiconductor substrate 7 with the base region 1 perfectly surrounded by the same P type semiconductor region 3 as this region being reduced to earth potential. The high potential of the region 1 with hole injection is absorbed into the region 3 not reaching the region 1' without interference between the regions 1, 1'.

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