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41. 发明专利

JPH08202532A MULTIPLYING CIRCUIT 失效
公开(公告)号：JPH08202532A
公开(公告)日：1996-08-09
申请号：JP3178995
申请日：1995-01-30
申请人： HITACHI LTD
发明人： HIROSE YUKIO , KINUGASA TOSHIRO
IPC分类号： G06F7/53 , G06F7/508 , G06F7/52 , G06F7/527
摘要： PURPOSE: To shorten the cycle time at the time of continuous multiplication by providing a latch circuit which is provided between addition parts of successive stages and inputs and holds output signals of addition parts of respective corresponding stages or specific stages according to a latch control signal. CONSTITUTION: This multiplying circuit is equipped with 16 AND gates G1-GG which receive the respective bits of input signals a0 -a3 of four bits constituting a multiplier and the respective bits of input signals b0 -b3 of four bits constituting a multiplicand in specific combination, and four stages of addition parts AD1-AD4 which are coupled logically in series through three stages of latch circuits L11-L1$G, L21-L2D, and L31-L3A. Then the output signal of the AND gate G1 which receives the 0th bit a0 of the multiplier and the 0th bit b6 of the multiplicand is sent to the latch circuit L11 through the buffer circuit B11 of the addition part AD1, and the output of the latch circuit 11 is sent to the latch circuit L21 through the buffer circuit B21 and similarly passed through the buffer circuit B41 eventually to become the 0th bit P0 of the multiplication result.

42. 发明专利

JPH08161151A ADDER 失效
公开(公告)号：JPH08161151A
公开(公告)日：1996-06-21
申请号：JP29846094
申请日：1994-12-01
申请人： MITSUBISHI ELECTRIC CORP
发明人： MORINAKA HIROYUKI
IPC分类号： G06F7/50 , G06F7/507 , G06F7/508
摘要： PURPOSE: To reduce the hardware quantity of one adder to be used for a carry selecting system and power consumption. CONSTITUTION: This adder is provided with a 2nd exclusive OR element 39 for receiving an output result from a 1st exclusive OR element 2 and a generate signal Gi-1 to be a carry generating signal, executing exclusive OR operation and outputting its operation result as SiO and a 3rd exclusive OR element 40 for receiving an output result from the element 39 and a propagate signal Pi-1 to be a carry propagating signal, executing exclusive OR operation and outputting its operation result as Si1.

44. 发明专利

JPH07122846B2 失效
公开(公告)号：JPH07122846B2
公开(公告)日：1995-12-25
申请号：JP50736891
申请日：1991-03-29
申请人： INTAANASHONARU BIJINESU MASHIINZU CORP
发明人： UASHIRIIDEISU SUTAMATEISU , FUIRITSUPUSU JEEMUZU EDOWAADO
IPC分类号： G06F7/00 , G01N33/04 , G01N33/44 , G06F7/50 , G06F7/508 , G06F7/575 , G06F9/302 , G06F9/38

45. 发明专利

JPH07120271B2 失效
公开(公告)号：JPH07120271B2
公开(公告)日：1995-12-20
申请号：JP10582187
申请日：1987-04-28
IPC分类号： G06F7/499 , G01R31/3185 , G06F7/00 , G06F7/50 , G06F7/506 , G06F7/508 , G06F11/00 , G06F11/267

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