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41. 发明专利

JP2009239050A Protection circuit 有权
标题翻译：保护电路
公开(公告)号：JP2009239050A
公开(公告)日：2009-10-15
申请号：JP2008083734
申请日：2008-03-27
申请人： Nec Electronics Corp , Necエレクトロニクス株式会社
发明人： SAWAHATA KOICHI
IPC分类号： H01L21/822 , H01L27/04 , H01L27/06 , H01L29/74
CPC分类号： H01L27/0262
摘要： PROBLEM TO BE SOLVED: To provide a thyristor type protection circuit which is triggered fast when applied with static electricity and hardly latched up in normal use. SOLUTION: The protection circuit is provided between a first terminal and a second terminal and includes: a capacitor element having one end connected to the second terminal; and a multi-cathode thyristor formed on a semiconductor substrate, and including an anode connected to the first terminal, a first cathode connected to the second terminal, and a second cathode disposed between the anode and the first cathode and connected to another terminal of the capacitor element, a thyristor operation starting between the anode and second cathode inducing a thyristor operation between the anode and first cathode. COPYRIGHT: (C)2010,JPO&INPIT
摘要翻译：要解决的问题：提供一种在施加静电时快速触发的晶闸管型保护电路，并且在正常使用中几乎不被锁定。解决方案：保护电路设置在第一端子和第二端子之间，并且包括：电容器元件，其一端连接到第二端子; 以及形成在半导体衬底上的多阴极晶闸管，并且包括连接到第一端子的阳极，连接到第二端子的第一阴极和设置在阳极和第一阴极之间的第二阴极，并且连接到第二阴极的另一端子电容器元件，从阳极和第二阴极之间开始的晶闸管操作引起阳极和第一阴极之间的晶闸管操作。版权所有（C）2010，JPO＆INPIT

42. 发明专利

JP2009123751A Semiconductor integrated circuit 有权
标题翻译：半导体集成电路
公开(公告)号：JP2009123751A
公开(公告)日：2009-06-04
申请号：JP2007293233
申请日：2007-11-12
申请人： Nec Electronics Corp , Necエレクトロニクス株式会社
发明人： OKUJIMA MOTOTSUGU
IPC分类号： H01L27/06 , H01L21/822 , H01L21/8238 , H01L27/04 , H01L27/092
CPC分类号： H01L27/0262
摘要： PROBLEM TO BE SOLVED: To provide a semiconductor integrated circuit capable of simultaneously achieving reduction in the resistance value of a path in which an output signal is output and the certainty of the trigger of an ESD protection element, having a low output capacitance.
SOLUTION: The semiconductor integrated circuit includes an output pad 12, a VSS pad 13, an output driver 16 having an NMOS transistor N1 connected between the output pad 12 and the VSS pads 13, a resistive element Rn connected in series with the NMOS transistor N1 between the output pad 12 and the VSS pad 13, a thyristor 14 which is connected to the output pad 12 and which has the function of discharging surge applied to the output pad 12, and an NMOS transistor N3 which is used as a trigger element for generating a trigger for operating the thyristor 14. The NMOS transistor N3 detects a voltage generated in the resistive element Rn in a gate and generates the trigger in response to the detected voltage.
COPYRIGHT: (C)2009,JPO&INPIT
摘要翻译：要解决的问题：提供一种半导体集成电路，其能够同时实现输出信号输出的路径的电阻值和具有低输出电容的ESD保护元件的触发的确定性。解决方案：半导体集成电路包括输出焊盘12，VSS焊盘13，连接在输出焊盘12和VSS焊盘13之间的NMOS晶体管N1的输出驱动器16，与输出焊盘12和VSS焊盘13之间的NMOS晶体管N1，连接到输出焊盘12并具有放电施加到输出焊盘12的浪涌功能的晶闸管14和用作用于产生用于操作晶闸管14的触发器的触发元件.NMOS晶体管N3检测在栅极中的电阻元件Rn中产生的电压，并根据检测到的电压产生触发。版权所有（C）2009，JPO＆INPIT

43. 发明专利

JP2009111353A High speed trigger esd protection device and method of designing same 审中-公开
标题翻译：高速触发器ESD保护装置及其设计方法
公开(公告)号：JP2009111353A
公开(公告)日：2009-05-21
申请号：JP2008233636
申请日：2008-09-11
申请人： Interuniv Micro Electronica Centrum Vzw , アンテルユニヴェルシテール・ミクロ−エレクトロニカ・サントリュム・ヴェー・ゼッド・ドゥブルヴェInteruniversitair Micro−Elektronica Centrum Vzw
发明人： THIJS STEVEN , TREMOUILLES DAVID ERIC
IPC分类号： H01L21/822 , H01L21/82 , H01L27/04 , H01L27/06 , H01L29/74
CPC分类号： H01L27/0262 , H01L29/0649 , H01L29/7391 , H01L29/7436 , H01L29/861 , H03K17/08144 , H03K17/305
摘要： PROBLEM TO BE SOLVED: To provide an ESD protection device that reduces overshoot appeared in IC, and to provide a method of designing the device. SOLUTION: This invention relates to the method of designing an ESD protection circuit including a main ESD device 10 and trigger device 20 connected to a trigger node of the main ESD device so that an ESD current is passed therein by a reduced voltage. The trigger device 20 is disposed in a first current route for the ESD current. At least one trigger element that is triggered from off to on is included in the first current route. The design of the ESD protection circuit is optimized so that the increase of the trigger speed is achieved taking the trigger speed of the element into consideration. Further, this invention relates to the ESD protection circuit where at least one trigger element is selected from a predetermined type of diode or preferably a gate diode so that high trigger speed is obtained. COPYRIGHT: (C)2009,JPO&INPIT
摘要翻译：要解决的问题：提供减少IC中出现的过冲的ESD保护装置，并提供一种设计该装置的方法。解决方案：本发明涉及一种设计ESD保护电路的方法，该ESD保护电路包括连接到主ESD器件的触发节点的主ESD器件10和触发器件20，使得ESD电流通过降低的电压而通过。触发装置20设置在用于ESD电流的第一电流路径中。从off到on触发的至少一个触发元素被包括在第一当前路由中。优化了ESD保护电路的设计，使得考虑到元件的触发速度来实现触发速度的提高。此外，本发明涉及ESD保护电路，其中从预定类型的二极管或优选地选择栅极二极管中选择至少一个触发元件，从而获得高的触发速度。版权所有（C）2009，JPO＆INPIT

45. 发明专利

JP4146672B2 Electrostatic protection element 有权
公开(公告)号：JP4146672B2
公开(公告)日：2008-09-10
申请号：JP2002174699
申请日：2002-06-14
申请人：シャープ株式会社
发明人：オー．アダンアルベルト , 賢一東
IPC分类号： H01L21/822 , H01L27/04 , H01L21/8238 , H01L27/02 , H01L27/06 , H01L27/092 , H01L29/739 , H01L29/74
CPC分类号： H01L27/0262 , H01L29/7391 , H01L29/7436 , H01L29/87 , H01L2924/0002 , H01L2924/00
摘要： A semiconductor device for electrostatic discharge protection in a semiconductor integrated circuit having MOSFETs, comprising a thyristor (1',2,4-7) and a trigger diode (D;2,8,9,11) for triggering the thyristor into an ON-state, wherein the trigger diode has an n-type cathode high concentration impurity region (9), a p-type anode high concentration impurity region (8) and a gate electrode (14) formed between the two high concentration impurity regions, the gate electrode being composed of the same material as that of a gate electrode of a MOSFET comprised in the semiconductor integrated circuit, and wherein the thyristor has a p-type high concentration impurity region (4) that forms an anode and an n-type high concentration impurity region (6) that forms a cathode, and a p-type high concentration impurity region (7) in a p well (1') and connected to a resistor and/or an n-type high concentration impurity region (5) provided in an n well (2) and connected to a resistor.

46. 发明专利

JP2008130994A Electrostatic protection circuit 审中-公开
标题翻译：静电保护电路
公开(公告)号：JP2008130994A
公开(公告)日：2008-06-05
申请号：JP2006317519
申请日：2006-11-24
申请人： Toshiba Corp , 株式会社東芝
发明人： SUGAWARA TAKESHI
IPC分类号： H01L21/822 , H01L27/04 , H01L27/06
CPC分类号： H03K17/725 , H01L27/0262
摘要： PROBLEM TO BE SOLVED: To provide an electrostatic protection circuit whose trigger voltage value can be adjusted after its manufacturing.
SOLUTION: The electrostatic protection circuit consists of a discharge circuit section 11, a trigger circuit section 12A and a trigger control circuit section 13. The discharge circuit section 11 is connected to a predetermined node of the semiconductor device, and performs discharging when surge voltage is applied to the predetermined node. The trigger circuit section 12A triggers the discharge circuit section 11 and makes the discharge circuit section 11 start discharge performance. The trigger control circuit section 13 adjusts the trigger voltage value when the trigger circuit section 12A makes the discharge circuit section 11 start the discharge performance.
COPYRIGHT: (C)2008,JPO&INPIT
摘要翻译：要解决的问题：提供其制造后可以调整其触发电压值的静电保护电路。
解决方案：静电保护电路由放电电路部分11，触发电路部分12A和触发控制电路部分13组成。放电电路部分11连接到半导体器件的预定节点，并执行放电浪涌电压被施加到预定节点。触发电路部12A触发放电电路部11，使放电电路部11开始放电性能。当触发电路部分12A使放电电路部分11开始放电性能时，触发控制电路部分13调节触发电压值。版权所有（C）2008，JPO＆INPIT

48. 发明专利

JP2007523476A Circuit device and method for protecting an integrated semiconductor circuit 有权
公开(公告)号：JP2007523476A
公开(公告)日：2007-08-16
申请号：JP2006552569
申请日：2005-02-14
申请人：オーストリアマイクロシステムズアクチエンゲゼルシャフトaustriamicrosystems AG
发明人：ホイェツキーパヴェル , ドイチュマンベルント , ファンクハウザーベルント , マイアーホーファーミヒャエル
IPC分类号： H01L21/822 , H01L21/8238 , H01L27/02 , H01L27/04 , H01L27/06 , H01L27/092
CPC分类号： H01L27/0262
摘要：サイリスタストラクチャ（ＳＣＲ）を備えている保護回路を含んでおり並びに保護回路のドライブ制御のための制御回路（ＴＣ；Ｃ１，Ｒ１，Ｉ１ないしＩ３）を含んでおり、これらは両方とも保護すべきエレメント（ＰＶ，ＬＶ）と基準電位（ＶＢ）との間に介挿されており、制御回路（ＴＣ；Ｃ１，Ｒ１，Ｉ１ないしＩ３）は複数の制御信号を生成し、該制御信号がそれぞれサイリスタストラクチャのアクティブエレメント（Ｔ１，Ｔ２）をドライブ制御するという、集積半導体回路を保護するための回路装置並びに方法が提案される。これにより、保護回路の所期のトリガが規定のスイッチングしきい値および短い導通切り換え時間において実現される。更に制御回路の活性化の持続時間を決定するための形態が提案される。

49. 发明专利

JP2006319330A Device for protecting from electrostatic discharge 审中-公开
标题翻译：静电放电保护装置
公开(公告)号：JP2006319330A
公开(公告)日：2006-11-24
申请号：JP2006127688
申请日：2006-05-01
申请人： Samsung Electronics Co Ltd , 三星電子株式会社Samsung Electronics Co.,Ltd.
发明人： JEON CHAN-HEE , IM KYOUNG SIK
IPC分类号： H01L27/04 , H01L21/822 , H01L21/8238 , H01L27/06 , H01L27/092
CPC分类号： H01L29/7436 , H01L27/0262 , H01L27/0921 , H01L29/87
摘要： PROBLEM TO BE SOLVED: To provide a device for protecting from electrostatic discharge, having an advantage of capacitating for a large amount of electric charge to be supplied instantaneously in a low impedance state, as in a silicon-controlled rectifier, and also having a structure configured to have a high holding voltage.
SOLUTION: The device has a PNPN junction structure, having a diffusion layer of a second conductive type, formed in a well of a first conductive type and a diffusion layer of a first conductive type, formed in a well of a second conductive type, with an external resistor being connected to one of the wells to allow limiting a current between an anode and a cathode. Because the current between the anode and the cathode is limited to enhance the ON-resistance and raise the holding voltage during a snap-back operation, this device can be utilized not only as a device for protecting from electrostatic discharge adapted as an input/output pad, but also as an electrical source pad.
COPYRIGHT: (C)2007,JPO&INPIT
摘要翻译：要解决的问题：为了提供一种用于防止静电放电的装置，具有以低阻抗状态瞬时供给的大量电荷的电容的优点，如在可控硅整流器中，以及具有构造成具有高保持电压的结构。解决方案：该器件具有PNPN结结构，其具有形成在第一导电类型的阱中的第二导电类型的扩散层和形成在第二导电类型的阱中的第一导电类型的扩散层的扩散层类型，外部电阻器连接到其中一个阱以允许限制阳极和阴极之间的电流。由于阳极和阴极之间的电流被限制以增强导通电阻并且在快速恢复操作期间提高保持电压，所以该器件不仅可以用作防止静电放电的装置，适合作为输入/输出垫，而且作为电源垫。版权所有（C）2007，JPO＆INPIT

50. 发明专利

JP2006278899A Electrostatic protective circuit, and semiconductor device including the same 有权
标题翻译：静电保护电路和包括其的半导体器件
公开(公告)号：JP2006278899A
公开(公告)日：2006-10-12
申请号：JP2005098552
申请日：2005-03-30
申请人： Oki Electric Ind Co Ltd , 沖電気工業株式会社
发明人： KURODA SHUNICHI , HAYASHI YOICHI , FUKUDA YASUHIRO
IPC分类号： H01L27/04 , H01L21/822 , H01L21/8222 , H01L21/8238 , H01L21/8248 , H01L27/06 , H01L27/092
CPC分类号： H01L27/0262
摘要： PROBLEM TO BE SOLVED: To provide an electrostatic protective circuit 100 for positively applying a surge current due to electrostatic discharge (ESD) applied to an output pad Vout to a low-potential line Vss without depending on the number of bits of an input/output signal, and a semiconductor device including the electrostatic protective circuit 100. SOLUTION: Even if the number of bits of an input/output signal is the theoretical maximum value, i. e. 1, a thyristor operation guaranteeing circuit 120 including a first capacitive element C1 connected between a high-potential line Vdd and a low potential line Vss always guarantees a constant sufficient capacity without depending on the number of bits of the input/output signal. Thus, the surge current due to the electrostatic discharge (ESD) applied to the output pad Vout is input into the first capacitive element C1, and the element C1 is changed. Accordingly, using a current based on the surge current, a thyristor rectifying current 110 starts a thrysistor operation. In this way, since the surge current flows to the low-potential line Vss via the thyristor rectifying circuit 110, a CMOS inverter 300 as an internal circuit to be protected is effectively protected from the surge current. COPYRIGHT: (C)2007,JPO&INPIT
摘要翻译：要解决的问题：提供一种静电保护电路100，用于将由于施加到输出焊盘Vout的静电放电（ESD）的浪涌电流积极地施加到低电位线Vss，而不依赖于输入/输出信号和包括静电保护电路100的半导体器件。解决方案：即使输入/输出信号的位数是理论最大值，即如图1所示，包括连接在高电位线Vdd和低电位线Vss之间的第一电容元件C1的晶闸管操作保证电路120始终保证恒定的足够的容量，而不依赖于输入/输出信号的位数。因此，施加到输出焊盘Vout的静电放电（ESD）引起的浪涌电流被输入到第一电容元件C1中，并且元件C1被改变。因此，使用基于浪涌电流的电流，晶闸管整流电流110开始晶体管工作。以这种方式，由于浪涌电流经由晶闸管整流电路110流向低电位线Vss，所以作为被保护的内部电路的CMOS反相器300被有效地保护免受浪涌电流的影响。版权所有（C）2007，JPO＆INPIT

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