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    • 45. 发明专利
    • Micromirror element
    • MICROMIRROR元素
    • JP2005326620A
    • 2005-11-24
    • JP2004144552
    • 2004-05-14
    • Fujitsu Ltd富士通株式会社
    • XIAOYU MISONETA HIROMITSUUEDA TOMOSHISAWAKI IPPEI
    • B81B3/00B81B7/00G02B26/08
    • B81B7/0006B81B2201/042G02B26/0841
    • PROBLEM TO BE SOLVED: To provide a micromirror element with which the upsizing of the element due to an increase in the number of mirror faces is suppressed and the operation condition of the mirror faces is appropriately detected. SOLUTION: The micromirror element X1 is provided with a frame part 130, a movable parts 110 and 120 having a mirror part, a micromirror substrate 100 on which the frame part 130 and a torsion bar 150 connecting the movable parts 110 and 120 are formed, a wiring substrate 200 on which a wiring pattern 210 is formed, and a conductive spacer 300 for separating the micromirror substrate 100 and the wiring substrate 200 and electrically connecting the frame part 130 and the wiring pattern 210. The wiring substrate 200 has a first face 201 facing to the micromirror substrate 100, and a detection means 400 for detecting the turning angle of the mirror part is provided on the first face 201. COPYRIGHT: (C)2006,JPO&NCIPI
    • 要解决的问题:提供一种微镜元件,通过该微镜元件抑制由于镜面数量的增加引起的元件的尺寸增大,并且适当地检测了镜面的操作条件。 解决方案:微镜元件X1设置有框架部分130,具有镜部分的可移动部分110和120,微镜基板100,框架部分130和连接可动部分110和120的扭杆150 形成有布线图案210的布线基板200和用于分离微镜基板100和布线基板200并电连接框架部130和布线图案210的导电间隔件300.布线基板200具有 面对着微反射镜基板100的第一面201和检测反射镜部的转动角度的检测装置400设置在第一面201上。(C)2006,JPO&NCIPI
    • 46. 发明专利
    • Mems device employing soi wafer, its fabrication process and grounding method
    • 采用SOI WAFER的MEMS器件及其制造工艺及接地方法
    • JP2005197266A
    • 2005-07-21
    • JP2003182519
    • 2003-06-26
    • Samsung Electro Mech Co Ltd三星電機株式会社
    • PARK KYU YEONKIM KI HOON
    • G01P15/00B81B7/00G01P15/08H01L21/00H01L27/01H01L27/12H01L29/84H01L31/0392
    • B81B7/0006
    • PROBLEM TO BE SOLVED: To provide an MEMS (Micro-Electro Mechanical Systems, hereinafter referred to as "MEMS") device employing such an SOI (Silicon on Insulator) wafer as the ground hole of the device and a handle wafer are coupled electrically through a simple process without requiring any extra step, and also to provide its fabrication process and grounding method.
      SOLUTION: The MEMS device 40 sandwiching an insulation layer between upper and lower silicon layers comprises: a first silicon layer 41; an insulation layer 42 formed on the first silicon layer 41; a second silicon layer 43 formed on the insulation layer 42; a protective layer 44 formed on the second silicon layer 43; and a ground hole GGH extending from the upper end part of the protective layer 44 to a part of the first silicon layer 41 with a conductor substance CM being formed internally.
      COPYRIGHT: (C)2005,JPO&NCIPI
    • 要解决的问题:为了提供使用这种SOI(绝缘体上硅)晶片的MEMS(微机电系统,以下称为“MEMS”)器件作为器件的接地孔和处理晶片 通过简单的工艺电连接,而不需要任何额外的步骤,并且还提供其制造工艺和接地方法。 解决方案:在上硅层和下硅层之间夹持绝缘层的MEMS器件40包括:第一硅层41; 形成在第一硅层41上的绝缘层42; 形成在绝缘层42上的第二硅层43; 形成在第二硅层43上的保护层44; 以及从保护层44的上端部向内部形成有导体物质CM的第一硅层41的一部分的接地孔GGH。 版权所有(C)2005,JPO&NCIPI