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31. 发明专利

JPH0628429A MOVEMENT METHOD OF BOOLEAN TRAJECTORY SOLID SURFACE 失效
公开(公告)号：JPH0628429A
公开(公告)日：1994-02-04
申请号：JP12027093
申请日：1993-05-21
申请人： NIPPON TELEGRAPH & TELEPHONE , INTEL CORP
发明人： TAZAWA SATOSHI , FURANSHISUKO EI REON , GUREGORII ANDAASON
IPC分类号： G06F17/50 , G06T17/20 , G06T17/40 , G06F15/60
摘要： PURPOSE: To simulate process steps to reduce the number of irregular surfaces by performing Boolean set operation between an object solid and a trajectory solid to deform the object solid. CONSTITUTION: An object solid 1201 has balls 1202 to 1209 created at individual apexes, and the radius of each ball coincides with a deposition speed. The ball at each apex point more accurately simulates a deposition effect at a point where edges cross at right angles. Boolean sum operation is executed between each ball and the object solid 1201. It is executed between each ball and the object solid 1201. 1202 to 1209. Columns 1220 to 1231 are produced on individual edges of the object solid 1201, and Boolean sum operation between the object solid and each column is executed. It is supposed that the object solid 1201 includes all columns finally, and further, a plane is produced for each face of the object solid.

32. 发明专利

JPH0535746A PLANNING METHOD FOR PRODUCTION LINE 失效
公开(公告)号：JPH0535746A
公开(公告)日：1993-02-12
申请号：JP18604491
申请日：1991-07-25
申请人： NIPPON TELEGRAPH & TELEPHONE
发明人： SAITO KAZUYUKI , WADA YASUSHI , OKUBO TSUNEO , TAKEDA TADAO , TAZAWA SATOSHI , YOSHIZAWA MASAHIRO
IPC分类号： B23Q41/08 , B65G61/00 , G05B19/418 , G06Q50/00 , G06Q50/04
摘要： PURPOSE:To improve the production efficiency by producing an equipment/ personnel plan of a production line in consideration of a versatile process system, the lot division/integration processing, the equipment availability factor, and the operator working ratio respectively in regard of a planning method of the production line which applies a queuing method. CONSTITUTION:A subject process table is read in a step S101, and the production conditions including the production value, a shift system, the working day number, the change of the allowable waiting time are inputted for each process table in a step S102. In a step S103, the arriving rate and the service rate are calculated for each cell and station. A queuing computation is carried out to an operator in a step S104. When the calculation is through with all cells, the next process is carried out in a step S105. Then a queue is calculated to the equipment for each station in a step S106. When the calculation is through with all stations, a step S107 is carried out. Then the production period, the number of necessary operators, the number of necessary equipments, the cell in-process state, etc., are outputted in a step S108.

33. 发明专利

JPH04309249A MANUFACTURE OF SEMICONDUCTOR INTEGRATED CIRCUIT 失效
公开(公告)号：JPH04309249A
公开(公告)日：1992-10-30
申请号：JP10183791
申请日：1991-04-08
申请人： NIPPON TELEGRAPH & TELEPHONE
发明人： TAZAWA SATOSHI , SAITO KAZUYUKI , ABE TETSUYA
IPC分类号： H01L21/76 , H01L21/768
摘要： PURPOSE:To easily obtain a structure in which holes or grooves having high aspect ratios are completely filled with a substance by filling locations other than the holes or grooves with the substance for filling up the holes and grooves after the contact poles of the substance are formed at the locations where the holes or grooves are formed. CONSTITUTION:After the contact poles 6 of a substance for filling up holes or grooves are formed in areas 4a and 4b where the holes or grooves are formed, an insulating layer 7 is formed by depositing the substance. At the time of forming the layer 7, such a surface flattening technique as a Bias-ECR method or a resist is applied to a flat surface after the substance is deposited by a CVD method. Then the flattened surface of the layer 7 is uniformly etched until the upper sections of the contact poles 6 are exposed. Therefore, a structure in which the holes or grooves having high aspect ratios are completely filled up with the substance can be easily obtained.

34. 发明专利

JPH04270535A COMMUNICATION CONTROL METHOD 失效
公开(公告)号：JPH04270535A
公开(公告)日：1992-09-25
申请号：JP5348891
申请日：1991-02-25
申请人： NIPPON TELEGRAPH & TELEPHONE
发明人： WADA YASUSHI , OKUBO TSUNEO , TAZAWA SATOSHI , YOSHIZAWA MASAHIRO
IPC分类号： G06F9/46 , G06F9/48 , G06F15/16 , G06F15/177 , H04L12/54 , H04L12/58 , H04L29/06
摘要： PURPOSE:To satisfy a transmission speed request required for each message and to realize the service processing speed as a whole by including information representing priority processing order of a message to a file name in a directory of a computer and allowing a respectively process to implement priority read processing based thereon. CONSTITUTION:Information such as a destination AP name and a data quantity is included in a message written in a reception file 9 in addition to a message text and a file name registered in a reception directory is commanded while the information of priority is included. Reception source AP11-1-11-N receive an interrupt signal from a listener 3a or reference the reception directory 10 by their own periodic scanning to recognize a file name of the message. Then the message in the reception file 9 is read according to the priority included in the file name and the destination AP name and the data quantity are collated as required.

35. 发明专利

JPH04257242A TEST PATTERN OF INTEGRATED CIRCUIT MANUFACTURING PROCESS 失效
公开(公告)号：JPH04257242A
公开(公告)日：1992-09-11
申请号：JP3790291
申请日：1991-02-08
申请人： NIPPON TELEGRAPH & TELEPHONE
发明人： YOSHIZAWA MASAHIRO , OKUBO TSUNEO , OCHIAI KATSUYUKI , TAZAWA SATOSHI
IPC分类号： G01R31/28 , H01L21/66 , H01L21/822 , H01L27/04
摘要： PURPOSE:To solve such problems that a pattern detection takes time since locations of a pattern to be tested are different each sort at testing a water in the middle of a multi kind LSI manufacturing process to accurately perform the test efficiently. CONSTITUTION:In a large-scale integrated circuit, a plurality of patterns, including at least a part among a sub-module 1 which is used within the same layer of a design data, a pattern (a sub-module group 2) in which the distance to an adjoining pattern is the smallest, an isolated pattern, a pattern (a sub-module group 3) in which wire width is the narrowest, and a pattern (a sub-module group 4) in which room conforming this layer to a lower layer is the narrowest, are extracted as a block containing surrounding patterns. These are gathered at least one place to arrange them within a chip or in a part of a water.

36. 发明专利

JPH0239271A LSI FORM SIMULATING METHOD 失效
公开(公告)号：JPH0239271A
公开(公告)日：1990-02-08
申请号：JP18687488
申请日：1988-07-28
申请人： NIPPON TELEGRAPH & TELEPHONE
发明人： TAZAWA SATOSHI , MATSUO SEITARO , SAITO KAZUYUKI , YOSHII AKIRA
IPC分类号： H01L21/302 , G06F17/50 , H01L21/00 , H01L21/3065
摘要： PURPOSE:To simulate the etching of >=2 types of materials with high accuracy by moving a boundary point between materials of different etching rates under the etching conditions of the material having the larger etching rate. CONSTITUTION:The form of a material A to be etched is first simulated. A material B has an etching rate larger than that of the material A. The movements of boundary points P1 and P2 are calculated and the form lines L1 and L2 of the material A are corrected in accordance with the movements of the points P1 and P2. The same operation is also carried out in the next time step, and the forms of the materials A and B are successively simulated. (The boundary points are shown in P3 and P4). In such a constitution, the etching simulation, etc., can be carried out with high accuracy in case a large difference of etching rates is not produced between a mask material and a material to be etched.

37. 发明专利

JPS60145633A WAFER PROBER DEVICE 失效
公开(公告)号：JPS60145633A
公开(公告)日：1985-08-01
申请号：JP135484
申请日：1984-01-10
申请人： NIPPON TELEGRAPH & TELEPHONE
发明人： TAZAWA SATOSHI , KUBOTA KATSUTOSHI , WADA YASUSHI
IPC分类号： G01R31/26 , H01L21/66 , H01L21/68
摘要： PURPOSE:To completely automatically measure a wafer which contains patterns of different types merely by altering the condition inputs to a controller by providing the controller for regulating the position of a manipulator or a probe card by a handler. CONSTITUTION:When a manipulator is used, a handler 16 is grasped by a grasping finger 20 of the manipulator 36 on a station 10 in accordance with a command of a computer 34, moved toward a stationary base 12 along rails 14, and placed at a suitable position on the base 12 near a reference position. As a result, the end of the probe 40 of the manipulator 36 is contained in the visual field of a television camera 32, and focused to the end of the probe 40 by the automatic focal point correcting function of the camera. The computer 34 processes the video data from the camera 32 and calculates the end position of the probe 40. Then, the computer 34 moves the handler 16 in a circular motion so that the distance becomes zero and make an arm 18 advance and retreat, thereby moving the manipulator 34 and hence the end of the probe 40.

38. 发明专利

JPH09251993A METHOD FOR DISPLAYING SEMICONDUCTOR DEVICE CROSS-SECTIONAL STRUCTURE 失效
公开(公告)号：JPH09251993A
公开(公告)日：1997-09-22
申请号：JP6068896
申请日：1996-03-18
申请人： NIPPON TELEGRAPH & TELEPHONE
发明人： TAZAWA SATOSHI , OCHIAI KATSUYUKI
IPC分类号： H01L21/312 , G06F17/50 , G06T1/00 , G06T7/00 , H01L21/00
摘要： PROBLEM TO BE SOLVED: To more accurately display a change of a contraction of a film, etc.,by a method wherein a film is erased from an initial cross-sectional state, a length obtained by multiplying a shortest distance from a boundary cell to a face of a film centering it by a predetermined change amount is set to be a radius, a circle buried with cells is plotted and the initial cross-sectional states are overlapped to be re-plotted. SOLUTION: In pixels of a polyimide area 3, boundary pixels between an insulation layer area 1 under it and an electrode area 2 are sequentially retrieved, a distance from the retrieved boundary pixel to a nearest face boundary pixel is acquired, and the polyimide area 3 is erased. Next, centering each of the boundary pixels retrieved, a circle of a radius of a length obtained by multiplying the acquired distance by a contraction rate of polyimide is plotted with pixels of polyimide. This plotting state, the insulation area 1 stored previously and the electrode area 2 are overlapped and re-plotted. As a result, it is possible to obtain a cross-sectional structure showing a polyimide area 3b under a contraction state on the insulation layer area 1 and the electrode area 2.

39. 发明专利

JPH0773236A DISPLAYING METHOD FOR CROSS SECTION STRUCTURE OF SEMICONDUCTOR 失效
公开(公告)号：JPH0773236A
公开(公告)日：1995-03-17
申请号：JP24358893
申请日：1993-09-06
申请人： NIPPON TELEGRAPH & TELEPHONE
发明人： TAZAWA SATOSHI , MATSUO SEITARO , OCHIAI KATSUYUKI , NAKAJIMA BAN
IPC分类号： H01L29/00 , G06F17/50 , H01L21/00 , H01L21/02
摘要： PURPOSE:To exactly plot the cross section structure of a semiconductor without using a complicate arithmetic processing and taking time for this processing. CONSTITUTION:The silicon pixel 31a of the most outer surface of a silicon area 31 is taken out and an oxide film 36 of a prescribed film thickness is virtually generated at the portion corresponding to a diffusion port 35 in this silicon pixel by taking the expansion coefficient when silicon is changed into silicon dioxide into consideration (b). Next, by the convolution integral for which a gaussian distribution function is used on the axis of this silicon pixel 31a, the shapes of the upper part and the lower part of the silicon pixel 31a are calculated and a shape suggestion line segment group 37 is obtained (c). Next, this shape suggestion line segment group 37 is plotted so that the silicon pixel 31a may be matched.

40. 发明专利

JPH0773235A DISPLAYING METHOD FOR CROSS SECTION STRUCTURE OF SEMICONDUCTOR DEVICE 失效
公开(公告)号：JPH0773235A
公开(公告)日：1995-03-17
申请号：JP24358793
申请日：1993-09-06
申请人： NIPPON TELEGRAPH & TELEPHONE
发明人： TAZAWA SATOSHI , MATSUO SEITARO , OCHIAI KATSUYUKI , NAKAJIMA BAN
IPC分类号： H01L29/00 , G06F17/50 , H01L21/00 , H01L21/02
摘要： PURPOSE:To exactly plot the cross section structure of a semiconductor without using a complicated arithmetic processing and taking time for this processing. CONSTITUTION:By plotting the basic graphic of the upper half of a longitudinal ellipse for approximating a mask area 53 to the working characteristic drawing of spatter etching by the pixel value which is the same as the pixel of the mask area 53, the state of a deposition is obtained (b). Next, by plotting a rectangle to be the basic graphic for performing an approximation by the pixel value which is the same as the pixel of an air area 521, the state of an etching is obtained (e). By plotting by using the basic graphic appoximated by a line segment and by the pixel value which is the same as the air area, the state of the etching of a semiconductor area 52 is obtained by defining the mask area 53 as a mask.

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