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11. 发明专利

JPH0256927A THERMAL TREATMENT OF SILICON SUBSTRATE 失效
公开(公告)号：JPH0256927A
公开(公告)日：1990-02-26
申请号：JP20642688
申请日：1988-08-22
申请人： TOSHIBA CORP
发明人： NIKI YOSHIKO , WATANABE MASAHARU , NADAHARA SOUICHI
IPC分类号： H01L21/265
摘要： PURPOSE:To reduce crystal defects and improve the device characteristics by a method wherein, after impurity is introduced into a silicon substrate, a thermal treatment is performed under a specific temperature in a first thermal treatment process and, successively, a thermal treatment is performed under a temperature higher than the temperature of the first process in a second thermal treatment process. CONSTITUTION:When a semiconductor device is manufactured in manufacturing processes including a process to form an impurity 12 conductive layer in a silicon semiconductor substrate 11, a first thermal treatment after the impurity 12 is introduced into the substrate 11 by ion implantation is performed under a temperature of 200-550 deg.C and, successively, a second thermal treatment is performed under a temperature higher than the temperature of the first treatment, for instance 800 deg.C or higher. By performing the first treatment under the temperature higher than 200 deg.C, a cluster of vacancies is produced. With this constitution, crystal defects produced by ion implantation can be reduced and the device characteristics can be improved.

12. 发明专利

JPH01200618A MANUFACTURE OF SEMICONDUCTOR DEVICE 失效
公开(公告)号：JPH01200618A
公开(公告)日：1989-08-11
申请号：JP2515888
申请日：1988-02-05
申请人： TOSHIBA CORP
发明人： NADAHARA SOUICHI , WATANABE MASAHARU , NIKI YOSHIKO
IPC分类号： H01L21/265
摘要： PURPOSE:To reduce crystal defects, by a method wherein, after impurity is introduced into a substrate by ion implantation, heat treatment at a temperature of 550-750 deg.C is performed as a first heat-treating process in order to eliminate defective layers of the substrate. CONSTITUTION:Phosphorus as impurity 12 is ion-implanted in a silicon substrate 11, with a concentration of 1X10 /cm at a room temperature, by using acceleration voltage of 1.5MeV. When this sample is subjected to ordinary diffusion process without pre-treatment, the growth of crystal defect such as dislocation and the like due to ion implantation damage is confirmed with electron microscope. When the substrate 11 is heat-treated in a non-oxidizing atmosphere, e.g., nitrogen atmosphere, and whether crystal defect exists or not is examined, it is recognized that a peak caused by the defect vanishes at 550-750 deg.C, and the crystal defect is annealed out. In the case higher than or equal to 750 deg.C, the existence of crystal defect can be recognized. Therefore crystal defect can be completely eliminated by heat-treating samples after ion implantation, at a temperature of 550-750 deg.C.

13. 发明专利

JPS5918653A Automatic supplier for wafer 失效
标题翻译： WAFER自动供应商
公开(公告)号：JPS5918653A
公开(公告)日：1984-01-31
申请号：JP12785482
申请日：1982-07-22
申请人： Toshiba Corp
发明人： HASHIMOTO MASANORI , WATANABE MASAHARU
IPC分类号： B65G51/03 , B65G49/07 , H01L21/677 , H01L21/68
CPC分类号： H01L21/67778 , H01L21/67784 , H01L21/68
摘要： PURPOSE:To contrive to save labor by a method wherein a holding base provided with many spot facing parts is placed on a carriage belt for intermittent feed, and then wafers are automatically supplied to the spot facing parts via a slide from elevatable devices at the upper position in the neighborhood of the carriage blet. CONSTITUTION:When the dorr 3 of a reaction tube 2 is opened, and the device 18 is operated by placing the holding base 9 on the carriage belt 6 for intermittent belt, the wafers 15 are pushed out from a cartridge 14 one by one, levitated over the slide 16 by compressed air spouting from holes, and then slide down to the spot facing parts 8. The carriage belt 6 is stopped when it moves and detects 20 the spot facing parts 8. On the other hand, when the device 18 feeds out the wafers 15 from the hole 12a, a device 13 interlocks with the device 18, and then is on standby by lowering the cartridge 14 by a pitch. This constitution enable to mount the wafers on the holding base 9 in a short time without contamination and damage of the wafers.
摘要翻译：目的：通过一种方法来设计节省劳动力的方法，其中具有许多点对面部件的保持基座被放置在用于间歇进给的托架带上，然后晶片经由上部的可升高装置的滑动件自动地供应到面对部件位于马车小镇附近。构成：当反应管2的dorr 3打开，并且通过将保持基座9放置在用于间歇带的托架带6上来操作装置18时，晶片15逐一从盒14推出，悬浮通过从孔中喷出的压缩空气滑过滑块16，然后向下滑动到面对部件8.当运动带6移动时，滑架6被停止并检测到20个点对面部分8.另一方面，当装置18进给从孔12a离开晶片15，装置13与装置18互锁，然后通过以间距降低盒14来待机。这种结构使得能够在短时间内将晶片安装在保持基座9上而不会污染和损坏晶片。

14. 发明专利

JPH04101428A SEMICONDUCTOR DEVICE AND MANUFACTURE THEREOF 失效
公开(公告)号：JPH04101428A
公开(公告)日：1992-04-02
申请号：JP21820190
申请日：1990-08-21
申请人： TOSHIBA CORP
发明人： NADAHARA SOUICHI , TSUNODA HIROAKI , WATANABE MASAHARU , YAMABE KIKUO
IPC分类号： H01L21/8238 , H01L21/322 , H01L21/8242 , H01L27/092 , H01L27/10 , H01L27/108 , H01L27/148
摘要： PURPOSE:To allow a semiconductor element to be less affected by contamination by heavy metal, etc., for increasing an yield by forming a phosphorus diffusion layer in such high density as exceeds the solid solubility limit inside a semiconductor at the specified diffusion temperature. CONSTITUTION:On an n-type silicon substrate 11, a p-type well 12, field oxide film 13, silicon oxide film 14 and n type polysilicon film 15 are formed. Using the gate electrode 15 and field oxide film 13 as a mask, ions are injected to the substrate self-alignedly to form a p type layer 16, an n type layer 17 and source and drain regions for pM0S and nM0S. Then, a CVD oxide film 18 is formed on the whole surface. After an opening is made on the specified part of the oxide film 18, a second polysilicon film 19 is deposited on the whole surface of the device. Then, the whole body of the device is covered with an insulating film 20. After that, phosphorus is diffused from the rear surface of the substrate, for example, at 1000 deg.C for 60 minutes, to form a gettering site (a phosphorus diffusion layer) 21. In order to trap heavy metal, the device is subjected to a low-temperature treatment, for example, at 800 deg.C for 20 minutes or longer.

15. 发明专利

JPH02203254A METHOD AND DEVICE FOR MEASURING PHOTOLUMINESCENCE 失效
公开(公告)号：JPH02203254A
公开(公告)日：1990-08-13
申请号：JP2252589
申请日：1989-02-02
申请人： TOSHIBA CORP
发明人： NIKI YOSHIKO , WATANABE MASAHARU
IPC分类号： G01N21/64
摘要： PURPOSE:To analyze a sample in a depth direction without destruction by performing the pulsative irradiation of probe light and temporally separating and measuring the emitted light observed at such a time. CONSTITUTION:The probe light 5 generated from a pulse laser generating device 11 irradiates the sample 14 through a filter 12 and a mirror 13 to obtain photoluminescence. Namely, the sample 14 is irradiated with the probe light 5 and the emitted light 6 at the time of recombination is measured with time, so that the photoluminescence can be measured. After the spectrum of the emitted light 6 at the time of recombination is performed by a spectroscope 16 through a lens 15 and a filter 2, the intensity of the light is detected by a detector 17. The photocounting of the detected emitted light is performed in a digital storage oscilloscope 18 and the secular change is inputted in a computer 19, recorded in a plotter 7 and displayed on a CRT 8.

16. 发明专利

JPS61193456A MANUFACTURE OF SEMICONDUCTOR ELEMENT 失效
公开(公告)号：JPS61193456A
公开(公告)日：1986-08-27
申请号：JP3318385
申请日：1985-02-21
申请人： TOSHIBA CORP , TOSHIBA CERAMICS CO
发明人： YAMABE KIKUO , TAKAI NORIHEI , SHIRAI HIROSHI , WATANABE MASAHARU
IPC分类号： H01L21/26 , H01L21/316 , H01L21/322 , H01L21/324
摘要： PURPOSE:To suppress the generation of lattice defects related to conductivity in a process of the formation of a thermal oxide film by a method wherein hydrogen is caused to join unsaturated bonds in a silicon wafer surface when the silicon wafer is subjected to heat treatment in a hydrogen atmosphere. CONSTITUTION:A thermal oxide film 12 is formed on the surface of a silicon wafer 11, a resist 13 is applied to the entire surface, and then etching is accom plished for the removal of the thermal oxide film 12 from a region planned for the formation of a gate oxide film. The silicon wafer 11 is then subjected to an RCA rinse and washing with water for the formation of a thin natural oxide film 14. Next, the wafer 11 is irradiated with light from a lamp, a halogen lamp for example, for the rise of the wafer surface temperature up to 1,000[ deg.C], and is left for a minute in argon gas including some hydrogen. In this process, unsaturated bonds present in the surface of the silicon wafer 11 accept hydrogen atoms for saturation. Next, a thermal oxide film 15 is formed on the wafer surface,which is followed by the formation of a polycrystalline silicon film 16.

17. 发明专利

JPH04101427A SEMICONDUCTOR DEVICE AND MANUFACTURE THEREOF 失效
公开(公告)号：JPH04101427A
公开(公告)日：1992-04-02
申请号：JP21822890
申请日：1990-08-21
申请人： TOSHIBA CORP
发明人： WATANABE MASAHARU , NIKI YOSHIKO
IPC分类号： H01L21/205 , H01L21/322 , H01L29/78
摘要： PURPOSE:To obtain a highly reliable semiconductor device which does not allow contamination to be concentrated on a local part of elements without conducting a high-temperature heat treatment by providing a barrier layer to prevent the passage of heavy metal inside a semiconductor substrate. CONSTITUTION:The surface of a substrate 11 is oxidized in steam at 1100 deg.C to form an oxide film 12. Then, a silicon nitride film 13 is deposited on the oxide film 12 and then a silicon oxide film 141 is deposited on the silicon nitride film 13. This substrate 11 is joined to another substrate 15 which is oxidized for the surface only. The joined body is oxidized in steam at 1100 deg.C to have a good adhesion. After that, the joined body is exposed to a nitrogen atmosphere to adhere the substrates 11 and 15 firmly through oxide films 12, 141 and 142 and a nitride film 13. Next, the substrate 11 is ground from the side opposite to the substrate 15. After the distortion caused by grinding is eliminated by etching, the surface of the substrate 15 is polished again. Then, the device is subjected to the LSI process including element separation at 1000 deg.C or below to make a CMOS.

18. 发明专利

JPH02138729A MANUFACTURE OF SEMICONDUCTOR DEVICE 失效
公开(公告)号：JPH02138729A
公开(公告)日：1990-05-28
申请号：JP14231889
申请日：1989-06-03
申请人： TOSHIBA CORP , TOSHIBA CERAMICS CO
发明人： WATANABE MASAHARU , HONMA KAZUMOTO
IPC分类号： H01L21/205
摘要： PURPOSE:To prevent any stacking fault in epitaxial layer from occurring by a method wherein a single crystal semiconductor substrate containing oxygen is heat-treated for specific time at specific temperature to increase the defectives and after heat treatment for another specific time at another specific temperature, the substrate is etched away. CONSTITUTION:Defectives within single crystal ingot to be a substrate or a single crystal substrate are increased by heat treating the substrate for specific time at the temperature e.g., of 600-900 deg.C. Then, the defectives creating the defect density e.g., exceeding 50 /cm are caused in this single crystal substrate when the single crystal substrate is examined by an optical microscope after heat treatment for 18 hours at the temperature e.g., of 1050 deg.C. Through these procedures, in such a semiconductor device wherein an epitaxial layer is formed on the semiconductor substrate, any stacking fault in the epitaxial layer can be prevented from occurring without augmenting the oxygen concentration in the substrate.

19. 发明专利

JPS63104322A EPITAXIAL WAFER 失效
公开(公告)号：JPS63104322A
公开(公告)日：1988-05-09
申请号：JP25025586
申请日：1986-10-21
申请人： TOSHIBA CORP , TOSHIBA CERAMICS CO
发明人： WATANABE MASAHARU , NAKANISHI HIROMITSU
IPC分类号： H01L21/322 , H01L21/205
摘要： PURPOSE:To reduce a transfer density in an epitaxial layer thereby to increase the lifetime of an epitaxial layer by adhering the epitaxial layer to an N-type silicon single crystal waver of 1.2X10 -2.0X10 atoms/cm of oxygen concentration having 0.1OMEGAcm or less of resistivity. CONSTITUTION:An epitaxial layer is adhered to an N-type silicon single crystal wafer of 1.2X10 -2.0X10 atoms/cm of oxygen concentration having 0.1OMEGAcm of resistivity. Since a transfer then occurs in a substrate, heavy metal (Fe, Ni, Cr, etc.,) in the layer tends to be gettered. Thus, since the transfer concentration in the layer tends to decrease, the lifetime of the layer increases.

20. 发明专利

JPS61193458A TREATMENT OF SILICON WAFER 失效
公开(公告)号：JPS61193458A
公开(公告)日：1986-08-27
申请号：JP3318185
申请日：1985-02-21
申请人： TOSHIBA CORP , TOSHIBA CERAMICS CO
发明人： YAMABE KIKUO , TAKAI NORIHEI , SHIRAI HIROSHI , WATANABE MASAHARU
IPC分类号： H01L21/316 , H01L21/322
摘要： PURPOSE:To realize appropriate crystal characteristics by a method wherein a silicon wafer is heated to a temperature not lower than 800 deg.C in an atmosphere of hydrogen or inert gas containing some hydrogen for the effective elimination in a short period of time of oxygen precipitates from the silicon wafer surface containing inter-lattice oxygen. CONSTITUTION:An Si wafer 11 equipped with a resistivity of 5-20OMEGA/cm is subjected to heat treatment in an argon atmosphere including 10% of hydrogen for the elimination of oxygen precipitates in the vicinity 11a of the surface of the Si wafer 11. In this process, oxygen in the vicinity 11a of the surface of the Si wafer 11 is diffused outward from the surface of r the formation of a defect-free layer in the vicinity 11a of the wafer surface. Simultaneously, a layer containing few lattices is formed in the inside 11b of the wafer. A process follow wherein the wafer 11 is subjected to oxidation in a dry atmosphere at a temperature not lower than 800 deg.C, preferably at 1,000 deg.C, for the formation of an oxide film 12, whereon a polycrystalline silicon film 13 is subsequently formed containing phosphorus.

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