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11. 发明专利

JPS6477357A TRANSFER CONTROL SYSTEM FOR CORDLESS TELEPHONE SET 失效
公开(公告)号：JPS6477357A
公开(公告)日：1989-03-23
申请号：JP23436287
申请日：1987-09-18
申请人： FUJITSU LTD
发明人： FUJITA HIROSHI , TODA YOSHIFUMI
IPC分类号： H04M1/72
摘要： PURPOSE:To execute the transfer call of only a slave machine to be transferred by transmitting a signal for specifying a slave machine to be transferred from a slave machine in calling together with a transfer request to a master machine and allowing the master machine to specify the slave machine and transmitting a transfer circuit. CONSTITUTION:When a calling user of a slave machine 2a recognizes that a call is not to himself but is to a user of a slave machine 2b, a page key is depressed at first, a transfer flag is turned on, the ID of the slave machine 2b to be a destination to be transferred is inputted from numerical key, and a transfer request code with a transferred slave machine ID is transmitted to the master machine 1. The master machine 1 receives the transmitted code, transmits the transfer code with the ID of the slave machine 2b to the slave machine and turns on the transfer flag. The transferred slave machine 2b receives the transfer code, turns on the transfer flug and then a buzzer 28 is called and buzzed. At the time of receiving a transfer receiving code, the master machine 1 transmits an END code to the transferring slave machine 2a and transmits a BUZZER OFF code to the transferred slave machine 2b.

12. 发明专利

JPS6347180B2 失效
公开(公告)号：JPS6347180B2
公开(公告)日：1988-09-20
申请号：JP15388981
申请日：1981-09-30
申请人： FUJITSU LTD
发明人： TODA YOSHIFUMI , KOGA HISAHIRO
IPC分类号： H04L27/227 , H04L27/14

13. 发明专利

JPS6369302A PORTABLE RADIO EQUIPMENT 失效
公开(公告)号：JPS6369302A
公开(公告)日：1988-03-29
申请号：JP21475186
申请日：1986-09-10
申请人： FUJITSU LTD
发明人： KOBAYASHI TOSHIMITSU , TODA YOSHIFUMI
IPC分类号： H01Q21/00 , H01Q1/24
摘要： PURPOSE:To attain transmission/reception by telescoping a telescopic built-in antenna and containing the antenna into the antenna container while being short-circuited to an outer conductor of the container so as to switch the built-in antenna into an outer antenna connected to the same point automatically. CONSTITUTION:The built-in antenna 1a being telescopic and lambda/4-lambda (lambda is wavelength) at the expansion and comprising plural stages of 1st, 2nd and 3rd rod conductor tubes 1a-1, 1a-2, 1a-3,... in slide contact with an inner conductor 1b-1 of an antenna containing part 1b, the antenna containing part 1b tightening and short-circuiting a knob screw 1a-4 at the tip of the built-in antenna 1a to the outer conductor 1b-2 in telescoping the built-in antenna 1a, and a coaxial cable 1c, lambda/4 in length in total with the length of said antenna containing part 1b, are provided and the center conductor of the coaxial cable and one end of the sheath conductor are connected respectively to the inner conductor and the outer conductor of said antenna containing part, and the other end is connected respectively to a reception circuit section and a case. Thus, no switch means of the built-in antenna is required and the titled equipment is made inexpensive in the cost and miniaturized.

14. 发明专利

JPS62120103A AUTOMATIC CHANGEOVER ANTENNA 失效
公开(公告)号：JPS62120103A
公开(公告)日：1987-06-01
申请号：JP25863685
申请日：1985-11-20
申请人： FUJITSU LTD
发明人： KOBAYASHI TOSHIMITSU , TODA YOSHIFUMI
IPC分类号： H01Q1/10 , H01Q1/44
摘要： PURPOSE:To improve the high frequency characteristic without requiring any changeover switch by having only to connect an external antenna so as to attain automatic changeover from an internal antenna into the external antenna thereby conducting transmission/reception. CONSTITUTION:The length of the internal antenna 1 is optional in the range of lambda/4-lambda. In selecting the length L1 of a storage section 2 as 0

15. 发明专利

JPS6090449A SELF-SYNCHRONIZING SCRAMBLE AND DESCRAMBLE SYSTEM 失效
公开(公告)号：JPS6090449A
公开(公告)日：1985-05-21
申请号：JP19861183
申请日：1983-10-24
申请人： FUJITSU LTD
发明人： TODA YOSHIFUMI , OKA NOBUYUKI , MIKAMI TAKU , YABE TOSHIHIRO
IPC分类号： H04L9/12 , H04L9/22 , H04L25/03
摘要： PURPOSE:To increase selectable scramble patterns by using the parallel output of a shift register as an address to supply the output read out of a memory to one side of an exclusive OR circuit. CONSTITUTION:An input signal di is supplied to the output of a memory 12 as well as to the input of an exclusive OR circuit EXOR14. The output of the circuit 14 is supplied to a shift register 10, and the parallel output of the register 10 is supplied to the memory 12 in the form of an address. The output read out of the memory 12 is fed back to the EXOR14, and the output of the EXOR14 is sent to a transmission line. A memory 13 equivalent to the memory of the transmission side is used also for a descramble circuit at the reception side.

16. 发明专利

JPS59230316A HIGH FREQUENCY CIRCUIT 失效
公开(公告)号：JPS59230316A
公开(公告)日：1984-12-24
申请号：JP10430183
申请日：1983-06-13
申请人： FUJITSU LTD
发明人： TODA YOSHIFUMI
IPC分类号： H03H9/64 , H03H3/08 , H03H9/05
摘要： PURPOSE:To eliminate the mutual effects among high frequency circuits and to improve the characteristics of these circuits by storing the substrates of the circuits constituting the high frequency circuit in a body to a base and providing the shielding plates among the circuits. CONSTITUTION:The substrate of each surface acoustic wave filter 6, the substrate of a high-frequency amplifying circuit 7 and the substrate of a frequency mixing circuit 8 are stored in a body in a shielding case base 1. The base 1 is covered with a shielding cover 11 from above, and at the same time shielding plates 13 are provided among the circuits 6-8. A high-frequency input filter formed with the filter 6 is connected to the circuit 7 via a matching transformer 9 and a hermetic terminal 10. The same constitution is applied also to a shielding plate 10 provided between an inter-stage filter and the circuit 8. This eliminates the mutual effects among high frequency circuit and improves the circuit characteristics.

17. 发明专利

JPS58161426A LOOP FILTER OF DIGITAL PLL CIRCUIT 失效
公开(公告)号：JPS58161426A
公开(公告)日：1983-09-26
申请号：JP4226882
申请日：1982-03-17
申请人： FUJITSU LTD
发明人： KOGA HISAHIRO , TODA YOSHIFUMI
IPC分类号： H03L7/06 , H03L7/08 , H03L7/093
摘要： PURPOSE:To obtain a loop filter for a digital PLL circuit with a simple circuit constitution, by adopting a so-called continuous count system which outputs discrimination output only when N-set of consecutive ''1s'' or ''0s'' in discriminating a phase comparison signal. CONSTITUTION:A phase comparison signal A outputted from a phase comparator 1 is given to a shift register 21 in synchronizing with a clock signal CK. Further, AND gates 22 and 23 monitors at all times that outputs Q1, Q2...QN of a shift register 21 are all ''1'' or outputs Q1', Q2'...QN' are all zero, and when the conditions are satisfied, the AND gate 22 or 23 outputs a set signal S or a reset signal R. A flip-flop 24 generates a phase control signal B with the set signal S or the reset signal R. That is, the loop filter is the continuous count system which discriminates the phase control signal as ''1'' or ''0'', when the phase comparison signal A is ''1'' or ''0'' consecutively for N-set.

18. 发明专利

JPS56149109A ELASTIC SURFACE WAVE DEVICE 失效
公开(公告)号：JPS56149109A
公开(公告)日：1981-11-18
申请号：JP5110880
申请日：1980-04-19
申请人： FUJITSU LTD
发明人： TODA YOSHIFUMI , WAKATSUKI NOBORU , ITOU HIDEAKI , HODOHARA KIYOAKI
IPC分类号： H03H9/25 , H03H3/08 , H03H9/02 , H03H9/05
摘要： PURPOSE:To prevent noise due to the pyroelectric effect in an elastic surface device containing an elastic surface wave element in a metallic case, by covering the external circumference of the top surface and end surfaces of the elastic surface wave element with conductive materials and by covering the top surface with an insulating material. CONSTITUTION:In metallic case 16, elastic surface wave element 17 is installed and on the top surface of element 17, reed screen type electrodes 18 are provided. The external circumference of the top surface of element 17 and its flanks are covered with conductive material 24, such as Al, by vacuum vapor deposition, sputtering, or the like and the element top surface including electrodes 18 is coated with insulating material 25, such as SiO2, SiO and Si3N4, by vacuum vapor deposition, sputtering, etc., or applied with resin, such as polyimide, by spin coating, etc. Thus, noise due to the discharge caused by the pyroelectric effect is prevented.

19. 发明专利

JPS56129430A HIGH-SPEED BINARY SEQUENCE CIRCUIT HAVING FEEDBACK CIRCUIT 失效
公开(公告)号：JPS56129430A
公开(公告)日：1981-10-09
申请号：JP3267080
申请日：1980-03-17
申请人： FUJITSU LTD
发明人： TODA YOSHIFUMI , MORITA TOSHIYUKI , ITOU HIDEAKI , HODOHARA KIYOAKI
IPC分类号： H03K3/84 , H03K23/54
摘要： PURPOSE:To remove the limit of the maximum operating frequency of the circuit, by picking up the feedback signal from before n bits so that the delay time of the feedback can be neglected and making feedback with a delay, in a binary sequence circuit in which a plurality of FF circuits are in cascade connection. CONSTITUTION:FF circuits FF11-F13 are in cascade connection, the feedback signal is picked up from the output of FF11 and FF12 and it is fed to the delay line DL1 from the OR gate circuit G12, and delay is given by Td1 corresponding to one- bit's share and feedback input is made to the 1st stage FF11 of FF circuit. In comparison with the case that both the outputs of FF2, FF3 in FF circuit are fed directly back to FF1 conventionally, the delay time at the feedback circuit can be neglected by the feedback point before one bit, and high-speed operation can be made up to the toggle frequency of FF circuit.

20. 发明专利

JPS5592056A MULTIPLE LINE MONITOR SYSTEM 失效
公开(公告)号：JPS5592056A
公开(公告)日：1980-07-12
申请号：JP16524078
申请日：1978-12-31
申请人： FUJITSU LTD
发明人： TODA YOSHIFUMI , HODOHARA KIYOAKI , ITOU HIDEAKI
IPC分类号： H04L1/00 , H04J3/14
摘要： PURPOSE:To make it possible to monitor sufficiently a transmission quality with a comparatively simple constitution by writing each information from the I/O end of a speed converter circuit into a memory by the clock of an initialized phase and by reading it. CONSTITUTION:Speed converter circuit SCNV separates control pulses from a receiving signal, and parity check is performed by memory 3MEM1, etc., on a basis of the input signal of circuit SCNV. That is, each information is written from the I/O end of circuit SCNV into memory 3MEM1 and memory 3MEM2 by clocks of an initialized phase and is read, so that the transmission quality can be monitored sufficiently with a comparatively simple constitution.

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