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    • 8. 发明专利
    • Semiconductor device
    • 半导体器件
    • JP2009290240A
    • 2009-12-10
    • JP2009207688
    • 2009-09-09
    • Hitachi Ltd株式会社日立製作所
    • NOGUCHI JUNJIMATSUMOTO TAKASHIOSHIMA TAKAFUMIONOZUKA TOSHIHIKO
    • H01L21/768H01L21/3205H01L23/52H01L23/522
    • PROBLEM TO BE SOLVED: To efficiently attain capacity reduction and securement of a via processing margin. SOLUTION: This semiconductor device having a plurality of wiring layers has: a first wiring layer 26 having a predetermined region; a second wiring layer 47 located in an upper layer of the first wiring layer; an interlayer insulating film 36 provided between the first wiring layer and the second wiring layer; and barrier insulating films (29, 31) provided between the interlayer insulating film and wiring of the first wiring layer, wherein thickness of the barrier insulating film at an upper part of the wiring in the predetermined region is thicker than the barrier insulating film at an upper part of wiring in regions except the predetermined region, an air gap 35 is formed between the adjacent wirings in the predetermined region, and the air gap is not formed between the adjacent wirings in the regions except the predetermined region. COPYRIGHT: (C)2010,JPO&INPIT
    • 要解决的问题:有效地实现容量降低和通孔加工余量的确定。 解决方案:具有多个布线层的该半导体器件具有:具有预定区域的第一布线层26; 位于第一布线层的上层的第二布线层47; 设置在第一布线层和第二布线层之间的层间绝缘膜36; 以及设置在所述层间绝缘膜和所述第一布线层的布线之间的阻挡绝缘膜(29,31),其中,所述预定区域中的所述布线的上部的所述阻挡绝缘膜的厚度比所述阻挡绝缘膜厚 在预定区域以外的区域中布线的上部,在预定区域中的相邻布线之间形成气隙35,并且在除了预定区域之外的区域中的相邻布线之间不形成气隙。 版权所有(C)2010,JPO&INPIT