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1. 发明公开

EP4141873A1 METHOD FOR ACCESSING MEMORY CELLS, SEMICONDUCTOR MEMORY DEVICE INCLUDING MEMORY CELLS, AND OPERATING METHOD OF MEMORY CONTROLLER CONTROLLING MEMORY DEVICE 有权
公开(公告)号：EP4141873A1
公开(公告)日：2023-03-01
申请号：EP22174258.8
申请日：2022-05-19
申请人： Samsung Electronics Co., Ltd.
发明人： SONG, Won-Hyung , YOU, Jung Min , CHO, Seong-Jin
IPC分类号： G11C11/4078 , G11C11/4096 , G11C7/24 , G11C11/406 , G11C7/10 , G11C7/02
摘要： Disclosed is a method for accessing memory cells arranged in rows and columns. The method includes activating a specific row of the rows of the memory cells, and flipping data bits stored in memory cells of the specific row in response to determining that concentrated activation occurs at the specific row.

2. 发明公开

EP3903311A1 DETECTION OF ILLEGAL COMMANDS 审中-实审
公开(公告)号：EP3903311A1
公开(公告)日：2021-11-03
申请号：EP19903473.7
申请日：2019-12-19
申请人： MICRON TECHNOLOGY, INC.
发明人： RICHTER, Michael, Dieter , BALB, Markus
IPC分类号： G11C11/4078 , G11C11/406 , G11C11/4076 , G11C11/4096

3. 发明公开

EP2266116A2 SYSTEMS, METHODS, AND APPARATUSES TO SAVE MEMORY SELF-REFRESH POWER 有权
标题翻译：系统，方法和设备节能连最后一个程序
公开(公告)号：EP2266116A2
公开(公告)日：2010-12-29
申请号：EP09724975.9
申请日：2009-03-27
申请人： Intel Corporation
发明人： BAINS, Kuljit , HALBERT, John , WILLIAMS, Michael, W.
IPC分类号： G11C11/402 , G11C11/4078 , G11C11/4074 , G11C11/406 , G11C29/42
CPC分类号： G11C11/406 , G06F11/106 , G11C7/1006 , G11C7/1045 , G11C11/40615 , G11C11/40618 , G11C2029/0411 , G11C2211/4061 , G11C2211/4062
摘要： Embodiments of the invention are generally directed to systems, methods, and apparatuses to save dynamic random access memory (DRAM) self-refresh power. In some embodiments, the refresh frequency of a DRAM is reduced and errors are allowed to occur. In error check mode, the DRAM stores data and corresponding error check bits. The error check bits may be used to scrub the memory and fix the errors.

4. 发明公开

EP1446910A4 PHASE ADJUSTMENT APPARATUS AND METHOD FOR A MEMORY DEVICE SIGNALING SYSTEM 有权
标题翻译：移相器和方法内存模块信令系统
公开(公告)号：EP1446910A4
公开(公告)日：2006-08-16
申请号：EP02802180
申请日：2002-10-22
申请人： RAMBUS INC
发明人： HAMPEL CRAIG E , PEREGO RICHARD E , SIDIROPOULOS STEPHANOS S , TSERN ELY K , WARE FREDRICK A
IPC分类号： H04L5/16 , G06F1/04 , G11C7/10 , G11C7/22 , G11C11/4078 , H04L7/00
CPC分类号： G11C11/4076 , G06F3/061 , G06F3/0629 , G06F3/0671 , G06F12/0246 , G11C7/10 , G11C7/1051 , G11C7/106 , G11C7/1066 , G11C7/1078 , G11C7/1087 , G11C7/22 , G11C7/222 , G11C11/40611 , G11C11/4072 , G11C11/4078 , G11C11/4093 , G11C21/00 , G11C2207/2254 , H04L7/0025 , H04L7/0079 , H04L7/0091
摘要： A memory system includes a memory controller and a memory component coupled to each other. The memory controller includes an interface to receive a first signal and a second signal from the memory component, wherein the first signal comprises a first symbol and the second signal comprises a second symbol. A first circuit of the memory controller receives the first signal by sampling the first symbol using a first timing offset relative to a reference clock signal, and a second circuit of the memory controller receives the second signal by sampling the second symbol using a second timing offset relative to the reference clock signal. The first timing offset is independent of the second timing offset.

5. 发明公开

EP4447050A1 MEMORY DEVICE AND OPERATION METHOD THEREOF 审中-公开
公开(公告)号：EP4447050A1
公开(公告)日：2024-10-16
申请号：EP24157110.8
申请日：2024-02-12
申请人： Samsung Electronics Co., Ltd.
发明人： KIM, Dongha , KO, Tae-Kyeong , KIM, Do-Han
IPC分类号： G11C7/24 , G11C11/406 , G11C11/4078 , G11C8/20 , G11C11/408 , G11C29/04 , G11C29/12 , G11C29/44 , G11C29/52
CPC分类号： G11C29/52 , G11C2029/040920130101 , G11C11/40622 , G11C11/4078 , G11C7/24 , G11C11/4085 , G11C2029/440220130101 , G11C8/20
摘要： The present disclosure relates to operation methods of a memory device including multiple rows each including multiple memory cells. One example method includes receiving an active command for a first row from a memory controller, reading a first count from a per-row hammer tracking (PRHT) region of the first row, updating the first count to generate a first updated count, comparing the first updated count with one of first and second thresholds to generate a comparison result, wherein when the first row is adjacent to the given row, the first updated count is compared with the first threshold and when the first row is not adjacent to the given row, the first updated count is compared with the second threshold, outputting a target row address based on the comparison result, and performing a row hammer mitigation operation on a row corresponding to the target row address.

6. 发明公开

EP4409574A1 A METHOD AND APPARATUS FOR PROTECTING MEMORY DEVICES VIA A SYNERGIC APPROACH 审中-实审
公开(公告)号：EP4409574A1
公开(公告)日：2024-08-07
申请号：EP22800392.7
申请日：2022-09-28
申请人： Advanced Micro Devices, Inc.
发明人： SEYEDZADEHDELCHEH, SeyedMohammad , KOMMAREDDY, Vamsee Reddy
IPC分类号： G11C7/02 , G11C11/4078
CPC分类号： G11C7/02 , G11C11/4078

7. 发明公开

EP4328911A1 MEMORY DEVICE AND ZQ CALIBRATION METHOD 审中-实审
公开(公告)号：EP4328911A1
公开(公告)日：2024-02-28
申请号：EP22924580.8
申请日：2022-10-08
申请人： Changxin Memory Technologies, Inc.
发明人： TIAN, Kai
IPC分类号： G11C7/10 , G11C11/4078 , H01L23/64
摘要： The present disclosure provides a memory device and a ZQ calibration method, wherein the memory device comprises: two calibration resistor interfaces connected to the same ZQ calibration resistor; and a first master chip, first slave chips, a second master chip, and second slave chips, which are commonly connected to the ZQ calibration resistor; in a command mode, a first signal receiver is used to receive a ZQ calibration command, a second signal receiver is used to receive and delay the ZQ calibration command, the first master chip and the second master chip start to calibrate based on the ZQ calibration command, and after the calibration is completed, the first master chip and the second master chip send the ZQ flag signal through second transmission terminals; and the third signal receiver is used to receive the ZQ flag signal through a first transmission terminal, the first slave chips and the second slave chips start to calibrate based on the ZQ flag signal, and after the calibration is completed, the first slave chips and the second slave chips send a ZQ flag signal through second transmission terminals.

8. 发明公开

EP4280213A3 MEMORY DEVICES, OPERATING METHODS OF THE MEMORY DEVICES, AND TEST SYSTEMS INCLUDING THE MEMORY DEVICES 审中-实审
公开(公告)号：EP4280213A3
公开(公告)日：2023-12-27
申请号：EP23171283.7
申请日：2023-05-03
申请人： Samsung Electronics Co., Ltd.
发明人： CHOI, Wonyoung , KANG, Gilyoung , KIM, Sungrae , KIM, Hyeran , PARK, Jeongseok , SEOL, Changkyu
IPC分类号： G11C11/4078 , G11C29/52 , G11C29/56 , H03M7/20
摘要： A memory device, an operating method of the memory device, and a test system including the memory device. The memory device may include a decoder group configured to receive a plurality of codewords including a plurality of symbols from outside of the memory device and to decode the plurality of codewords into data patterns, a memory cell array configured to store the data patterns received from the decoder group and including a plurality of memory cells, and an encoder configured to encode the data patterns into the plurality of codewords including the plurality of symbols. The plurality of codewords may include illegal codewords and normal codewords, and the decoder group may be further configured to convert the illegal codewords among the plurality of codewords into fixed patterns, and the encoder may be configured to output the plurality of codewords to the outside of the memory device.

9. 发明公开

EP4226372A1 MITIGATING ROW-HAMMER ATTACKS 审中-实审
公开(公告)号：EP4226372A1
公开(公告)日：2023-08-16
申请号：EP21749943.3
申请日：2021-07-10
申请人： Microsoft Technology Licensing, LLC
发明人： COWLES, Tim , GRUNZKE, Terry M. , DODDS, Brett Kenneth , MERRITT, Todd Alan , VAN ACKERN, Gary Lee
IPC分类号： G11C7/24 , G11C11/406 , G11C11/4078 , G06F3/06 , G11C29/52

10. 发明公开

EP1947593A4 PORTABLE AUXILIARY STORAGE DEVICE 有权
标题翻译：便携式存储设备RELIEF
公开(公告)号：EP1947593A4
公开(公告)日：2008-12-10
申请号：EP06823038
申请日：2006-11-07
申请人： PANASONIC CORP
发明人： OKAMOTO SATOSHI , NAKAZAWA TAIHO , CHOZUI SADATOSHI , MORIOKA KOICHI
IPC分类号： G06K19/073 , G06F12/14 , G06F21/00 , G06F21/02 , G06F21/24 , G11B20/00 , G11B23/03 , G11C11/4078 , G11C16/22
CPC分类号： G11C7/24 , G06F12/1491 , G06F21/74 , G06F21/78 , G06F21/79 , G06F2221/2105 , G06F2221/2137 , G11B20/00152 , G11B20/0084 , G11B23/0303 , G11B2220/17 , G11C5/04 , G11C16/22
摘要： Versatility of a memory card is improved by providing a memory card wherein data protection mode and normal mode can be selected at discretion.

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