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1. 发明公开

EP3094162A4 INSULATING LAYER FOR PRINTED WIRE BOARD, AND PRINTED WIRE BOARD 有权
标题翻译： ISOLIERSCHICHTFÜRLEITERPLATTEN UND LEITERPLATTE DAMIT
公开(公告)号：EP3094162A4
公开(公告)日：2017-09-06
申请号：EP15735428
申请日：2015-01-06
申请人： MITSUBISHI GAS CHEMICAL CO
发明人： TOMIZAWA KATSUYA , CHIBA TOMO , ITO MEGURU , SHIGA EISUKE
IPC分类号： H05K1/03 , B32B15/08 , C08J5/24 , H01B3/00 , H01B17/56 , H05K1/02 , H05K3/02 , H05K3/46
CPC分类号： H05K1/0271 , B32B15/08 , C08J5/043 , C08J5/24 , C08J2379/08 , C08J2465/00 , C08J2479/04 , H05K1/0298 , H05K1/036 , H05K1/0366 , H05K1/0373 , H05K1/0393 , H05K3/022 , H05K3/4644 , H05K2201/0355 , H05K2201/09136

2. 发明公开

EP2447993A1 ELECTRONIC MODULE AND PACKAGING METHOD THEREOF 有权转让
标题翻译：电子模块及其封装方法
公开(公告)号：EP2447993A1
公开(公告)日：2012-05-02
申请号：EP10809474.9
申请日：2010-05-07
申请人： Huawei Device Co., Ltd.
发明人： QIAO, Jitao
IPC分类号： H01L23/48 , H01L23/12 , H01L25/00
CPC分类号： H01L23/49805 , H01L23/13 , H01L25/105 , H01L25/16 , H01L2924/15162 , H01L2924/15323 , H05K1/141 , H05K3/3436 , H05K3/3442 , H05K2201/09136 , H05K2201/10727
摘要： Embodiments of the present invention provide an electronic module and a packaging structure of the electronic module. The electronic module includes: a substrate; at least one electronic component, arranged on an upper surface of the substrate; and a first conductive part and a second conductive part, configured to connect the electronic module to an external printed circuit board; the first conductive part is arranged at a lower surface of the substrate and is electrically connected to the electronic component; and the second conductive part is arranged across a lateral surface of the substrate and the lower surface of the substrate. The electronic module is packaged with the printed circuit board by arranging a second conductive part across the lateral surface of the substrate and the lower surface of the substrate, which improves the quality of welding between the electronic module and the printed circuit board.

3. 发明公开

EP3261416A1 SEMICONDUCTOR DEVICE 审中-公开
标题翻译：半导体器件
公开(公告)号：EP3261416A1
公开(公告)日：2017-12-27
申请号：EP17177033.2
申请日：2017-06-21
申请人： JTEKT CORPORATION
发明人： TANI, Naoki
IPC分类号： H05K1/02 , H01L23/12
CPC分类号： H01L23/49816 , H01L23/12 , H01L23/49827 , H01L23/49838 , H01L23/522 , H01L23/562 , H01L2224/16225 , H01L2224/73204 , H05K1/0271 , H05K2201/068 , H05K2201/09136 , H05K2201/10568 , H05K2201/2018
摘要： A semiconductor device 100 includes a semiconductor element 1, a circuit board 2, metal wires 3A to 3F, and an expanding member 5. The circuit board 2 has an upper surface 21 and a lower surface 22 opposite the upper surface 21. The metal wires 3A to 3F are formed on at least one of the upper surface 21 and the lower surface 22. At least two connection terminals are formed in a terminal formation surface 13 of the semiconductor element 1 which is disposed so as to face the upper surface 21 of the circuit board 2. The expanding member 5 is fixed to the terminal formation surface 13 of the semiconductor element 1, has a larger coefficient of linear thermal expansion than the semiconductor element 1, and has a size larger than the interval between adjacent two of the at least two connection terminals.
摘要翻译：半导体器件100包括半导体元件1，电路板2，金属线3A至3F以及扩展构件5.电路板2具有上表面21和与上表面21相对的下表面22.金属线 3A至3F形成在上表面21和下表面22中的至少一个上。至少两个连接端子形成在半导体元件1的端子形成表面13中，该端子形成表面13被布置成面向上表面21 电路基板2.扩张部件5固定在半导体元件1的端子形成面13上，线膨胀系数比半导体元件1大，其尺寸比相邻的两个至少两个连接端子。

4. 发明授权

EP2270851B1 METHOD OF BALANCING MULTILAYER SUBSTRATE STRESS AND MULTILAYER SUBSTRATE 有权
标题翻译：法的紧张关系在多层基材和多层基板补偿
公开(公告)号：EP2270851B1
公开(公告)日：2016-12-28
申请号：EP08733855.4
申请日：2008-03-31
申请人： Princo Corp.
发明人： YANG, Chih-kuang
IPC分类号： H05K1/02 , H05K3/46
CPC分类号： H05K1/0271 , H05K1/0224 , H05K1/028 , H05K3/4611 , H05K3/4644 , H05K2201/0394 , H05K2201/09136 , H05K2201/0969 , H05K2201/09781

5. 发明公开

EP2811271A4 INFRARED SENSOR 审中-公开
公开(公告)号：EP2811271A4
公开(公告)日：2015-09-30
申请号：EP13743471
申请日：2013-01-29
申请人： MITSUBISHI MATERIALS CORP
发明人： TARI KAZUYOSHI , ISHIKAWA MOTOTAKA , SHIRATA KEIJI , NAKAMURA KENZO
IPC分类号： G01J1/02 , G01J5/06 , G01J5/10 , G01J5/20 , H01L35/10 , H01L35/30 , H01L37/02 , H05K1/02
CPC分类号： G01J5/10 , G01J5/0022 , G01J5/06 , G01J5/0803 , G01J2005/103 , G01J2005/206 , G03G15/2039 , G03G2215/00772 , H01L27/144 , H01L37/02 , H05K1/0271 , H05K1/189 , H05K2201/068 , H05K2201/09136 , H05K2201/09781
摘要： Provided is an infrared sensor which is capable of measuring a temperature of an object to be measured with high accuracy even when lead wires are connected to one side thereof. The infrared sensor includes an insulating film; a first and a second heat sensitive element which are provided on one face of the insulating film; a first and a second wiring film that are respectively connected to the first and the second heat sensitive element; an infrared reflecting film; a plurality of terminal electrodes; and a thermal resistance adjusting film which is provided on the other face of the insulating film, is in opposition to at least a portion of the longer one of the first or the second wiring film in wiring distance from the terminal electrodes, and is formed of a material with greater heat dissipation than the insulating film.

6. 发明公开

EP2634480A1 LIGHT EMITTING APPARATUS AND ILLUMINATING APPARATUS 有权
标题翻译：发光装置和照明装置
公开(公告)号：EP2634480A1
公开(公告)日：2013-09-04
申请号：EP12834577.4
申请日：2012-10-18
申请人： Panasonic Corporation
发明人： UENOYAMA, Koji , OOTUBO, Atusi , MATSUMOTO, Hiroyuki
IPC分类号： F21V29/00 , F21S2/00 , F21V19/00 , F21V23/00 , H01L33/00 , F21Y101/02
CPC分类号： F21V29/004 , F21K9/23 , F21K9/27 , F21S8/04 , F21V3/00 , F21V29/508 , F21Y2103/33 , F21Y2105/10 , F21Y2115/10 , H05B33/0821 , H05K1/0201 , H05K1/0209 , H05K1/0271 , H05K1/181 , H05K2201/09136 , H05K2201/09781 , H05K2201/10106
摘要： A light-emitting device includes: a board (18); light-emitting elements (60a and 60b) interconnected in parallel and provided above a top face (65) of the board (18); light-emitting elements (60e and 60f), one of which is connected in series with the light-emitting element (60a) and the other of which is connected in series with the light-emitting element (60b), the light-emitting elements (60e and 60f) being interconnected in parallel; a metal pattern (67a) provided continuously under the light-emitting elements (60a and 60b), on an undersurface (28) of the board (18); and a metal pattern (67b) provided continuously under the light-emitting elements (60e and 60f), and isolated from the first metal pattern (67a).
摘要翻译：发光装置包括：板（18）; 发光元件（60a和60b），所述发光元件（60a和60b）平行互连并设置在所述板（18）的顶面（65）上方; 其中一个发光元件（60a和60f）与发光元件（60a）串联连接并且另一个与发光元件（60b）串联连接，发光元件（60e和60f）并联连接; 在所述基板（18）的下表面（28）上，在所述发光元件（60a，60b）的下方连续设置的金属图案（67a）。以及连续设置在发光元件（60e，60f）的下方且与第一金属图案（67a）隔离的金属图案（67b）。

7. 发明公开

EP2270851A4 METHOD OF BALANCING MULTILAYER SUBSTRATE STRESS AND MULTILAYER SUBSTRATE 有权
标题翻译： EEREM MEHRSCHICHTIGEN子系列中的VERFAHREN ZUM AUSGLEICH VON SPANNENEN在MEHRSCHICHTIGES SUBSTRAT
公开(公告)号：EP2270851A4
公开(公告)日：2011-06-29
申请号：EP08733855
申请日：2008-03-31
申请人： PRINCO CORP
发明人： YANG CHIH-KUANG
IPC分类号： H05K1/02 , B32B9/00 , H01L23/12
CPC分类号： H05K1/0271 , H05K1/0224 , H05K1/028 , H05K3/4611 , H05K3/4644 , H05K2201/0394 , H05K2201/09136 , H05K2201/0969 , H05K2201/09781

8. 发明公开

EP2270851A1 METHOD OF BALANCING MULTILAYER SUBSTRATE STRESS AND MULTILAYER SUBSTRATE 有权
标题翻译：平衡多层基板应力和多层基板的方法
公开(公告)号：EP2270851A1
公开(公告)日：2011-01-05
申请号：EP08733855.4
申请日：2008-03-31
申请人： Princo Corp.
发明人： YANG, Chih-kuang
IPC分类号： H01L23/12 , H05K1/02 , B32B9/00
CPC分类号： H05K1/0271 , H05K1/0224 , H05K1/028 , H05K3/4611 , H05K3/4644 , H05K2201/0394 , H05K2201/09136 , H05K2201/0969 , H05K2201/09781
摘要： Disclosed is a method to decrease warpage of a multi-layer substrate, comprises a first metal layer and a second metal layer. First area of the first metal layer is larger than second area of the second metal layer. In the same layer of the second metal layer, a redundant metal layer can be set to make a redundant metal layer area plus the second area considerably equivalent to the first area. Alternatively, a redundant space can be set in the first metal layer to achieve the same result. When the multi-layer substrate comprises a first dielectric layer with an opening and a second dielectric layer, a redundant opening positioned corresponding to the opening can be set in the second dielectric layer. The present invention employs a method of balancing the multi-layer substrate stress, i.e. to homogenize the multi-layer structure composed of different metal layers and dielectric layers to decrease warpage thereof.
摘要翻译：公开了一种减少多层基板翘曲的方法，包括第一金属层和第二金属层。第一金属层的第一面积大于第二金属层的第二面积。在第二金属层的同一层中，可以设置冗余金属层以形成冗余金属层区域加上与第一区域相当的第二区域。或者，可以在第一金属层中设置冗余空间以实现相同的结果。当多层基板包括具有开口的第一电介质层和第二电介质层时，可以在第二电介质层中设置与开口对应的冗余开口。本发明采用平衡多层衬底应力的方法，即均匀化由不同金属层和介电层组成的多层结构以减少其翘曲。

9. 发明公开

EP2066160A3 Wiring board and electronic component device 有权
公开(公告)号：EP2066160A3
公开(公告)日：2009-11-25
申请号：EP08168277.5
申请日：2008-11-04
申请人： Shinko Electric Industries Co., Ltd.
发明人： Taguchi, Yuichi , Chino, Teruaki , Oi, Kiyoshi
IPC分类号： H05K3/46
CPC分类号： H05K1/0271 , H01L23/49822 , H01L23/49827 , H01L23/49838 , H01L2224/16225 , H01L2224/16227 , H01L2224/32225 , H01L2224/73204 , H01L2224/92125 , H05K3/4644 , H05K2201/09063 , H05K2201/09136 , H05K2201/10674 , H01L2924/00
摘要： A wiring board (10) adapted for mounting an electronic component has the form of a structure in which a plurality of wiring layers (11, 13, 15) are stacked one on top of another with an insulating layer (12, 14) interposed therebetween and are interconnected through via holes (VH1, VH2) formed in the insulating layers, respectively. A plurality of openings (TH) are formed through the structure in a region (R2) where a wiring is not formed, extending through the structure in a thickness direction thereof. Further, solder resist layers (16, 17) are formed on the outermost wiring layers, respectively, and exposing pad portions (11P, 15P) defined in desired locations in the outermost wiring layers.

10. 发明公开

EP3346320A1 IMAGE DISPLAY DEVICE 审中-公开
公开(公告)号：EP3346320A1
公开(公告)日：2018-07-11
申请号：EP16841119.7
申请日：2016-08-30
申请人： Panasonic Intellectual Property Management Co., Ltd.
发明人： KUMAMOTO, Yasuhiro , SHINYA, Takeichi , HIGA, Koujirou , OFUJI, Masaaki , TAKEUCHI, Taizou , KUGIMARU, Tadahiro , SHIMOTAYA, Ryou
IPC分类号： G02F1/133 , F21S2/00 , F21V19/00 , F21V23/00 , F21V23/06 , G02F1/1333 , G02F1/13357 , G09F9/00 , G09G3/20 , G09G3/34 , G09G3/36
CPC分类号： G02F1/133603 , F21S2/00 , F21V19/00 , F21V23/00 , F21V23/06 , G02F1/13306 , G02F1/133308 , G02F2001/133601 , G02F2001/133612 , G02F2001/133628 , G09F9/00 , G09G3/20 , G09G3/34 , G09G3/36 , H05K1/0209 , H05K1/0263 , H05K1/0271 , H05K2201/09136 , H05K2201/09672 , H05K2201/10106 , H05K2201/10136
摘要： Provided is a video display device that includes a plurality of light emitting diodes capable of independently dimming. The video display device includes a liquid crystal display panel, and light source substrates configured to illuminate the liquid crystal display panel from a rear side of the liquid crystal display panel. Each of the light source substrates includes a plurality of light emitting diodes each of which is provided in corresponding one of areas different from each other in the liquid crystal display panel, and driver elements which drive each of the plurality of light emitting diodes such that light is emitted with luminance corresponding to brightness within a corresponding area of an image in accordance with a control signal. First conductive foil is disposed on a first main surface of the light source substrate on which the light emitting diodes are provided. Second conductive foil is disposed on a second main surface of the light source substrate on a side opposite to the first main surface. Ground pattern foil is disposed as the second conductive foil on the second main surface in regions each of which includes a corresponding one of the plurality of light emitting diodes in a plan view. The first conductive foil and the second conductive foil have a substantially equivalent area.

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