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1. 发明公开

EP3058684A4 NETWORK INTERFACE 有权转让
标题翻译： NETZWERKSCHNITTSTELLE
公开(公告)号：EP3058684A4
公开(公告)日：2017-07-19
申请号：EP14854137
申请日：2014-10-17
申请人： ZOMOJO PTY LTD
发明人： CHAPMAN MATTHEW
IPC分类号： H04L12/935 , H04L12/861
CPC分类号： H04L67/2842 , H04L49/9021 , H04L49/9047 , H04L67/1097

2. 发明授权

EP2320609B1 A BUFFER PROCESSING METHOD, A STORE AND FORWARD METHOD AND APPARATUS OF HYBRID SERVICE TRAFFIC 有权
标题翻译：缓存处理，用于混合业务量的存储和传输的方法和装置
公开(公告)号：EP2320609B1
公开(公告)日：2015-02-18
申请号：EP09807855.3
申请日：2009-08-13
申请人： ZTE Corporation
发明人： JIANG, Fan
IPC分类号： H04L12/801 , H04L12/861
CPC分类号： H04L47/10 , H04L49/90 , H04L49/9042 , H04L49/9047

3. 发明授权

EP2507952B1 AN ASSEMBLY AND A METHOD OF RECEIVING AND STORING DATA WHILE SAVING BANDWIDTH BY CONTROLLING UPDATING OF FILL LEVELS OF QUEUES 有权
标题翻译：装置和方法用于接收和存储数据的带宽节省通过更新队列级别
公开(公告)号：EP2507952B1
公开(公告)日：2013-09-18
申请号：EP10795979.3
申请日：2010-12-06
申请人： Napatech A/S
发明人： KORGER, Peter
IPC分类号： H04L12/879
CPC分类号： H04L49/9047 , H04L49/90

4. 发明公开

EP2547048A1 DATA BLOCK READ-OUT CONTROL DEVICE 审中-公开
标题翻译： DATENBLOCKAUSLESESTEUERUNG
公开(公告)号：EP2547048A1
公开(公告)日：2013-01-16
申请号：EP10847440.4
申请日：2010-03-11
申请人： Fujitsu Limited
发明人： TANEDA, Masahiro
IPC分类号： H04L12/56 , H04L13/08 , H04L29/06
CPC分类号： H04L49/901 , H04L49/9047 , H04L69/324
摘要： A data block read-out control apparatus includes: an order buffer that stores an identifier sequence in which sort-unit identifiers corresponding to data blocks stored in reception buffers prepared for each sort unit are arranged in arrival order of the data blocks; a detecting unit that detects a head position of the sort-unit identifiers in the identifier sequence; a determining unit that determines a data block to be read out from one of the reception buffers, based on at least the head position of the sort-unit identifiers and a read-out rule of data blocks from the reception buffers defined in advance; and a reading-out unit that reads out the data block determined in the determining unit, from the one of the reception buffers, wherein the sort-unit identifiers are expressed by a minimum bit number to express all sort units corresponding to the data blocks stored in the reception buffers.
摘要翻译：数据块读出控制装置包括：顺序缓冲器，存储标识符序列，其中与数据块的到达顺序相对应地排列与存储在为每个分类单元准备的接收缓冲器中的数据块对应的分类单元标识符; 检测单元，其检测所述分类单元标识符在所述标识符序列中的头部位置; 至少基于分类单元标识符的头部位置和来自预先定义的接收缓冲器的数据块的读出规则，确定要从接收缓冲器之一读出的数据块的确定单元; 以及读出单元，从所述接收缓冲器中的所述一个中读出在所述确定单元中确定的数据块，其中所述分类单元标识符由最小位数表示，以表示对应于存储的数据块的所有分类单元在接收缓冲区。

5. 发明公开

EP2507950A1 DISTRIBUTED PROCESSING OF DATA FRAMES BY MULITIPLE ADAPTERS USING TIME STAMPING AND A CENTRAL CONTROLLER 有权
标题翻译：分布式数据包处理由多个适配器使用时间戳记和中央控制器
公开(公告)号：EP2507950A1
公开(公告)日：2012-10-10
申请号：EP10795648.4
申请日：2010-12-06
申请人： Napatech A/S
发明人： KORGER, Peter , EKNER, Peter
IPC分类号： H04L12/56 , H04L7/00
CPC分类号： H04L49/9047 , H04L49/901
摘要： An apparatus and a method where a plurality of physically separate data receiving/analyzing elements receive data packets and time stamp these. A controlling unit determines a storing address for each data packet based on at least the time stamp, where the controlling unit does not perform the determination of the address until a predetermined time delay has elapsed after the time of receipt.
摘要翻译：的装置，并且其中物理上分离的数据的多个接收的方法/分析元件接收的数据包和时间戳合成。至少基于所述时间戳，其中，所述控制单元不执行地址的确定，直到接收时间之后的预定时间延迟已经过去bestimmt一存储地址为每个数据分组控制单元。

6. 发明授权

EP1665663B1 A SCALABLE APPROACH TO LARGE SCALE QUEUING THROUGH DYNAMIC RESOURCE ALLOCATION 有权
标题翻译：可扩展的方法长期队列中的动态资源分配
公开(公告)号：EP1665663B1
公开(公告)日：2012-05-30
申请号：EP04757419.9
申请日：2004-08-03
申请人： Cisco Technology, Inc.
发明人： HOFFMAN, Robert , KLOTH, Raymond, J. , FULLI, Alessandro
IPC分类号： H04L12/56
CPC分类号： H04L47/6215 , H04L47/2441 , H04L49/90 , H04L49/9047
摘要： Methods and devices are provided for the efficient allocation and deletion of virtual output queues. According to some implementations, incoming packets are classified accordint to a queue in which the packet (or classification information for the packet) will be stored, e.g., according to a “Q” value. For example, a Q value may be a Q number defined as {Egress port number I I Priority number I I Ingress port number}. Only a single physical queue is allocated for each classification. When a physical queue is empty, the physical queue is preferably de-allocated and added to a “free list” of available physical queues. Accordingly, the total number of allocated physical queues preferably does not exceed the total number of classified packets. Because the input buffering requirements of Fibre Channel (“FC”) and other protocols place limitations on the number of incoming packets, the dynamic allocation methods of the present invention result in a sparse allocation of physical queues.

7. 发明授权

EP2266265B1 SYSTEM AND METHOD FOR MEMORY ALLOCATION IN EMBEDDED OR WIRELESS COMMUNICATION SYSTEMS 有权
标题翻译：系统和方法进行内存分配在嵌入式或无线通信系统
公开(公告)号：EP2266265B1
公开(公告)日：2011-07-13
申请号：EP09727041.7
申请日：2009-04-02
申请人： QUALCOMM Incorporated
发明人： MAHESHWARI, Shailesh , KLINGENBRUNN, Thomas , KUMAR, Vanitha, A.
IPC分类号： H04L12/56
CPC分类号： H04L49/9047 , H04L49/90
摘要： Systems and methods for an improved memory allocation service in embedded or wireless devices. Memory is allocated using a combination of container memory items and referencing memory items.

8. 发明公开

EP1854248A4 METHOD AND SYSTEM FOR SHAPING TRAFFIC IN A PARALLEL QUEUING HIERARCHY 有权
标题翻译：方法和系统的流量在平行层次队列表格
公开(公告)号：EP1854248A4
公开(公告)日：2011-01-05
申请号：EP06734335
申请日：2006-02-06
申请人： CISCO TECH INC
发明人： BURNS BARRY S , HILTSCHER BRIAN , TATAR MOHAMMED ISMAEL , WEBSTER TIM
IPC分类号： H04L12/28
CPC分类号： H04L49/90 , H04L47/10 , H04L47/215 , H04L47/50 , H04L47/60 , H04L47/6215 , H04L49/9047

9. 发明公开

EP2266265A1 SYSTEM AND METHOD FOR MEMORY ALLOCATION IN EMBEDDED OR WIRELESS COMMUNICATION SYSTEMS 有权
标题翻译：系统和方法进行内存分配在嵌入式或无线通信系统
公开(公告)号：EP2266265A1
公开(公告)日：2010-12-29
申请号：EP09727041.7
申请日：2009-04-02
申请人： QUALCOMM Incorporated
发明人： MAHESHWARI, Shailesh , KLINGENBRUNN, Thomas , KUMAR, Vanitha, A.
IPC分类号： H04L12/56
CPC分类号： H04L49/9047 , H04L49/90
摘要： Systems and methods for an improved memory allocation service in embedded or wireless devices. Memory is allocated using a combination of container memory items and referencing memory items.

10. 发明授权

EP1086552B1 OPTIMIZING THE TRANSFER OF DATA PACKETS BETWEEN LANS 有权
标题翻译： BETWEEN LANS传送数据分组的优化
公开(公告)号：EP1086552B1
公开(公告)日：2009-11-25
申请号：EP99927458.2
申请日：1999-06-10
申请人： ENTERASYS NETWORKS, INC.
发明人： BAUMERT, Robert, J. , SEAMAN, Anthony, W. , STAVES, Sherre, M.
IPC分类号： H04L12/28 , H04L12/56 , H04L12/44
CPC分类号： H04L49/9047 , H04L49/3018 , H04L49/3027 , H04L49/351 , H04L49/90 , H04L49/901 , H04L49/9042 , H04L49/9057 , H04L49/9089
摘要： A switch apparatus (10) for optimizing the transfer of data packets between a plurality of local area networks (LANs (12, 14, 16)). Apparatus of the present invention are comprised of multiple controllers (23), e.g., a receive controller (24), and a transmit controller (25), which share common resources including a first memory (a packet memory (20)) which stores the data packets, a second memory (a descriptor memory (22)) which stores pointers to the stored data packets, and buffered data paths (preferably using FIFO buffers (178, 108)). The independent controllers (25, 24) operate essentially concurrently for most tasks while interleaving their use of the shared resources (20, 22). Consequently, embodiments of the present invention can simultaneously receive and transmit data across multiple LAN data ports (18a, 18b, 18N) (e.g., 28 Ethernet ports comprised of 10/100 and/or 10 Mbps ports).

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