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1. 发明公开

EP0104852A3 Audio amplifier 失效
标题翻译：音频放大器
公开(公告)号：EP0104852A3
公开(公告)日：1986-07-30
申请号：EP83305472
申请日：1983-09-19
申请人： Hochstein, Peter A. , Shih, Kelvin
发明人： Hochstein, Peter A.
IPC分类号： H03F03/30 , H03F01/30
CPC分类号： H03F3/3066 , H03F1/301 , H03F1/308 , H03F3/3008 , H03F3/3022 , H03F3/3059 , H03F2200/516 , H03F2203/30048
摘要： An amplifier circuit for an audio speaker 12. The circuit includes a conventional operational amplifier 16 connected to a positive voltage supply rail 24 and a negative voltage supply rail 26 through a positive voltage regulator 28 and a negative voltage regulator 30. The circuit is characterized by a P channel MOS-FET 32 having a source 34 connected to the positive rail 24 and a drain 36 connected to the speaker 12 and a gate 38, and an N channel MOS-FET 40 having a source 42 connected to the negative rail 26 and a drain 44 connected to the speaker 12 and a gate 46. A NPN voltage level-shifting and driver stage 48 is responsive to the output 56 of the operational amplifier 16 for establishing a voltage differential between the gate 38 of the P channel MOS-FET 32 and the positive rail 24 to drive the P channel MOS-FET 32 into conduction. A PNP voltage level-shifting and driver stage 50 is responsive to the output 56 of the operational amplifier 16 for establishing a voltage differential between the gate 46 of the N channel MOS-FET 40 and the negative rail 26 to drive the N channel MOS-FET 40 into conduction. The driver stages 48, 50 are connected to ground 52. A positive side feedback circuit 94 interconnects the drain 36 of the P channel MOS-FET 32 and the ground 52 side of the positive driver stage 48, and a negative side feedback circuit 96 interconnects the drain 44 of the N channel MOS-FET 40 and the ground 52 side of the negative driver stage 50. A system feedback circuit 98 interconnects the speaker 12 and the operational amplifier 16 for returning a small portion of the system output voltage to the operational amplifier 16 to cause the system output signal to faithfully track the signal at the audio input to the operational amplifier 16. A PNP auxiliary transistor 68 has its base 72 connected to the source 34 of the P channel MOS-FET 32 and its emitter 70 connected to the positive rail 24 and its collector 76 connected to the system output 12, and an NPN auxiliary transistor 82 has its base 84 connected to the source 42 of the N channel MOS-FET 40 and its emitter 87 connected to the negative rail 24 and its collector 90 connected to the system output 12.

2. 发明公开

EP0066572A4 DRIVER CIRCUIT HAVING REDUCED CROSS-OVER DISTORTION. 失效
标题翻译：具有减少空PASSAGE失真驱动电路。
公开(公告)号：EP0066572A4
公开(公告)日：1983-04-18
申请号：EP81902936
申请日：1981-10-28
申请人： MOTOROLA INC
发明人： WHATLEY ROGER A
IPC分类号： H03F1/32 , H03F3/20 , H03F3/213 , H03F3/30
CPC分类号： H03F3/45179 , H03F1/3205 , H03F3/3008 , H03F2203/30021 , H03F2203/45224

3. 发明公开

EP0037406A4 CMOS OPERATIONAL AMPLIFIER WITH REDUCED POWER DISSIPATION. 失效
标题翻译： CMOS - 可降低功耗运算放大器。
公开(公告)号：EP0037406A4
公开(公告)日：1982-02-05
申请号：EP80901914
申请日：1981-04-08
申请人： AMERICAN MICRO SYST
发明人： HAQUE YUSUF AMINUL
IPC分类号： H03F3/16 , H03F3/18 , H03F3/26 , H03F3/30 , H03F3/45
CPC分类号： H03F3/45179 , H03F3/3001 , H03F3/3008 , H03F3/3025 , H03F3/45183 , H03F2203/30018 , H03F2203/30033 , H03F2203/30036 , H03F2203/45188 , H03F2203/45224 , H03F2203/45508 , H03F2203/45674 , H03F2203/45692
摘要： Operational amplifier (10) comprised of MOSFET elements which provides for a variable drive for an output stage (18) that results in lower power dissipation and increased gain factor over comparable circuits using constant bias drive for the output stage. A bias section (14) comprised of complementary MOS elements (24, 26) is connected to a single MOSFET (40) that furnishes constant current to the signal input section of a differential amplifier section (20). The output of this differential amplifier is furnished by one path directly to one complementary MOSFET element (72) of a high impedance output stage and by another path to a level shift section (16) which provides an output to a second complementary MOSFET element (80) of the output stage. Thus, the circuit functions under class A-B operation at low power dissipation and provides high open loop gain. Additional embodiments of the invention utilize three MOSFET elements (104, 106, 108) in the level shift section or an additional output stage having an NPN transistor (120) in combination with an N channel MOSFET (122).

4. 发明公开

EP1753127A1 Zero cancellation in multiloop regulator control scheme 审中-公开
标题翻译：多回路调节器控制方案中的零点消除
公开(公告)号：EP1753127A1
公开(公告)日：2007-02-14
申请号：EP06117761.4
申请日：2006-07-24
申请人： Micrel, Inc.
发明人： Ritter, David W.
IPC分类号： H03F1/34
CPC分类号： H03F1/34 , H03F3/30 , H03F3/3001 , H03F3/3008 , H03F3/45085 , H03F2200/78
摘要： Control loops in a voltage regulator can be stabilized using minimal silicon area. A current limit signal, generated by a current limit control loop in the voltage regulator, can be divided to minimize a zero provided in a compensation set associated with a voltage control loop, thereby stabilizing both loops. The compensation set can include a resistor (the zero) and a capacitor (a pole) connected in series between output and input terminals of an amplifier. Dividing the current limit signal can include injecting a first portion of the current limit signal on a first side of the resistor and injecting a second portion of the current limit signal on a second side of the resistor. The ratio of the first and second portions can be based on a gain of the amplifier, thereby minimizing an effect of the resistor.
摘要翻译：使用最小的硅面积可以稳定电压调节器中的控制回路。由电压调节器中的电流限制控制回路产生的电流限制信号可以被分开以最小化在与电压控制回路相关联的补偿组中提供的零，从而稳定两个回路。补偿装置可以包括串联连接在放大器的输出和输入端之间的电阻器（零点）和电容器（极点）。划分电流限制信号可以包括在电阻器的第一侧上注入电流限制信号的第一部分，并且在电阻器的第二侧上注入电流限制信号的第二部分。第一和第二部分的比率可以基于放大器的增益，从而使电阻器的影响最小化。

5. 发明公开

EP1183858A2 SLIC ARCHITECTURE AND INTERFACES 有权
标题翻译：架构和接口FOR SLIC
公开(公告)号：EP1183858A2
公开(公告)日：2002-03-06
申请号：EP00936389.6
申请日：2000-05-26
申请人： Broadcom Corporation
发明人： CAINE, Steven, L. , BROOKS, Todd, L.
IPC分类号： H04M19/00
CPC分类号： H04L25/0292 , H03F3/3008 , H03F3/3069 , H03F3/3071 , H03F3/45179 , H03F3/45282 , H03F3/68 , H03F2203/45352 , H03F2203/45526 , H03F2203/45674 , H03F2203/45716 , H04L25/0272 , H04L25/0274 , H04L25/0276 , H04L25/0278 , H04L25/028 , H04L25/0284 , H04M19/005
摘要： A CODEC and a SLIC assembly perform current-sensing-voltage synthesis impedance matching and DC feed control functions. Signal processing that does not require high voltage, such as impedance matching and DC feed control, is performed in the digital domain by the CODEC while the SLIC assembly includes high voltage circuitry. This configuration is useful for Voice over Internet Protocol (VoIP) applications with a short subscriber line loop or other long loop applications. The SLIC includes high voltage operational amplifiers (op amps) to drive ring and tip signals. Bipolar transistors are also provided as bias compensating diodes for bias point stabilization over dynamic operating conditions such as temperature. The high voltage op amps include a composite MOSFET-bipolar complimentary symmetry driver stage that offers the bias control and stability of a bipolar device topology and drive capabilities of a power MOSFET device.

6. 发明公开

EP0719474A1 BiCMOS-OPERATIONSVERSTÄRKER FÜR SCHALTER-KONDENSATOR-SCHALTUNGEN 失效
标题翻译：的BiCMOS运算放大器用于开关电容电路
公开(公告)号：EP0719474A1
公开(公告)日：1996-07-03
申请号：EP94925350.0
申请日：1994-09-07
申请人： SIEMENS AKTIENGESELLSCHAFT
发明人： NEBEL, Gerhard , GEORGAKOS, Georg , KLEINE, Ulrich Dr.
IPC分类号： H03F3
CPC分类号： H03F3/45179 , H03F3/3008 , H03F3/45188 , H03F3/45278 , H03F3/45726 , H03F2200/153 , H03F2203/30084 , H03F2203/30087 , H03F2203/30117 , H03F2203/30156 , H03F2203/45024 , H03F2203/45192 , H03F2203/45221 , H03F2203/45268 , H03F2203/45296 , H03F2203/45398 , H03F2203/45508 , H03F2203/45732
摘要： An operational amplifier with a high input resistance and a high bandwidth particularly suitable for capacitive loads and which above all keeps its operating point within narrow limits independently of technological fluctuations uses bipolar cascodes (Q6, Q16, Q7, Q17) as output branches which are driven with high resistivity through PMOS cascode transistors (M6, M7) directly by the differential amplifier transistor pair (M4, M5). The current is thus uncoupled and the operating point of the operational amplifier is kept constant even when technological fluctuations are taken in account.

7. 发明授权

EP0657995B1 Mixed typology output stage 失效转让
标题翻译：具有不同类型的晶体管输出级
公开(公告)号：EP0657995B1
公开(公告)日：1999-10-13
申请号：EP93830492.0
申请日：1993-12-07
申请人： STMicroelectronics S.r.l.
发明人： Cini, Carlo , Stefani, Fabrizio
IPC分类号： H03F3/30
CPC分类号： H03F3/45179 , H03F3/3008 , H03F2203/30012 , H03F2203/30051

8. 发明授权

EP0492374B1 Unitary-gain final stage particularly for monolithically integratable power amplifiers 失效
标题翻译：放大器单位增益特别是单片集成的功率放大器
公开(公告)号：EP0492374B1
公开(公告)日：1996-02-07
申请号：EP91121650.5
申请日：1991-12-17
申请人： SGS-THOMSON MICROELECTRONICS S.r.l.
发明人： Botti, Edoardo , Brasca, Guido
IPC分类号： H03F3/30
CPC分类号： H03F3/45286 , H03F3/3008 , H03F3/3037 , H03F3/45291 , H03F2203/45028 , H03F2203/45188 , H03F2203/45471

9. 发明授权

EP0160035B1 HIGH EFFICIENCY IGFET OPERATIONAL AMPLIFIER 失效
标题翻译：高效IGFET操作放大器
公开(公告)号：EP0160035B1
公开(公告)日：1988-06-08
申请号：EP84903863.3
申请日：1984-10-10
申请人： Hughes Aircraft Company
发明人： LUCAS, Charles, H. , LEWYN, Lany, L.
IPC分类号： H03F3/30
CPC分类号： H03F3/3008
摘要： An operational amplifier circuit including an output stage which requires relatively low operating current to achieve a desired transconductance in order to permit improved driving of a capacitive load.

10. 发明公开

EP0657995A1 Mixed typology output stage 失效转让
标题翻译： Ausgangstufe mit Transistoren von unterschiedlichem Typ。
公开(公告)号：EP0657995A1
公开(公告)日：1995-06-14
申请号：EP93830492.0
申请日：1993-12-07
申请人： SGS-THOMSON MICROELECTRONICS S.r.l.
发明人： Cini, Carlo , Stefani, Fabrizio
IPC分类号： H03F3/30
CPC分类号： H03F3/45179 , H03F3/3008 , H03F2203/30012 , H03F2203/30051
摘要： An output power stage composed of a pair of transistors driven in phase opposition and wherein the pull-up transistor is a PNP bipolar transistor and the push-down transistor is an n-channel FET has an outstandingly improved power handling capability per semiconductor area occupied, coupled with a large output voltage swing, without requiring the use of externally connected discrete boot-strap components. The "hybrid" output stage is fully complementary and the current-driven, bipolar, pull-up transistor may be driven through an auxiliary stage composed of a field effect transistor for substantially eliminating output power requisites of a signal amplification stage.
摘要翻译：由相位相对驱动的一对晶体管组成的输出功率级，其中上拉晶体管是PNP双极晶体管，并且下拉式晶体管是n沟道FET，每占用半导体面积的功率处理能力显着提高，加上大的输出电压摆幅，而不需要使用外部连接的分立的引导部件。 “混合”输出级是完全互补的，并且电流驱动的双极性上拉晶体管可以通过由场效应晶体管组成的辅助级驱动，用于基本上消除信号放大级的输出功率必需品。

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