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    • 5. 发明公开
      EP4391044A1 DOHERTY AMPLIFIER 审中-公开
    • DOHERTY AMPLIFIER
    • EP4391044A1
    • 2024-06-26
    • EP23214905.4
    • 2023-12-07
    • Sumitomo Electric Device Innovations, Inc.
    • Wong, James , Kawasaki, Kento
    • H01L23/482 , H01L23/66 , H03F1/02 , H01L27/02 , H01L29/20 , H01L29/417 , H01L29/778
    • H03F1/0288 , H01L23/4824 , H01L23/66 , H01L2223/664420130101 , H01L2223/665520130101 , H01L27/0207 , H01L29/41758 , H01L29/2003 , H01L29/7786
    • A Doherty amplifier according to the present disclosure includes a substrate, a first transistor provided on the substrate, the first transistor including a plurality of first gate electrodes extending in a first direction, a plurality of first drain electrodes extending in the first direction, a first gate bus bar to which a first signal of two signals obtained by dividing an input signal is input and to which the plurality of first gate electrodes are electrically connected, and a first drain bus bar provided so as to dispose the plurality of first gate electrodes and the plurality of first drain electrodes between the first gate bus bar and the first drain bus bar, the plurality of first drain electrodes being electrically connected to the first drain bus bar, a second transistor provided on the substrate, the transistor including a plurality of second gate electrodes extending in a second direction, a plurality of second drain electrodes extending in the second direction, a second gate bus bar having a first end to which a second signal of the two signals is input, the plurality of second gate electrodes being electrically connected to the second gate bus bar, and a second drain bus bar provided so as to dispose the plurality of second gate electrodes and the plurality of second drain electrodes between the second gate bus bar and the second drain bus bar, the plurality of second drain electrodes being electrically connected to the second drain bus bar, a combining node provided on the substrate and combining the first signal amplified by the first transistor and the second signal amplified by the second transistor, a first line provided on the substrate and connecting the first drain bus bar and the combining node, and a second line provided on the substrate, connecting the second drain bus bar and the combining node, and connected to a second end of the second drain bus bar located diagonally across the second transistor with respect to the first end.
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