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1. 发明公开

EP2830214A3 PVT tolerant differential circuit 有权转让
标题翻译： PVT容差微分电路
公开(公告)号：EP2830214A3
公开(公告)日：2015-06-10
申请号：EP14176819.2
申请日：2014-07-11
申请人： Samsung Display Co., Ltd.
发明人： Hekmat, Mohammad , Amirkhany, Amir
IPC分类号： H03F3/45 , H03K5/08 , H04L25/06 , H04L25/49
CPC分类号： H03F3/45183 , H03F2200/453 , H03F2203/45048 , H03F2203/45244 , H04L25/0272 , H04L25/4919
摘要： An automatically calibrated differential amplifier including: an input stage differential amplifier configured to receive a input differential signal, to differentially amplify the input differential signal to generate an input stage output differential signal, and to have an input stage bias current; and a replica stage differential amplifier configured to automatically calibrate the input stage bias current in response to process or environmental variations. The differential amplifier may be included, for example, in a comparator and a multilevel receiver.
摘要翻译：一种自动校准的差分放大器，包括：输入级差分放大器，被配置为接收输入差分信号，差分放大输入差分信号以生成输入级输出差分信号，并且具有输入级偏置电流; 以及配置成响应于过程或环境变化自动校准输入级偏置电流的复制级差分放大器。差分放大器可以被包括在例如比较器和多级接收器中。

2. 发明授权

EP2858243B1 An offset cancellation technique for duty cycle correction loops 有权转让
公开(公告)号：EP2858243B1
公开(公告)日：2019-03-13
申请号：EP14185883.7
申请日：2014-09-23
申请人： Samsung Display Co., Ltd.
发明人： Amirkhany, Amir , Hekmat, Mohammad
IPC分类号： H03K5/156 , H03K3/017

3. 发明授权

EP2869518B1 A body-biased slicer design for predictive decision feedback equalizers 有权转让
公开(公告)号：EP2869518B1
公开(公告)日：2018-05-23
申请号：EP14189173.9
申请日：2014-10-16
申请人： Samsung Display Co., Ltd.
发明人： Hekmat, Mohammad , Amirkhany, Amir
IPC分类号： G09G5/00 , H03M1/00 , H03M1/70 , H04L25/03
CPC分类号： H04L25/03057 , G09G5/006 , G09G2310/0297 , G09G2330/021 , H03M1/002 , H03M1/70 , H04L25/03146 , H04L25/03878
摘要： A predictive decision feedback equalizer using body bias of one or more field effect transistors (FETs) to provide an offset for a predictive tap. In one embodiment, a predictive tap of the predictive decision feedback equalizer includes a differential amplifier composed of two FETs in a differential amplifier configuration, and the body bias of one or both FETs is controlled to provide an offset in the differential amplifier. In one embodiment a current DAC driving a DAC resistor is used to provide the body bias voltage, and a feedback circuit, including a replica circuit forming the maximum possible DAC output voltage, is used to control the bias of the current sources of the current DAC.

4. 发明公开

EP2797272A1 Stacked comparator topology for multi-level signaling 有权转让
标题翻译： Gestapelte Vergleichertopologie zur mehrstufigen Signalisierung
公开(公告)号：EP2797272A1
公开(公告)日：2014-10-29
申请号：EP14165517.5
申请日：2014-04-22
申请人： Samsung Display Co., Ltd.
发明人： Hekmat, Mohammad
IPC分类号： H04L25/49 , H04L25/06
CPC分类号： H04L27/06 , H03M1/002 , H03M1/361 , H03M5/20 , H04L25/03878 , H04L25/066 , H04L25/4917
摘要： A system and method for detecting signal levels in a multi-level signaling receiver. In one embodiment, a plurality of comparators, each including a differential pair, such as a differential pair of field-effect transistors (FETs) are assembled in a stacked configuration so that in some states current flows through FETs of the plurality of differential pairs in series, resulting in a reduction in power consumption.
摘要翻译：一种用于检测多级信令接收机中的信号电平的系统和方法。在一个实施例中，每个包括差分对（例如差分对的场效应晶体管（FET））的多个比较器以堆叠配置组装，使得在一些状态下，电流流过多个差分对的FET 系列，导致功耗降低。

5. 发明授权

EP2830214B1 PVT tolerant differential circuit 有权转让
公开(公告)号：EP2830214B1
公开(公告)日：2018-11-21
申请号：EP14176819.2
申请日：2014-07-11
申请人： Samsung Display Co., Ltd.
发明人： Hekmat, Mohammad , Amirkhany, Amir
IPC分类号： H03F3/45 , H03K5/08 , H04L25/06 , H04L25/49
CPC分类号： H03F3/45183 , H03F2200/453 , H03F2203/45048 , H03F2203/45244 , H04L25/0272 , H04L25/4919
摘要： An automatically calibrated differential amplifier including: an input stage differential amplifier configured to receive a input differential signal, to differentially amplify the input differential signal to generate an input stage output differential signal, and to have an input stage bias current; and a replica stage differential amplifier configured to automatically calibrate the input stage bias current in response to process or environmental variations. The differential amplifier may be included, for example, in a comparator and a multilevel receiver.

6. 发明授权

EP2797231B1 Mismatched differential circuit 有权转让
公开(公告)号：EP2797231B1
公开(公告)日：2018-10-10
申请号：EP14165501.9
申请日：2014-04-22
申请人： Samsung Display Co., Ltd.
发明人： Hekmat, Mohammad , Amirkhany, Amir
IPC分类号： H03F3/45 , H03K5/08
CPC分类号： H03F3/45179 , H03F3/45183 , H03K5/082 , H04L25/4917
摘要： A differential amplifier including: a first amplifier leg including a first transistor, and a second amplifier leg including a second transistor. Here, the first transistor is configured to have a bulk potential different from a bulk potential of the second transistor. The first amplifier leg and the second amplifier leg, together, may be configured to differentially amplify a received differential input signal. The differential amplifier may be configured to have an input offset voltage, which corresponds to the difference between the bulk potential of the first transistor and the bulk potential of the second transistor. The differential amplifier may be at an input stage of a comparator.

7. 发明公开

EP2869518A1 A body-biased slicer design for predictive decision feedback equalizers 有权转让
标题翻译：决策反馈均衡器KörpervorgespanntesSlicer-Designfürprädiktive决策反馈均衡器
公开(公告)号：EP2869518A1
公开(公告)日：2015-05-06
申请号：EP14189173.9
申请日：2014-10-16
申请人： Samsung Display Co., Ltd.
发明人： Hekmat, Mohammad , Amirkhany, Amir
IPC分类号： H04L25/03
CPC分类号： H04L25/03057 , G09G5/006 , G09G2310/0297 , G09G2330/021 , H03M1/002 , H03M1/70 , H04L25/03146 , H04L25/03878
摘要： A predictive decision feedback equalizer using body bias of one or more field effect transistors (FETs) to provide an offset for a predictive tap. In one embodiment, a predictive tap of the predictive decision feedback equalizer includes a differential amplifier composed of two FETs in a differential amplifier configuration, and the body bias of one or both FETs is controlled to provide an offset in the differential amplifier. In one embodiment a current DAC driving a DAC resistor is used to provide the body bias voltage, and a feedback circuit, including a replica circuit forming the maximum possible DAC output voltage, is used to control the bias of the current sources of the current DAC.
摘要翻译：使用一个或多个场效应晶体管（FET）的体偏置来提供预测抽头的偏移的预测判决反馈均衡器。在一个实施例中，预测判决反馈均衡器的预测抽头包括由差分放大器配置中的两个FET组成的差分放大器，并且控制一个或两个FET的体偏置以在差分放大器中提供偏移。在一个实施例中，驱动DAC电阻器的电流DAC用于提供体偏置电压，并且包括形成最大可能DAC输出电压的复制电路的反馈电路用于控制电流DAC的电流源的偏置。

8. 发明公开

EP2830214A2 PVT tolerant differential circuit 有权转让
标题翻译： PVT容忍差异化
公开(公告)号：EP2830214A2
公开(公告)日：2015-01-28
申请号：EP14176819.2
申请日：2014-07-11
申请人： Samsung Display Co., Ltd.
发明人： Hekmat, Mohammad , Amirkhany, Amir
IPC分类号： H03F3/45 , H03K5/08 , H04L25/06 , H04L25/49
CPC分类号： H03F3/45183 , H03F2200/453 , H03F2203/45048 , H03F2203/45244 , H04L25/0272 , H04L25/4919
摘要： An automatically calibrated differential amplifier including: an input stage differential amplifier configured to receive a input differential signal, to differentially amplify the input differential signal to generate an input stage output differential signal, and to have an input stage bias current; and a replica stage differential amplifier configured to automatically calibrate the input stage bias current in response to process or environmental variations. The differential amplifier may be included, for example, in a comparator and a multilevel receiver.
摘要翻译：一种自动校准的差分放大器，包括：输入级差分放大器，被配置为接收输入差分信号，差分放大输入差分信号以产生输入级输出差分信号，并具有输入级偏置电流; 以及复制级差分放大器，被配置为响应于过程或环境变化自动校准输入级偏置电流。差分放大器可以包括在例如比较器和多电平接收器中。

9. 发明授权

EP2797272B1 Stacked comparator topology for multi-level signaling 有权转让
标题翻译：用于多级信令的堆叠比较器拓扑
公开(公告)号：EP2797272B1
公开(公告)日：2018-01-31
申请号：EP14165517.5
申请日：2014-04-22
申请人： Samsung Display Co., Ltd.
发明人： Hekmat, Mohammad
IPC分类号： H03M1/00 , H03M1/36 , H04L25/49 , H04L25/05 , H03M5/20 , H04L25/03 , H04L27/06 , H04L25/06
CPC分类号： H04L27/06 , H03M1/002 , H03M1/361 , H03M5/20 , H04L25/03878 , H04L25/066 , H04L25/4917
摘要： A system and method for detecting signal levels in a multi-level signaling receiver. In one embodiment, a plurality of comparators, each including a differential pair, such as a differential pair of field-effect transistors (FETs) are assembled in a stacked configuration so that in some states current flows through FETs of the plurality of differential pairs in series, resulting in a reduction in power consumption.

10. 发明公开

EP2858243A1 An offset cancellation technique for duty cycle correction loops 有权转让
标题翻译： OffsetunterdrückungstechnikfürDienstzykluskorrekturschleifen
公开(公告)号：EP2858243A1
公开(公告)日：2015-04-08
申请号：EP14185883.7
申请日：2014-09-23
申请人： Samsung Display Co., Ltd.
发明人： Amirkhany, Amir , Hekmat, Mohammad
IPC分类号： H03K5/156
CPC分类号： H03K3/017 , H03K5/1565
摘要： An electronic device (300) includes a clock (302) configured to transmit a first clock signal (CKIN) and a second clock signal (/CKIN) for operation of the electronic device; a duty cycle corrector (304, 308, 310) coupled to the clock (302) to correct a duty cycle of the first and second clock signals, the duty cycle corrector (304, 308, 310) being configured to: assign and store a first duty cycle correction code in response to the first clock signal (CKIN); assign and store a second duty cycle correction code in response to the second clock signal (/CKIN); calculate an offset code based on the first and second duty cycle correction codes; and negate the offset code from results of duty cycle correction operations.
摘要翻译：电子设备（300）包括：时钟（302），被配置为发送用于电子设备操作的第一时钟信号（CKIN）和第二时钟信号（/ CKIN）; 占空比校正器（304,308,310），其耦合到所述时钟（302）以校正所述第一和第二时钟信号的占空比，所述占空比校正器（304,308,310）被配置为：分配和存储响应于第一时钟信号（CKIN）的第一占空比校正码; 响应于第二时钟信号（/ CKIN）分配和存储第二占空比校正码; 基于第一和第二占空比校正码计算偏移码; 并且将偏移代码与占空比校正操作的结果否定。

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