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1. 发明授权

EP1148648B1 Frequency synthesizer 有权
标题翻译：频率合成器
公开(公告)号：EP1148648B1
公开(公告)日：2004-08-11
申请号：EP01101974.2
申请日：2001-01-29
申请人： Matsushita Electric Industrial Co., Ltd.
发明人： Yamada, Ryoichi , Hirano, Shunsuke , Miyahara, Yasunori , Adachi, Hisashi , Takahashi, Hisashi , Kojima, Hiroki
IPC分类号： H03L7/197
CPC分类号： H03L7/1976

2. 发明公开

EP1098433A3 Frequency synthesizer and oscillation frequency control method 有权
标题翻译：频率合成器和振荡频率控制
公开(公告)号：EP1098433A3
公开(公告)日：2004-03-17
申请号：EP00123582.9
申请日：2000-10-27
申请人： MATSUSHITA ELECTRIC INDUSTRIAL CO., LTD.
发明人： Hirano, Shunsuke
IPC分类号： H03B21/02 , H03L7/099 , H03L7/197
CPC分类号： H03L7/1976 , H03B21/02
摘要： Accumulator 201 accumulates data K (K: integer) for every clock and outputs a carry-out signal at the time of an overflow. Random signal generator 202 outputs a random signal for every clock. Adder 203 adds the carry-out signal and random signal to data M (M: integer), changes the frequency dividing ratio randomly and converts spurious to white noise. This makes it possible to optimally maintain the spurious characteristic, shorten the lockup time and reduce power consumption.

3. 发明公开

EP1324503A2 Direct conversion receiver, mobile radio equipment using the same, and RF signal receiving method 审中-公开
标题翻译：移动电台，电台，电台，电台，电台
公开(公告)号：EP1324503A2
公开(公告)日：2003-07-02
申请号：EP02026577.3
申请日：2002-11-28
申请人： MATSUSHITA ELECTRIC INDUSTRIAL CO., LTD
发明人： Hirano, Shunsuke , Miyahara, Yasunori
IPC分类号： H04B1/30
CPC分类号： H04B1/30
摘要： In a direction conversion receiver, a quadrature demodulator produces differential signals in a baseband on the basis of a local signal of a frequency synthesizer, with the differential signals being inputted through a first low pass filter, a gain control amplifier and an amplifier to a control unit and a direct current component between the differential signals being extracted in a second low pass filter. In addition, an offset compensating section reduces an offset voltage while the control unit outputs a control signal for the control of the gain control amplifier. The second low pass filter includes a time constant circuit for determining a time constant through the use of resistors and a capacitor, and a time constant changing section. A time constant control unit controls the time constant changing section for a predetermined period of time after the control unit outputs data for the change of a frequency of the local signal so that the time constant of the time constant circuit decreases. This shortens the time needed for the settlement of automatic gain control and prevents the deterioration of demodulation accuracy during a call.
摘要翻译：在方向转换接收机中，正交解调器基于频率合成器的本地信号在基带中产生差分信号，差分信号通过第一低通滤波器，增益控制放大器和放大器输入到控制器单元和在第二低通滤波器中提取的差分信号之间的直流分量。此外，偏移补偿部分减小偏移电压，同时控制单元输出用于控制增益控制放大器的控制信号。第二低通滤波器包括用于通过使用电阻器和电容器确定时间常数的时间常数电路和时间常数变化部分。时间常数控制单元在控制单元输出用于改变本地信号的频率的数据之后的预定时间段来控制时间常数变化部分，使得时间常数电路的时间常数减小。这缩短了自动增益控制结算所需的时间，并防止了通话过程中解调精度的恶化。

4. 发明授权

EP1111793B1 Frequency synthesizer apparatus equipped with delta-sigma modulator in fraction part control circuit 有权
$Frequency synthesizer apparatus equipped with delta-sigma modulator in fraction part control circuit$
标题翻译：与分数和Δ-Σ调制器的频率合成器，以控制的小数部分
公开(公告)号：EP1111793B1
公开(公告)日：2003-11-05
申请号：EP00127119.6
申请日：2000-12-12
申请人： MATSUSHITA ELECTRIC INDUSTRIAL CO., LTD.
发明人： Adachi, Hisashi , Nakatani, Toshifumi , Kosugi, Hiroaki , Maeda, Masakatsu , Hirano, Shunsuke
IPC分类号： H03L7/197
CPC分类号： H03L7/1976

5. 发明公开

EP1168627A3 Frequency synthesizer 有权
标题翻译：频率合成器
公开(公告)号：EP1168627A3
公开(公告)日：2003-10-15
申请号：EP01113077.0
申请日：2001-05-29
申请人： Matsushita Electric Industrial Co., Ltd.
发明人： Hirano, Shunsuke , Yamada, Ryoichi , Miyahara, Yasunori , Hiraoka, Yukio , Adachi, Hisashi
IPC分类号： H03L7/18 , H03L7/099 , H03L7/10 , H03L7/089 , H04Q7/30 , H04Q7/32 , H03L7/113
CPC分类号： H03L7/0898 , H03L7/087 , H03L7/099 , H03L7/107 , H03L7/113 , H03L7/199
摘要： A frequency synthesizer is provided with a prescaler 2 and a counter 3, which output a signal having a frequency generated by frequency-dividing an output signal of a VCO 1; a reference frequency divider 5 for frequency-dividing a frequency of a reference signal of a reference signal source 4; a frequency adjusting meas 9 operated in such that a frequency error between the output signal of the counter 5 and the output signal of the reference frequency divider 5 is detected, and in response to this detection result, such a signal is outputted by which either a capacitor value or an inductor value employed in a resonant circuit of the VCO 1 is switched; and also a bias control means for applying an arbitrary voltage V1 to a control voltage terminal of the VCO 1 so as to bring an output signal of a charge pump 7 into a high impedance state when the frequency adjusting means 9 is operated. Since the resonant frequency of the resonant circuit is changed in response to an actual oscillation frequency of the VCO 1, the frequency synthesizer can be phase-locked at a desirable frequency. Also, since the VCO can be manufactured in the IC form, the compact VCO can be made in low cost.

6. 发明公开

EP1148648A1 Frequency synthesizer 有权
标题翻译： Frequenzsynthetisierer
公开(公告)号：EP1148648A1
公开(公告)日：2001-10-24
申请号：EP01101974.2
申请日：2001-01-29
申请人： Matsushita Electric Industrial Co., Ltd.
发明人： Yamada, Ryoichi , Hirano, Shunsuke , Miyahara, Yasunori , Adachi, Hisashi , Takahashi, Hisashi , Kojima, Hiroki
IPC分类号： H03L7/197
CPC分类号： H03L7/1976
摘要： A frequency synthesizer device comprising a PLL circuit (9) and a frequency-division ratio control circuit (5). The PLL circuit (9) includes a phase comparator (1), a low-pass filter (2), a voltage-controlled oscillator (3), and a variable frequency divider (4). The frequency-division ratio control circuit (5) controls the variable frequency divider (4) such that a frequency division ratio of the variable frequency divider (4) is changed in time and a time average value of the frequency division ratio contains a value below a decimal point. Two different signals of an output signal fdiv of the variable frequency divider (4) and an output fdiv2 obtained via a delay element (10) are used as clocks of an accumulator portion (81) in the frequency-division ratio control circuit (5). The variation in the substrate potential and the variation in the power supply voltage generated by the operation of the frequency-division ratio control circuit (5) can be reduced, and the degradation of C/N of the frequency synthesizer can be suppressed.
摘要翻译：一种频率合成器装置，包括PLL电路（9）和分频比控制电路（5）。 PLL电路（9）包括相位比较器（1），低通滤波器（2），压控振荡器（3）和可变分频器（4）。分频比控制电路（5）控制可变分频器（4），使得可变分频器（4）的分频比在时间上改变，并且分频比的时间平均值包含低于小数点。使用分频比控制电路（5）中的可变分频器（4）的输出信号fdiv和通过延迟元件（10）获得的输出fdiv2的两个不同信号作为累加器部分（81）的时钟，。可以减小由分频比控制电路（5）的动作产生的基板电位的变化和电源电压的变动，能够抑制频率合成器的C / N的劣化。

7. 发明授权

EP1168627B1 Frequency synthesizer 有权
标题翻译：频率合成器
公开(公告)号：EP1168627B1
公开(公告)日：2005-05-11
申请号：EP01113077.0
申请日：2001-05-29
申请人： Matsushita Electric Industrial Co., Ltd.
发明人： Hirano, Shunsuke , Yamada, Ryoichi , Miyahara, Yasunori , Hiraoka, Yukio , Adachi, Hisashi
IPC分类号： H03L7/18 , H03L7/099 , H03L7/10 , H03L7/089 , H04Q7/30 , H04Q7/32 , H03L7/113
CPC分类号： H03L7/0898 , H03L7/087 , H03L7/099 , H03L7/107 , H03L7/113 , H03L7/199

8. 发明公开

EP1227592A2 Frequency synthesizer and method of generating frequency-divided signal 审中-公开
标题翻译：频繁合成器和Verfahren zur Erzeugung eines Frequenzgeteilten信号
公开(公告)号：EP1227592A2
公开(公告)日：2002-07-31
申请号：EP02250049.0
申请日：2002-01-04
申请人： MATSUSHITA ELECTRIC INDUSTRIAL CO., LTD.
发明人： Hirano, Shunsuke , Yasunaga, Takeshi , Miyahara, Yasunori
IPC分类号： H03L7/18
CPC分类号： H03B21/02 , H03L7/099 , H03L7/185 , H03L7/1974
摘要： In a frequency synthesizer, a voltage controlled oscillator has a terminal and oscillates a signal whose frequency corresponds to a control signal applied to the terminal. A first frequency divider divides the frequency of the signal outputted from the voltage controlled oscillator so as to output a first frequency-divided signal. The first frequency-divided signal has a divided frequency. A comparator compares a phase of the first frequency-divided signal with that of a reference signal so as to output a difference signal representing a difference between the phase of the first frequency-divided signal and that of the reference signal. A loop filter smoothes the difference signal outputted from the comparator so as to output the smoothed signal as the control signal to the terminal of the voltage controlled oscillator. A frequency division unit divides the frequency of the signal outputted from the voltage control oscillator so as to output a second frequency-divided signal. The second frequency-divided signal has a divided frequency. A mixer unit mixes the second frequency-divided signal outputted from the frequency division unit and the signal outputted from the voltage control oscillator so as to output a mixed signal.
摘要翻译：在频率合成器中，压控振荡器具有端子并振荡其频率对应于施加到端子的控制信号的信号。第一分频器分压从压控振荡器输出的信号的频率，以输出第一分频信号。第一分频信号具有分频。比较器将第一分频信号的相位与参考信号的相位进行比较，以输出表示第一分频信号的相位与参考信号的相位差之差。环路滤波器平滑从比较器输出的差分信号，以将平滑信号作为控制信号输出到压控振荡器的端子。分频单元将从压控振荡器输出的信号的频率除以输出第二分频信号。第二分频信号具有分频。混频器单元将从分频单元输出的第二分频信号和从压控振荡器输出的信号混合，以输出混合信号。

9. 发明公开

EP1111793A1 Frequency synthesizer apparatus equipped with delta-sigma modulator in fraction part control circuit 有权
$Frequency synthesizer apparatus equipped with delta-sigma modulator in fraction part control circuit$
标题翻译：频率合成仪器和三角形差压调制器
公开(公告)号：EP1111793A1
公开(公告)日：2001-06-27
申请号：EP00127119.6
申请日：2000-12-12
申请人： MATSUSHITA ELECTRIC INDUSTRIAL CO., LTD.
发明人： Adachi, Hisashi , Nakatani, Toshifumi , Kosugi, Hiroaki , Maeda, Masakatsu , Hirano, Shunsuke
IPC分类号： H03L7/197
CPC分类号： H03L7/1976
摘要： A fraction part control circuit of a frequency synthesizer apparatus including a PLL circuit is of a plural-n-th-order delta-sigma modulator circuit for controlling a fraction part of a number of frequency division to a variable frequency divider of the PLL circuit. An adder adds data of the fraction part to output data from a multiplier, and outputs resultant data to a quantizer through a second-order integrator. The quantizer quantizes input data with a quantization step, and outputs the quantized data to the multiplier through a feedback circuit. The quantized data is used as data of the controlled fraction part. The multiplier multiplies data from the feedback circuit by the quantization step, and outputs resultant data to the adder. The fraction part control circuit periodically changes the data of the fraction part, thereby setting a frequency of an output signal from a VCO according to average data of the period.
摘要翻译：包括PLL电路的频率合成器装置的分数部分控制电路是用于控制与PLL电路的可变分频器分频的分数部分的多n-Δ级Δ-Σ调制器电路。加法器将分数部分的数据加到从乘法器输出数据，并通过二阶积分器将结果数据输出到量化器。量化器用量化步长量化输入数据，并通过反馈电路将量化的数据输出到乘法器。量化数据用作受控部分的数据。乘法器将来自反馈电路的数据乘以量化步长，并将结果数据输出到加法器。分数部分控制电路周期性地改变分数部分的数据，从而根据周期的平均数据设置来自VCO的输出信号的频率。

10. 发明公开

EP0977368A2 Radio transceiver and circuit 有权
标题翻译： Funksendeempfängerund Schaltung
公开(公告)号：EP0977368A2
公开(公告)日：2000-02-02
申请号：EP99114843.8
申请日：1999-07-29
申请人： Matsushita Electric Industrial Co., Ltd.
发明人： Nakatani, Toshifumi , Adachi, Hisashi , Kosugi, Hiroaki , Morinaga, Youichi , Itokawa, Hiroyuki , Hirano, Shunsuke
IPC分类号： H04B1/40
CPC分类号： H04B1/403
摘要： When the radio circuit apparatus is transmitting, the output signal of the first local oscillator 102 is inputted to the transmitted frequency converter 112 as well as to the frequency divider 104, and then the output signal of the frequency divider 104 is inputted to the modulator 111. The modulator 111 modulates the output signal of the frequency divider 104 with a base band signal. The output signal of the modulator 111 is inputted to the transmitted frequency converter 112, to be converted to the frequency of a transmitted signal by the output signal of the first local oscillator 102. When the radio circuit apparatus is receiving, the output signal of the low noise amplifier 121 is inputted to the first frequency converter 122 to be converted to the first intermediate frequency by the output signal of the first local oscillator 102. The output signal of the filter 123 is inputted to the second frequency converter circuit 124 to be converted to the second intermediate frequency by the output signal of the second local oscillator 103. Thereby, unnecessary components for transmission can be easily lowered to make it possible to miniaturize the radio circuit apparatus.
摘要翻译：当无线电电路装置正在发送时，第一本地振荡器102的输出信号也被输入到发送的频率转换器112以及分频器104，然后分频器104的输出信号被输入到调制器111 调制器111用基带信号调制分频器104的输出信号。调制器111的输出信号被输入到发送的频率转换器112，通过第一本机振荡器102的输出信号转换为发送信号的频率。当无线电电路装置正在接收时，输出信号低噪声放大器121被输入到第一频率转换器122，以通过第一本机振荡器102的输出信号转换成第一中频。滤波器123的输出信号被输入到第二频率转换器电路124进行转换通过第二本地振荡器103的输出信号输出到第二中频。由此，可以容易地降低用于传输的不必要的部件，使得能够使无线电电路装置小型化。

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