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1. 发明公开

EP0134411A1 Energy discriminator, for example a colour vidicon 失效
标题翻译： Energie-Umwandler，beispielsweise Farb-Vidicon。
公开(公告)号：EP0134411A1
公开(公告)日：1985-03-20
申请号：EP84106063.5
申请日：1984-05-28
申请人： International Business Machines Corporation
发明人： Chappell, Barbara Alane , Chappell, Terry Ivan , Woodall, Jerry MacPherson
IPC分类号： H01L31/06 , H04N9/04 , H01J31/38 , H01L27/14
CPC分类号： H01L27/14647 , H01J29/45
摘要： In a vidicon, optical energy enters through a transparent receiving surface (37) into a multilayer semiconductor monocrystalline body in which it is converted into hole-electron pair carriers in different particular overlying energy responsive layers (12, 13, 14) and the electrons thereof are collected in potential wells associated with the particular layer. Each pixel is isolated from adjoining pixels by isolation regions (20, 22), and readout contacts (26, 27, 29) for the layers are separated by isolation regions (28, 30).
摘要翻译：在摄像机中，光能通过透明的接收表面（37）进入多层半导体单晶体，在多层半导体单晶体中，其被转换成不同的特定上覆能量响应层（12,13,14）及其电子的空穴 - 电子对载流子被收集在与特定层相关联的潜在井中。每个像素通过隔离区域（20,22）与相邻的像素隔离，并且用于层的读出触点（26,27,29）被隔离区域（28,30）隔开。

2. 发明公开

EP0044396A2 Semiconductor solar energy converter 有权
标题翻译： Halbleiter-Sonnenenergie-Umwandler。
公开(公告)号：EP0044396A2
公开(公告)日：1982-01-27
申请号：EP81104229.0
申请日：1981-06-03
申请人： International Business Machines Corporation
发明人： Chappell, Terry Ivan , Woodall, Jerry McPherson
IPC分类号： H01L27/14 , H01L31/06
CPC分类号： H01L31/0725 , H01L31/035281 , H01L31/043 , H01L31/047 , H01L31/0735 , H01L31/074 , Y02E10/544
摘要： A solar energy converter comprises first and second semiconductor solar cells (60, 62) formed on opposite sides of a transparent electrically non-conducting substrate (62). The solar cells are responsive to light of different frequency bands and each of the solar cells comprises a plurality of p-n heterojunctions formed in V grooves in semiconductor material. The different characteristics of the two cells are compensated for by providing the cells with different numbers of V grooves.
摘要翻译：太阳能转换器包括形成在透明非导电基板（62）的相对侧上的第一和第二半导体太阳能电池（60,62）。太阳能电池响应于不同频带的光，并且每个太阳能电池包括形成在半导体材料中的V沟槽中的多个p-n异质结。通过为单元提供不同数量的V沟槽来补偿两个单元的不同特性。

3. 发明公开

EP0030281A2 Optical semiconductor detector and process for fabrication thereof 失效
标题翻译： Halbleiter-Photodetektor和Verfahren zu seiner Herstellung。
公开(公告)号：EP0030281A2
公开(公告)日：1981-06-17
申请号：EP80107022.8
申请日：1980-11-14
申请人： International Business Machines Corporation
发明人： Chappell, Terry Ivan
IPC分类号： H01L31/02 , H01L31/18
CPC分类号： G02B6/423 , G02B6/4202 , H01L31/035281 , Y02E10/50 , Y10S359/90
摘要： An optical semiconductor detector for optical-to-electrical signal conversion can be accomplished through the use of a detector made up of a semiconductor body (2) having a width (W) comparable to the diameter of the signal conveying optical fiber (10), the end of which is aligned with the width face of the semiconductor body, and n- and p- conductivity type regions (6, 7) are provided along the length dimension of the body, the magnitude of the length dimension further defining an optical ath length within the body that is correlated with the light wavelength. Arrays of such structures can be offset ½ structure width and the groove between the sides of the structures may then be employed for optical fiber alignment to an adjacent detector. The detectors can be fabricated out of silicon grown on a preferred crystallographic orientation.
摘要翻译：用于光电信号转换的光学半导体检测器可以通过使用由具有与信号传输光纤（10）的直径相当的宽度（W）的半导体本体（2）构成的检测器来实现，其端部与半导体本体的宽度面对齐，并且沿着主体的长度尺寸设置n型和p型导电类型区域，长度尺寸的大小进一步限定了光学运动身体内与光波长相关的长度。这种结构的阵列可以是偏移1/2结构宽度，并且然后可以使用结构的侧面之间的凹槽用于与相邻检测器的光纤对准。检测器可以由在优选的晶体取向上生长的硅制成。

4. 发明公开

EP0330852A3 Decoder/driver circuit for semiconductor memories 失效
标题翻译：半导体存储器的解码器/驱动器电路
公开(公告)号：EP0330852A3
公开(公告)日：1991-03-27
申请号：EP89101781.6
申请日：1989-02-02
申请人： International Business Machines Corporation
发明人： Chappell, Barbara Alane , Chappell, Terry Ivan , Schuster, Stanley Everett
IPC分类号： G11C8/00
CPC分类号： G11C8/10
摘要： A high performance decoder/driver circuit for a semiconductor memory having A1 to AN (true) and A1 to AN (complement) address lines for receiving A1 to AN address bit signals thereon from internal address buffers. A φPC line is included for receiving a φPC precharge clock signal thereon and a φR line is provided for receiving a φR reset clock signal thereon. The decoder/driver circuit includes an OR decoder means having a plurality of transistor switching devices (1-7) connected to A1 to AN-1 or A1 to AN-1 of the true and complement address lines for the AN to AN-1 address bits for producing a high or low level signal on an OR decoder output node (16) depending on the address bits state. The decoder/driver circuit further includes a selection means (8-11) having a plurality of transistor devices including p-channel devices, having diffusion contacts connected to the output node (17, 18) of the decoder and to AN and AN lines to produce a first selection signal when the OR decoder output node is low and the AN line is high and a second selection signal when the OR decoder output node is low and the AN line is high. A driver circuit is connected to the selection means and is responsive to the first selection signal to provide an output signal on a first memory word line (WLi) and is further responsive to the second selection signal to provide an output signal on a second memory word line (WLi+1).

5. 发明公开

EP0303811A1 Pipelined memory chip 失效
标题翻译： Speicherchip mit Pipelinewirkung。
公开(公告)号：EP0303811A1
公开(公告)日：1989-02-22
申请号：EP88110694.2
申请日：1988-07-05
申请人： International Business Machines Corporation
发明人： Chappell, Barbara Alane , Chappell, Terry Ivan , Schuster, Stanley Everett
IPC分类号： G11C8/00 , G11C7/00
CPC分类号： G11C8/12 , G11C7/1039 , G11C7/12
摘要： A semiconductor random access memory chip wherein the cycle time is less than the access time for any combination of read or write sequence. The semiconductor random access memory chip is partitioned into relatively small sub-arrays with local decoding (RS, WS) and precharging (BLPC). The memory chip operates in a pipelined manner with more than one access propagating through the chip at any given time and wherein the cycle time is limited by sub-array cycles wherein the cycle time is less than the access time for a memory chip having cycle times greater than access times for accesses through the same sub-array. The memory chip also incorporates dynamic storage techniques for achieving very fast access and precharge times.
摘要翻译：半导体随机存取存储器芯片，其中循环时间小于读或写顺序的任何组合的存取时间。半导体随机存取存储器芯片被局部解码（RS，WS）和预充电（BLPC）分割成相对小的子阵列。存储器芯片以流水线方式工作，在任何给定的时间内通过芯片传播多于一个的访问，并且其中周期时间受到子阵列周期的限制，其中周期时间小于具有周期时间的存储器芯片的访问时间大于通过相同子阵列访问的访问时间。存储器芯片还结合了动态存储技术，以实现非常快速的访问和预充电时间。

6. 发明授权

EP0080058B1 Intermediate structure for use in the manufacture of semiconductor devices, method of making field effect transistors and transistors 失效
标题翻译：用于制造半导体器件的中间结构，制备场效应晶体管和晶体管的方法
公开(公告)号：EP0080058B1
公开(公告)日：1988-06-01
申请号：EP82109508.0
申请日：1982-10-14
申请人： International Business Machines Corporation
发明人： Chappell, Barbara Alane , Chappell, Terry Ivan , Woodall, Jerry McPherson
IPC分类号： H01L29/205 , H01L29/267 , H01L29/80 , H01L29/72
CPC分类号： H01L29/66856 , H01L21/30635 , H01L29/1029 , H01L29/205 , H01L29/267 , H01L29/8122

7. 发明授权

EP0030281B1 Optical semiconductor detector and process for fabrication thereof 失效
标题翻译：光学半导体探测器及其制造方法
公开(公告)号：EP0030281B1
公开(公告)日：1984-10-31
申请号：EP80107022.8
申请日：1980-11-14
申请人： International Business Machines Corporation
发明人： Chappell, Terry Ivan
IPC分类号： H01L31/02 , H01L31/18
CPC分类号： G02B6/423 , G02B6/4202 , H01L31/035281 , Y02E10/50 , Y10S359/90

8. 发明授权

EP0330852B1 Decoder/driver circuit for semiconductor memories 失效
标题翻译：用于半导体存储器Dekodierer-和驱动器电路。
公开(公告)号：EP0330852B1
公开(公告)日：1994-09-07
申请号：EP89101781.6
申请日：1989-02-02
申请人： International Business Machines Corporation
发明人： Chappell, Barbara Alane , Chappell, Terry Ivan , Schuster, Stanley Everett
IPC分类号： G11C8/00
CPC分类号： G11C8/10

9. 发明授权

EP0113074B1 Method of logically combining optical signals 失效
标题翻译：逻辑组合光信号的方法
公开(公告)号：EP0113074B1
公开(公告)日：1988-05-25
申请号：EP83112244.5
申请日：1983-12-06
申请人： International Business Machines Corporation
发明人： Chappell, Terry Ivan , Woodall, Jerry MacPherson
IPC分类号： H01L27/14 , H01L31/10 , H03K19/14
CPC分类号： H01L27/14643 , A61M2025/1059 , H01L31/101 , H03K19/14

10. 发明公开

EP0037876A3 Electrochemical eroding process for semiconductors and semiconductor manufactured thereby 有权
标题翻译：半导体电化学蚀刻工艺及其制造的半导体
公开(公告)号：EP0037876A3
公开(公告)日：1985-08-14
申请号：EP81100814
申请日：1981-02-05
申请人： International Business Machines Corporation
发明人： Chappell, Terry Ivan , Pettit, George David , Woodall, Jerry McPherson
IPC分类号： H01L21/306 , H01L21/80 , H01L29/80
CPC分类号： C25F3/12 , H01L21/3063 , H01L21/30635 , H01L29/8128
摘要： Semiconductor devices (3) are fabricated that have precise uniform thickness regions formed by a self-limiting process in which light (5) generated hole-electron pairs are used as a source of current in electrochemical erosion. A self-aligned MESFET semiconductor structure (Figs. 1 and 4) has the gate (15) positioned in etched undercuts (13, 14) of the source and drain regions (9-12). Arrays of enhancement and depletion mode FET devices can be made on the same substrate.

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