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1. 发明公开

EP0953934A1 Pen like computer pointing device 有权
标题翻译： EingabevorrichtungfürRechner在Form eines Stiftes
公开(公告)号：EP0953934A1
公开(公告)日：1999-11-03
申请号：EP99303000.6
申请日：1999-04-19
申请人： Hewlett-Packard Company
发明人： Badyal, Rajeev , Knee, Derek L.
IPC分类号： G06K11/18
CPC分类号： G06F3/0317 , G06F3/03545
摘要： A pen like computer pointing device images as an array of pixels the spatial features of generally any micro textured or micro detailed work surface below the tip of the pen. The photo detector (108) responses are digitized and stored as a frame into memory (108). Motion produces successive frames oftranslated patterns of pixel information, which are compared by autocorrelation to ascertain the direction and amount of movement. A contact sensor (106) senses when the tip of the pointing device is in contact with the work surface. Buttons (112,116) are included on the body (102) of the pointing device that allow it to function in place of a computer mouse device.
摘要翻译：笔像计算机将设备图像指向像素阵列，通常在笔的尖端下方的任何微纹理或微细的工作表面的空间特征。光检测器（108）响应被数字化并作为帧存储到存储器（108）中。运动产生连续的像素信息的翻译图形，通过自相关来比较，以确定运动的方向和数量。接触传感器（106）感测指示装置的尖端何时与工作表面接触。按钮（112,116）包括在指示设备的主体（102）上，其允许其代替计算机鼠标设备。

2. 发明公开

EP0837558A1 A CMOS op-amp input stage with constant small signal gain from rail-to-rail 失效
标题翻译：与在整个电源电压范围内恒定的增益对于小信号CMOS运算放大器输入级
公开(公告)号：EP0837558A1
公开(公告)日：1998-04-22
申请号：EP97109138.4
申请日：1997-06-05
申请人： Hewlett-Packard Company
发明人： Knee, Derek L. , Moore, Charles E.
IPC分类号： H03F3/45
CPC分类号： H03F3/4521 , H03F3/45708
摘要： A CMOS constant transconductance operation amplifier input stage has a PMOS (104, 204) and a NMOS differential pair (102, 202). The gain from each differential pair is summed to provide the overall gain for the input stage. The gains from each individual differential pair when the other is not operating are chosen to be equal. At least one pair of sense transistors (106, 206, 280), coupled to the inputs (INN, INP), reduces the tail current of at least one of the differential pairs when those sense transistors are conducting. The amount of current the sense transistors conduct is chosen to equalize the transconductance of the input stage over a common mode input voltage range which runs from the negative supply voltage to the positive supply voltage.
摘要翻译：一种CMOS恒定跨导运算放大器输入级具有PMOS（104，204）和NMOS差分对（102，202）。从每个差动对的增益被求和以提供用于输入级的整体增益。从每个单独差动对当另一个不操作被选择的增益是相等的。至少一对耦合到所述输入端（INN，INP）感测晶体管（106，206，280）的减小了差分对时，这些读出晶体管导通的至少一个的尾电流。选择当前感测晶体管行为的量在其从负电源电压施加到正电源电压上运行的共模输入电压范围均衡输入级的跨导。

3. 发明公开

EP0547349A3 Programmable integrated circuit output pad 失效转让
标题翻译：可编程集成电路输出滤波器
公开(公告)号：EP0547349A3
公开(公告)日：1993-08-04
申请号：EP92118747.2
申请日：1992-11-02
申请人： HEWLETT-PACKARD COMPANY
发明人： Knee, Derek L. , Wheless, Thomas O. , Li, Wang Kay
IPC分类号： H03K19/0175 , H03K19/003 , H03K19/0185
CPC分类号： H03K19/00361
摘要： A system is described that includes an integrated circuit chip (10) having output paths (28) connected to a network (25) whose electrical characteristics can vary. The system includes a circuit for adjusting output drive applied to a pad (15) on the chip (10). The circuit includes a PVT monitor (18) for providing an output that is related to process, voltage and temperature parameter variations on the chip (10). A processor (20) determines network configuration information and enables the network's electrical characteristics to be determined. The processor (20) is responsive to an output from the PVT monitor (18) and the network's determined electrical characteristics to provide control outputs (70, 72, 74) indicative of a required output drive current level. A drive current circuit (16) includes alterable circuitry and is responsive to the processor's control output (70, 72, 74) to provide the required output drive levels to the pad (15).

4. 发明授权

EP0547349B1 Programmable integrated circuit output pad 失效转让
标题翻译：具有可编程的输出集成电路
公开(公告)号：EP0547349B1
公开(公告)日：2000-12-27
申请号：EP92118747.2
申请日：1992-11-02
申请人： HEWLETT-PACKARD COMPANY
发明人： Knee, Derek L. , Wheless, Thomas O. , Li, Wang Kay
IPC分类号： H03K19/0175 , H03K19/003 , H03K19/0185
CPC分类号： H03K19/00361

5. 发明授权

EP0953934B1 Pen like computer pointing device 有权
标题翻译：用于在销的形式计算机输入装置
公开(公告)号：EP0953934B1
公开(公告)日：2004-02-11
申请号：EP99303000.6
申请日：1999-04-19
申请人： Agilent Technologies, Inc. (a Delaware corporation) , Hewlett-Packard Company (a Delaware corporation)
发明人： Badyal, Rajeev , Knee, Derek L.
IPC分类号： G06K11/18 , G06F3/033
CPC分类号： G06F3/0317 , G06F3/03545

6. 发明授权

EP0660516B1 DIGITALLY PHASE MODULATED CLOCK EXHIBITING REDUCED RF EMISSIONS 失效
标题翻译：数字相位调制的时钟使能降低的RF干扰
公开(公告)号：EP0660516B1
公开(公告)日：1998-12-02
申请号：EP94110993.6
申请日：1994-07-14
申请人： Hewlett-Packard Company
发明人： Rust, Robert , Luque, Phillip R. , Knee, Derek L.
IPC分类号： H03K3/013 , H03C3/40 , H03H17/08
CPC分类号： H03K7/06

7. 发明公开

EP0660516A1 DIGITALLY PHASE MODULATED CLOCK EXHIBITING REDUCED RF EMISSIONS 失效
标题翻译：数字信号调制器。
公开(公告)号：EP0660516A1
公开(公告)日：1995-06-28
申请号：EP94110993.6
申请日：1994-07-14
申请人： Hewlett-Packard Company
发明人： Rust, Robert , Luque, Phillip R. , Knee, Derek L.
IPC分类号： H03K3/013 , H03C3/40 , H03H17/08
CPC分类号： H03K7/06
摘要： A modulator for a clock pulse generator receives clock pulses from a clock pulse source (18, 32), which clock pulses exhibit a reference phase. Delay circuitry (10) is connected to the clock pulse source (18) and includes n tap connections (20, 22, 24, 40), each connection providing a clock pulse that is delayed by a different phase delay from the reference phase. A multiplexer (34) is connected to each of the n tap connections (20, 22, 24, 40) and provides an output manifesting the clock pulses. A selector circuit (26) controls the multiplexer (34) to sequentially connect any sequence of different ones of the n tap connections (20, 22, 24, 40) to the multiplexer's output (28), whereby the output (28) manifests a series of clock pulses which have different phase displacements from the reference phase.
摘要翻译：用于时钟脉冲发生器的调制器从时钟脉冲源（18,32）接收时钟脉冲，该时钟脉冲表现出参考相位。延迟电路（10）连接到时钟脉冲源（18）并且包括n个抽头连接（20,22,24,40），每个连接提供延迟与参考相位不同的相位延迟的时钟脉冲。多路复用器（34）连接到n抽头连接（20,22,24,40）中的每一个，并且提供表示时钟脉冲的输出。选择器电路（26）控制多路复用器（34）将n个抽头连接（20,22,24,40）中的不同序列顺序连接到多路复用器的输出（28），由此输出（28）显示一个与参考相位具有不同相位位移的一系列时钟脉冲。

8. 发明公开

EP0547349A2 Programmable integrated circuit output pad 失效转让
标题翻译： Integrierte Schaltung mit programmierbarem Ausgang。
公开(公告)号：EP0547349A2
公开(公告)日：1993-06-23
申请号：EP92118747.2
申请日：1992-11-02
申请人： HEWLETT-PACKARD COMPANY
发明人： Knee, Derek L. , Wheless, Thomas O. , Li, Wang Kay
IPC分类号： H03K19/0175 , H03K19/003 , H03K19/0185
CPC分类号： H03K19/00361
摘要： A system is described that includes an integrated circuit chip (10) having output paths (28) connected to a network (25) whose electrical characteristics can vary. The system includes a circuit for adjusting output drive applied to a pad (15) on the chip (10). The circuit includes a PVT monitor (18) for providing an output that is related to process, voltage and temperature parameter variations on the chip (10). A processor (20) determines network configuration information and enables the network's electrical characteristics to be determined. The processor (20) is responsive to an output from the PVT monitor (18) and the network's determined electrical characteristics to provide control outputs (70, 72, 74) indicative of a required output drive current level. A drive current circuit (16) includes alterable circuitry and is responsive to the processor's control output (70, 72, 74) to provide the required output drive levels to the pad (15).
摘要翻译：描述了一种系统，其包括集成电路芯片（10），其具有连接到其电特性可以变化的网络（25）的输出路径（28）。该系统包括用于调整施加到芯片（10）上的焊盘（15）的输出驱动的电路。该电路包括用于提供与芯片（10）上的过程，电压和温度参数变化相关的输出的PVT监视器（18）。处理器（20）确定网络配置信息并使得能够确定网络的电特性。处理器（20）响应于PVT监视器（18）的输出和网络确定的电特性，以提供指示所需输出驱动电流电平的控制输出（70,72,74）。驱动电流电路（16）包括可变电路并且响应于处理器的控制输出（70,72,74）以向焊盘（15）提供所需的输出驱动电平。

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