专利快速检索-快速检索全球专利，免费商用专利数据库-IPRDB

81. 发明公开

EP0473260A1 Fabrication of semiconductor packages 失效
标题翻译： Herstellung von Halbleiterpackungen。
公开(公告)号：EP0473260A1
公开(公告)日：1992-03-04
申请号：EP91305762.6
申请日：1991-06-26
申请人： International Business Machines Corporation
发明人： Melnick, Paul John , Mennella, Anthony Joseph, Jr. , Meyer, Herman Paul
IPC分类号： H01L25/07 , H01L21/98
CPC分类号： H01L25/50 , H01L25/071 , H01L2924/0002 , H01L2924/00
摘要： A heat-conductive honeycomb ceramic spacer (11) having an array of apertures therein for facilitating assembly of a semiconductor device including a plurality of semiconductor stacks (13) using a low- profile contact comprising a foil (12) with raised portions corresponding to the locations of apertures in the ceramic spacer for forming contacts with the semiconductor stacks when the spacer and the stacks are sandwiched between the foil and another conductive sheet (14). Use of such a foil also allows disconnection of defective stacks in the device which includes extra stacks to compensate therefore, according to an n - x philosophy. Solder preforms may be included on the stacks and enhanced connections made to the foil of conductive sheet by causing reflux of the solder preforms. The invention may also be applied to multi-layer device constructions.
摘要翻译：一种导热蜂窝状陶瓷间隔件（11），其具有孔的阵列，以便于使用包括箔（12）的低轮廓接触的包括多个半导体叠层（13）的半导体器件的组装，所述薄片接触件具有对应于当间隔物和叠层夹在箔片和另一导电片材（14）之间时，用于与半导体叠层形成接触的陶瓷间隔物中的孔的位置。使用这样的箔还允许在包括额外堆叠的装置中的缺陷堆叠的断开，因此根据n-x哲学来补偿。焊料预成型件可以包括在堆叠中，并且通过引起焊料预成型件的回流而增强与导电片的箔片的连接。本发明也可以应用于多层设备结构。

82. 发明公开

EP0187856A1 SOLID STATE SWITCH ASSEMBLY 失效
标题翻译：半导体开关单元。
公开(公告)号：EP0187856A1
公开(公告)日：1986-07-23
申请号：EP85903917.0
申请日：1985-07-19
申请人： SUNDSTRAND CORPORATION
发明人： BEVANS, Leslie L.
IPC分类号： H01L25 , H03K17
CPC分类号： H01L25/071 , H01L2924/0002 , H03K17/12 , Y10T307/76 , Y10T307/944 , H01L2924/00
摘要： Un ensemble de commutation à l'état solide est utilisé comme interrupteur dans un système de puisance élevée. Un problème posé par les ensembles de commutation précédentes se trouve dans le fait que les interrupteurs à l'état solide ne sont pas connectés et déconnectés simultanément. Il se produit, par conséquent, une surcharge, qui peut endommager l'ensemble de commutation. Un ensemble de commutation à l'état solide composé d'un ensemble circulaire de trois semiconducteurs à électrode (26) avec un semiconducteur de contrôle (46) disposé au milieu de l'ensemble. Une première et une deuxième barres omnibus (12 et 30) sont en contact électrique avec les semiconducteurs (26). Un conducteur en forme d'araignée (60) possède des bras (62) qui s'étendent jusqu'à des électrodes de contrôle respectives des semiconducteurs (26) situés dans l'ensemble circulaire, et une base centrale (64) qui est reliée au semiconducteur de contrôle.

83. 发明公开

EP0154562A2 Two terminal axial lead suppressor and diode device and method of making 失效
标题翻译：锁定具有两个Axialleitern装置和二极管阵列及其制造方法。
公开(公告)号：EP0154562A2
公开(公告)日：1985-09-11
申请号：EP85301595.6
申请日：1985-03-07
申请人： GENERAL SEMICONDUCTOR INDUSTRIES INC.
发明人： Roberts, Ronald L. , Payne, Willard E.
IPC分类号： H01L25/08 , H01L23/30
CPC分类号： H01L25/071 , H01L23/3107 , H01L2924/0002 , H01L2924/09701 , Y10S257/909 , H01L2924/00
摘要： An axial lead bridge rectifier (1) includes four rectifying diode chips (5,12,15,17) and a large pulse suppressor chip (9) all disposed between the paddle sections (2B,3B) of two coaxial leads. Two of the diodes are solder-connected in series between the two paddle sections (2B,3B) with their anodes solder-connected to a first cantilever conductive strip (6) the opposite end of which is solder to one face of the pulse suppressor chip. The opposite face of the pulse suppressor chip is soldered connected to a second metal strip (10) which extends in cantilever fashion from a solder connection to the cathodes of the other two diodes, which are also solder connected to the first and second paddle sections, respectively. The portion of the assembly including the paddle sections of the two axial leads and the rectifier bridge circuit and pulse suppressor thereof are encapsulated in suitable glass, plastics or ceramic material out of which the two axial leads (3A, 2A) extend.

84. 发明公开

EP4429098A1 SUBMODULE AND ASSOCIATED MODULE, TOWER, POWER CONVERTER, AND POWER SYSTEM 审中-公开
公开(公告)号：EP4429098A1
公开(公告)日：2024-09-11
申请号：EP23161344.9
申请日：2023-03-10
申请人： GE Energy Power Conversion Technology Ltd
发明人： LAPASSAT, Nicolas , CLAVIER, PHILIPPE , SIHLER, Christof , GUERIN, DAVID
IPC分类号： H02M7/483 , H02M7/00 , H01L25/07 , H05K7/14
CPC分类号： H02M7/4835 , H02M7/003 , H01L25/117 , H01L25/112 , H01L25/071 , H01L25/18 , H01L25/16 , H01L23/4006 , H01L23/4012
摘要： A submodule (18) for a power converter is proposed. The submodule comprises a first and a second power storage devices (28, 29) and a first stack (30) of electronic device packages, the first stack (30) comprising a first, a second, a third, and a fourth electronic device packages (31, 32, 33, 34).
The first power device (28) and the first and second electronic device packages (31, 32) form a first half bridge converter, and the second power device (29) and the third and fourth electronic device packages (32, 33) form a second half bridge converter.

86. 发明公开

EP3384528A2 COMPACT STACKED POWER MODULES FOR MINIMIZING COMMUTATING INDUCTANCE AND METHODS FOR MAKING THE SAME 审中-公开
公开(公告)号：EP3384528A2
公开(公告)日：2018-10-10
申请号：EP16836200.2
申请日：2016-12-01
申请人： GE Energy Power Conversion Technology Limited
发明人： WAGONER, Robert Gregory , RITTER, Allen Michael
IPC分类号： H01L23/495 , H01L25/07 , H01L25/16 , H01L23/50 , H01L23/44
CPC分类号： H05K7/023 , H01L23/44 , H01L23/49589 , H01L23/50 , H01L25/071 , H01L25/16 , H01L25/165 , H02M7/003
摘要： A compact stacked power module including a positive direct-current-bus-voltage plate having a positive-plate surface and a negative direct-current-bus-voltage plate having a negative-plate surface. The compact stacked power module also includes an alternating-current output plate having opposing first and second output-plate surfaces, a first semiconductor switch contacting the negative-plate surface and the first output-plate surface, and a second semiconductor switch contacting the positive-plate surface and the second output-plate surface. The compact stacked power module further includes a capacitor contacting the negative-plate surface and the positive-plate surface, wherein the capacitor is electrically in parallel with the first and second semiconductor switches.

87. 发明公开

EP3218930A4 PACKAGE FOR ELECTRONIC SYSTEM HAVING SEMICONDUCTOR CHIPS 有权转让
公开(公告)号：EP3218930A4
公开(公告)日：2018-07-25
申请号：EP15859853
申请日：2015-11-11
申请人： TEXAS INSTRUMENTS INC
发明人： LOPEZ OSVALDO JORGE , NOQUIL JONATHAN ALMERIA , GREBS THOMAS EUGENE , MOLLOY SIMON JOHN
IPC分类号： H01L25/065 , H01L23/02 , H01L23/14 , H01L25/03 , H01L25/07 , H01L29/06
CPC分类号： H01L25/0657 , H01L21/50 , H01L23/053 , H01L23/06 , H01L23/13 , H01L23/147 , H01L23/49844 , H01L24/83 , H01L24/97 , H01L25/0652 , H01L25/071 , H01L25/074 , H01L25/18 , H01L25/50 , H01L29/0657 , H01L2224/06181 , H01L2224/2919 , H01L2224/32145 , H01L2224/83851 , H01L2224/94 , H01L2224/97 , H01L2225/00 , H01L2225/06513 , H01L2225/06517 , H01L2225/06555 , H01L2225/06589 , H01L2924/01013 , H01L2924/01014 , H01L2924/01022 , H01L2924/01028 , H01L2924/01079 , H01L2924/04642 , H01L2924/04941 , H01L2924/05042 , H01L2924/05442 , H01L2924/10155 , H01L2924/10253 , H01L2924/10271 , H01L2924/1032 , H01L2924/10329 , H01L2924/1033 , H01L2924/1037 , H01L2924/1301 , H01L2924/1305 , H01L2924/13055 , H01L2924/1306 , H01L2924/13091 , H01L2924/1425 , H01L2924/1427 , H01L2924/15156 , H01L2924/157 , H01L2224/83
摘要： An electronic system comprises a first chip (101) of single-crystalline semiconductor including a first electronic device embedded in a second chip (102) of single-crystalline semiconductor shaped as a container having a slab (104) bordered by ridges (103), and including a second electronic device. The nested chips are assembled in a container of low-grade silicon shaped as a slab 130 bordered by retaining walls 131 and including conductive traces and terminals. The first electronic device is connected to the second electronic device by attaching the first chip onto the slab of the second chip; and the first and second electronic devices are connected to the container by embedding the second chip in the container, wherein the nested first and second chips operate as an electronic system and the container operates as the package of the system. For first and second devices as field effect transistors, the system is a power block.

88. 发明公开

EP3113222A4 CHIP PACKAGING MODULE 审中-公开
公开(公告)号：EP3113222A4
公开(公告)日：2018-03-21
申请号：EP14900185
申请日：2014-10-10
申请人： SHENZHEN GOODIX TECH CO LTD
发明人： WU BAOQUAN , LONG WEI
IPC分类号： H01L25/065 , G06K9/00 , H01L21/60 , H01L23/48
CPC分类号： H01L25/0657 , G06K9/0002 , G06K9/0053 , H01L23/13 , H01L23/3128 , H01L23/481 , H01L24/24 , H01L24/73 , H01L24/82 , H01L24/94 , H01L24/97 , H01L25/0652 , H01L25/0655 , H01L25/071 , H01L25/105 , H01L25/112 , H01L25/16 , H01L2224/04042 , H01L2224/05548 , H01L2224/05556 , H01L2224/05567 , H01L2224/05568 , H01L2224/0557 , H01L2224/24137 , H01L2224/24146 , H01L2224/24147 , H01L2224/32145 , H01L2224/48091 , H01L2224/48137 , H01L2224/48145 , H01L2224/48227 , H01L2224/73265 , H01L2224/73267 , H01L2225/06506 , H01L2225/0651 , H01L2225/06524 , H01L2225/06541 , H01L2225/06555 , H01L2225/06558 , H01L2924/15153 , H01L2924/19107 , H01L2924/00014 , H01L2924/00012 , H01L2224/32225 , H01L2924/00
摘要： The present invention discloses a chip packaging module, including: a first chip, where a first pad is disposed on a side neighboring to a front surface of the first chip; at least a second chip, where at least one second chip is disposed on a rear side of the first chip, each second chip has a second pad, and wherein the first pad of the first chip is connected to the second pad of the second chip via a redistribution layer.

89. 发明公开

EP3257336A1 POWER FIELD-EFFECT TRANSISTOR (FET), PRE-DRIVER, CONTROLLER, AND SENSE RESISTOR INTEGRATION 审中-公开
标题翻译：功率场效应晶体管（FET），预驱动器，控制器和感应电阻集成
公开(公告)号：EP3257336A1
公开(公告)日：2017-12-20
申请号：EP15867013.3
申请日：2015-12-10
申请人： Texas Instruments Incorporated
发明人： RANMUTHU, Indumini, W.
IPC分类号： H05K1/14
CPC分类号： H01L23/49568 , H01L23/49524 , H01L23/49548 , H01L23/49551 , H01L23/49575 , H01L24/37 , H01L24/40 , H01L24/41 , H01L25/0657 , H01L25/071 , H01L25/16 , H01L27/088 , H01L2224/371 , H01L2224/37147 , H01L2224/37599 , H01L2224/40245 , H01L2224/84 , H01L2924/00014 , H01L2924/0002 , H01L2924/181 , H01L2924/00012 , H01L2924/00
摘要： Techniques are described for integrating power field-effect transistors (FETs), pre-drivers, controllers, and/or resistors into a common multi-chip package for implementing multi-phase bridge circuits. The techniques may provide a multi-chip package with at least two high-side (HS) FETs and at least two low-side (LS) FETs, and place the at least two HS FETs or the at least LS FETs on a common die. Placing at least two FETs on a common die may reduce the number of die and the number of thermal pads (i.e., die pads) needed to implement a set of power FETs, thereby decreasing component count of a multi-phase bridge circuit and/or allowing a more compact, higher current density multi-phase bridge circuit to be obtained without significantly increasing thermal power dissipation of the circuit.

90. 发明公开

EP3252813A2 POWER MODULE 有权转让
公开(公告)号：EP3252813A2
公开(公告)日：2017-12-06
申请号：EP17173570.7
申请日：2017-05-30
申请人： JTEKT CORPORATION
发明人： UCHIDA, Nobuhiro , NAKAI, Motoo
IPC分类号： H01L23/64 , H01L23/538 , H01L25/07 , H02M7/00
CPC分类号： H02M7/003 , H01L23/49844 , H01L23/645 , H01L25/071 , H02M1/44
摘要： A power module (3) includes a multilayer circuit board (30), and a first three-phase inverter (6) and a second three-phase inverter (7), which are mounted on the multilayer circuit board (30) so as to be stacked each other. A positive-electrode-side power source conductive trace (71) of the first three-phase inverter (6) and a negative-electrode-side power source conductive trace (102) of the second three-phase inverter (7) are disposed so as to at least partially face each other in a stacking direction of the multilayer circuit board (30), such that currents respectively flow through the power source conductive traces (71, 102) in opposite directions in a facing section. A negative-electrode-side power source conductive trace (72) of the first three-phase inverter (6) and a positive-electrode-side power source conductive trace (101) of the second three-phase inverter (7) are disposed so as to at least partially face each other in the stacking direction of the multilayer circuit board (30), such that currents respectively flow through the power source conductive traces (72, 101) in opposite directions in a facing section.

你已经成功收藏专利！

检索式保存成功!

IPRDB

热门服务

关于我们

友情链接

联系方式