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    • 73. 发明公开
    • Mimcap structure in a semiconductor device package
    • MIMCAP-Struktur在einemHalbleiterbauelementegehäuse
    • EP2738827A1
    • 2014-06-04
    • EP12194922.6
    • 2012-11-29
    • IMEC
    • Detalle, MikaelBeyne, Eric
    • H01L49/02H01L23/522H01L23/64H01L23/00H01L27/01
    • H01L23/5223H01L21/4857H01L21/768H01L23/48H01L23/49822H01L23/49827H01L23/49838H01L23/5226H01L24/97H01L27/016H01L28/20H01L28/40H01L28/60H01L2924/0002H01L2924/15788H01L2924/0001H01L2924/00
    • The invention is related to a semiconductor device package comprising a metal-insulator-metal capacitor. A MIMCAP according to the invention is located between a first and second metallization layer in a stack of metallization layers, in particular copper metallization layers, obtainable by single damascene processing steps as known in the art, said stack supporting semiconductor devices, which are connected through said metallization layers to an external power source. The MIMCAP comprises a bottom plate in the first metallization layer, a first conductive layer on and in electrical contact with said bottom plate, a dielectric layer on and in contact with said first conductive layer, a second conductive layer on and in contact with said dielectric layer, and a top plate in the second metallization layer, on and in electrical contact with the second metal plate. The contacting of the bottom and top plates of the MIMCAP from the first and second metallization layer is thereby established without vias between said plates and said metallization layers. In addition, the first conductive layer of the MIMCAP may extend beyond the surface of the dielectric and the second layer for forming other structures.
    • 本发明涉及一种包括金属 - 绝缘体 - 金属电容器的半导体器件封装。 根据本发明的MIMCAP位于金属化层堆叠中的第一和第二金属化层之间,特别是铜金属化层,可通过本领域已知的单镶嵌加工步骤获得,所述堆叠支撑半导体器件通过 所述金属化层连接到外部电源。 MIMCAP包括在第一金属化层中的底板,与所述底板电接触并且与所述底板电接触的第一导电层,在所述第一导电层上并与之接触的介电层,与所述电介质接触并与之接触的第二导电层 层和第二金属化层中的与第二金属板电接触的顶板。 因此,MIMCAP的底板和顶板与第一金属化层和第二金属化层之间的接触在所述板和所述金属化层之间没有通孔。 此外,MIMCAP的第一导电层可以延伸超过电介质的表面和用于形成其它结构的第二层。
    • 77. 发明公开
    • METHOD FOR FABRICATING AN INTEGRATED-PASSIVES DEVICE WITH A MIM CAPACITOR AND A HIGH-ACCURACY RESISTOR ON TOP
    • 方法用于生产集成无源元件与MIM电容和高精密电阻顶端
    • EP2422358A1
    • 2012-02-29
    • EP10717275.1
    • 2010-04-14
    • NXP B.V.
    • ROEST, Aarnoud LaurensVAN LEUKEN-PETERS, Linda
    • H01L21/02H01L27/01H01L27/02H01L27/06
    • H01L28/55H01L27/016H01L27/0251H01L27/0688H01L28/20H01L28/65
    • The present invention relates to a method for fabricating an electronic component, comprising fabricating, on a substrate (102) at least one integrated MIM capacitor (114) having a top capacitor electrode (118) and a bottom capacitor electrode (112) at a smaller distance from the substrate than the top capacitor electrode; fabricating an electrically insulating first cover layer (120) on the top capacitor electrode, which first cover layer partly or fully covers the top capacitor electrode and is made of a lead- containing dielectric material; thinning the first cover layer; fabricating an electrically insulating second cover layer (124) on the first cover layer, which second cover layer partly or fully covers the first cover layer and has a dielectric permittivity smaller than that of the first cover layer; and fabricating an electrically conductive resistor layer (126) on the second cover layer, which resistor layer has a defined ohmic resistance.
    • 基板本发明涉及一种方法,用于在电子部件的制造方法,包括制造,在具有顶电容器电极(118)和以较小的底部电容器电极(112)A(102)至少一个集成MIM电容器(114) 从基板比顶部电容电极距离; 在制造电在顶部电容器电极,所述第一覆盖层部分或完全覆盖顶部电容器电极,并且由含有铅的电介质材料的绝缘第一覆盖层(120); 减薄所述第一覆盖层; 在电绝缘的制造在第一覆盖层上的第二覆盖层(124),该第二覆盖层部分或完全覆盖所述第一覆盖层和具有介电常数比第一覆盖层的小; 以及制造所述第二覆盖层,其中电阻层具有限定的欧姆电阻上的导电电阻器层(126)的。