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1. 发明授权

EP1661168B1 Herstellungsverfahren für eine Integrierte Schaltungsanordnung mit Kondensator 有权
标题翻译：集成电路装置的制造方法，具有电容器
公开(公告)号：EP1661168B1
公开(公告)日：2014-10-22
申请号：EP04766284.6
申请日：2004-07-21
申请人： Infineon Technologies AG
发明人： GÖBEL, Thomas , HELNEDER, Johann , KÖRNER, Heinrich , MITCHELL, Andrea , SCHWERD, Markus , SECK, Martin , TORWESTEN, Holger
IPC分类号： H01L49/02 , H01L21/316 , H01L23/522 , H01L27/01 , H01L27/08
CPC分类号： H01L28/40 , H01L21/31687 , H01L23/5223 , H01L23/5228 , H01L27/016 , H01L27/0802 , H01L27/0805 , H01L28/20 , H01L2924/0002 , H01L2924/00

2. 发明授权

EP1454344B1 VERFAHREN ZUR HERSTELLUNG EINES INTEGRIERTEN HALBLEITERPRODUKTES MIT METALL-ISOLATOR-METALL-KONDENSATOR 有权
标题翻译：方法用于制造集成半导体产品，金属 - 绝缘体 - 金属电容器
公开(公告)号：EP1454344B1
公开(公告)日：2012-03-14
申请号：EP02779523.6
申请日：2002-10-31
申请人： Infineon Technologies AG
发明人： KÖRNER, Heinrich , SCHRENK, Michael , SCHWERD, Markus
IPC分类号： H01L21/02
CPC分类号： H01L28/55 , H01L23/5223 , H01L28/75 , H01L2924/0002 , H01L2924/00
摘要： According to the invention, in order to produce an integrated semiconductor product comprising integrated metal-insulator-metal capacitors, a dielectric protective layer (5) and a dielectric auxiliary layer (16) are first deposited on a first electrode (2). Said protective layer and said auxiliary layer (16) are then removed (17) from the region above the first electrode, and a dielectric layer (6) is produced, the pile of metallic strips (7, 8, 9) for the second electrode being applied to said dielectric layer. The metal-insulator-metal capacitor is then structured according to known etching methods. Dielectric capacitor layers consisting of freely selectable materials and having any thickness can be formed in this way. The present invention is especially advantageous in that it enables via holes to be etched in a significantly more simple manner than according to prior art, as the remaining dielectric capacitor layer covering the metallic strips does not need to be etched through.

3. 发明公开

EP1654760A1 INTEGRIERTE ANSCHLUSSANORDNUNG UND HERSTELLUNGSVERFAHREN 审中-公开
标题翻译：集成的连接装置和方法
公开(公告)号：EP1654760A1
公开(公告)日：2006-05-10
申请号：EP04766283.8
申请日：2004-07-21
申请人： Infineon Technologies AG
发明人： DREXL, Stefan , GÖBEL, Thomas , HELNEDER, Johann , HOMMEL, Martina , KLEIN, Wolfgang , KÖRNER, Heinrich , MITCHELL, Andrea , SCHWERD, Markus , SECK, Martin
IPC分类号： H01L23/485 , H01L23/532
CPC分类号： H01L24/05 , H01L23/53228 , H01L24/03 , H01L24/48 , H01L2224/02166 , H01L2224/0401 , H01L2224/04042 , H01L2224/05073 , H01L2224/05166 , H01L2224/05181 , H01L2224/05553 , H01L2224/05554 , H01L2224/05567 , H01L2224/05624 , H01L2224/48463 , H01L2924/00014 , H01L2924/01004 , H01L2924/01005 , H01L2924/01006 , H01L2924/01013 , H01L2924/01014 , H01L2924/01019 , H01L2924/0102 , H01L2924/01022 , H01L2924/01029 , H01L2924/01032 , H01L2924/01033 , H01L2924/01061 , H01L2924/01068 , H01L2924/01073 , H01L2924/01075 , H01L2924/01079 , H01L2924/01082 , H01L2924/014 , H01L2924/04941 , H01L2924/04953 , H01L2924/05042 , H01L2924/14 , H01L2924/19043 , H01L2924/30105 , H01L2224/45099
摘要： The invention relates to a connection arrangement comprising an outer conductive structure (44), which is at least partially or completely placed inside a recess (37) of an electrically non-conductive insulating layer (34, 36). At the bottom of the recess (37), an inner conductive structure (22) is placed on one side of the insulating layer (34, 36) and, in a contacting area, it borders on the outer conductive structure (44). A contact surface is placed on the outer conductive structure (44) on the other side of the recess (37). The contacting area and the contact surface do not overlap one another or only in part. The bottom of the recess (37) is, when viewed in the normal direction, arranged in such at manner that it overlaps at least half of the contact surface or the entirety thereof so that a step in the insulating layer (34, 36) is situated on the edge of the recess (37) outside of a main current path extending between the contact surface and the inner conductive structure (22).

4. 发明公开

EP1454345A1 INTEGRIERTES HALBLEITERPRODUKT MIT METALL-ISOLATOR-METALL-KONDENSATOR 审中-公开
标题翻译：整合剂HALBLEITERPRODUKT MIT金属隔离器 - 金属 - KONDENSATOR
公开(公告)号：EP1454345A1
公开(公告)日：2004-09-08
申请号：EP02792906.6
申请日：2002-12-05
申请人： Infineon Technologies AG
发明人： KOLLER, Klaus , KÖRNER, Heinrich , SCHRENK, Michael
IPC分类号： H01L21/02 , H01L29/92 , H01L21/768 , H01G4/12 , H01G4/08
CPC分类号： H01L28/75 , H01L21/76838 , H01L28/55
摘要： To produce an integrated semiconductor product comprising an integrated metal-insulator-metal capacitor, a dielectric auxiliary layer (6) is first deposited on a first electrode (2, 3, 5). Said auxiliary layer (6) is then opened over the first electrode (15). A dielectric layer (7) is then created, onto which the stack (8, 9, 10) of metal strips for the second electrode is applied. The metal-insulator-metal capacitor is subsequently patterned using conventional etching technology. This allows the production of dielectric capacitor layers comprising freely selectable materials of any thickness. The particular advantage of the invention is that the etching of vias can be carried out in a significantly simpler manner than in prior art, as it is not necessary to etch through the remaining dielectric capacitor layer over the metal strips.
摘要翻译：为了制造具有集成的金属 - 绝缘体 - 金属电容器的集成半导体产品，首先将介电辅助层（6）沉积在第一电极（2,3,5）上。然后，该辅助层（6）经由第一电极打开（15）。然后，制造电介质层（7），然后将用于第二电极的金属轨道堆叠（8,9,10）施加到电介质层（6）。然后使用已知的蚀刻工艺对金属 - 绝缘体 - 金属电容器进行图案化。这使得可以使用可以根据需要选择的材料来制造任何所需厚度的介质电容器层。特别地，这具有以下优点：通过蚀刻可以比现有技术更容易地进行蚀刻，因为不需要通过金属轨道上方的残留介电电容器层进行蚀刻。

5. 发明公开

EP1661168A1 INTEGRIERTE SCHALTUNGSANORDNUNG MIT KONDENSATOR UND HERSTELLUNGSVERFAHREN 有权
标题翻译：集成电路装置的制造方法，具有电容器
公开(公告)号：EP1661168A1
公开(公告)日：2006-05-31
申请号：EP04766284.6
申请日：2004-07-21
申请人： Infineon Technologies AG
发明人： GÖBEL, Thomas , HELNEDER, Johann , KÖRNER, Heinrich , MITCHELL, Andrea , SCHWERD, Markus , SECK, Martin , TORWESTEN, Holger
IPC分类号： H01L21/02 , H01L21/316
CPC分类号： H01L28/40 , H01L21/31687 , H01L23/5223 , H01L23/5228 , H01L27/016 , H01L27/0802 , H01L27/0805 , H01L28/20 , H01L2924/0002 , H01L2924/00
摘要： The invention relates inter alia to an integrated circuit (10) comprising a capacitor (64) and a precision resistor (57) which are manufactured simultaneously. The dielectric (68) of the capacitor (64) is preferably produced by means of anodic oxidation. A base layer (58,71) is used in order to protect the material (66) which is to be oxidated. Said layer also protects the surrounding areas from anodic oxidation. Very high value dielectrics (68) and very high value capacitors (64) and integrated circuits (10) can thus be produced.

6. 发明公开

EP1454344A1 INTEGRIERTES HALBLEITERPRODUCKT MIT METALL-ISOLATOR-METALL-KONDENSATOR 有权
标题翻译：方法用于制造集成半导体产品，金属 - 绝缘体 - 金属电容器
公开(公告)号：EP1454344A1
公开(公告)日：2004-09-08
申请号：EP02779523.6
申请日：2002-10-31
申请人： Infineon Technologies AG
发明人： KÖRNER, Heinrich , SCHRENK, Michael , SCHWERD, Markus
IPC分类号： H01L21/02
CPC分类号： H01L28/55 , H01L23/5223 , H01L28/75 , H01L2924/0002 , H01L2924/00
摘要： According to the invention, in order to produce an integrated semiconductor product comprising integrated metal-insulator-metal capacitors, a dielectric protective layer (5) and a dielectric auxiliary layer (16) are first deposited on a first electrode (2). Said protective layer and said auxiliary layer (16) are then removed (17) from the region above the first electrode, and a dielectric layer (6) is produced, the pile of metallic strips (7, 8, 9) for the second electrode being applied to said dielectric layer. The metal-insulator-metal capacitor is then structured according to known etching methods. Dielectric capacitor layers consisting of freely selectable materials and having any thickness can be formed in this way. The present invention is especially advantageous in that it enables via holes to be etched in a significantly more simple manner than according to prior art, as the remaining dielectric capacitor layer covering the metallic strips does not need to be etched through.

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