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71. 发明公开

EP1171913A1 DAMASCENE STRUCTURE AND METHOD FOR FORMING A DAMASCENE STRUCTURE 审中-公开
标题翻译：镶嵌和制造方法镶嵌
公开(公告)号：EP1171913A1
公开(公告)日：2002-01-16
申请号：EP01906564.8
申请日：2001-01-17
申请人： Philips Semiconductor, Inc.
发明人： YEH, Edward, K. , WELING, Milind, G.
IPC分类号： H01L21/768 , H01L23/522
CPC分类号： H01L21/76834 , H01L21/76801 , H01L21/76802 , H01L21/7681 , H01L23/5222 , H01L23/5329 , H01L2924/0002 , H01L2924/00
摘要： A damascene structure having a reduced overall dielectric constant and a method for forming such a structure is disclosed. In one embodiment, the present embodiment deposits a blanket coating (206, 306) of etch stop layer material over an underlying structure. In the present embodiment, the underlying structure includes a first region (202, 302) to which an interconnect will be subsequently be formed. Next, the present embodiment selectively removes portions of the blanket coating of the etch stop layer material. More specifically, in the present embodiment, the etch stop layer material is removed from above a second region (208, 304) of the underlying structure. In the present embodiment, the second region of the underlying structure will not subsequently have the interconnect formed thereto. In so doing, the present embodiment eliminates the presence of superfluous etch stop layer material. As a result, the overall dielectric constant of the intermetal filmstack is reduced as compared to conventional damascene structures.

72. 发明公开

EP1151473A1 AIR GAP DIELECTRIC IN SELF-ALIGNED VIA STRUCTURES 审中-公开
标题翻译： LUFTSPALTDIELEKTRIKUM在自我调整的接触孔结构
公开(公告)号：EP1151473A1
公开(公告)日：2001-11-07
申请号：EP00972366.9
申请日：2000-10-27
申请人： Koninklijke Philips Electronics N.V. , Philips Semiconductors Inc.
发明人： BOTHRA, Subhas
IPC分类号： H01L23/522 , H01L21/768 , H01L21/764
CPC分类号： H01L23/5226 , H01L21/7682 , H01L21/76885 , H01L21/76897 , H01L23/5329 , H01L2924/0002 , H01L2924/00
摘要： A high speed interconnect structure and methods for making the structure are provided. The interconnect structure includes a first metallization layer having a plurality of metallization lines (120) and a conductive via metallization layer defined over the first metallization layer. The conductive via metallization layer is configured to define self-aligned conductive vias (140). A non-conformal oxide layer (200) is defined over the first metallization layer and the conductive via metallization layer such that air gaps (202) are positioned between the plurality of metallization lines (120). A cap oxide layer (204) is then defined over the non-conformal oxide (200). In this example, a CMP operation can be performed to expose the top surfaces of the conductive vias before a next metallization layer is defined. It should be noted that air gaps (202) are defined without the problems associated with conductive via misalignment.

73. 发明公开

EP1138804A2 Bauelement mit zumindest zwei aneinander grenzenden Isolierschichten und Herstellungsverfahren dazu 审中-公开
标题翻译：具有至少两个邻接的绝缘层和制造方法及其成分
公开(公告)号：EP1138804A2
公开(公告)日：2001-10-04
申请号：EP01107282.4
申请日：2001-03-23
申请人： Infineon Technologies AG
发明人： Lowack, Klaus, Dr. , Schmid, Guenter, Dr. , Sezi, Recai, Dr.
IPC分类号： C23C28/04
CPC分类号： H01L21/76871 , C23C26/00 , C23C28/00 , H01L21/76826 , H01L23/49894 , H01L23/5329 , H01L2924/0002 , Y10T428/24942 , H01L2924/00
摘要： Die Erfindung betrifft ein Bauelement mit zwei aneinander grenzenden Isolierschichten und ein Herstellungsverfahren dazu. Das Bauelement hat eine aktivierte Isolierschicht, die durch Metallisierung zu einer elektrisch leitenden Schicht umgewandelt werden kann.
摘要翻译：结构组件包括在上部具有基板和下绝缘层。所述层的厚度为0.05-50微米。绝缘层中的一个的至少一个区域被激活随后的金属化，photosensititizing，拒水性和/或表面活化因此，一个独立claimsoft包括用于包括将下绝缘层的基板生产一结构元件的过程和可选结构; 激活所述绝缘层的一个区域; 然后在上绝缘层和结构化应用。

74. 发明公开

EP1130639A1 SEMICONDUCTOR DEVICE AND MANUFACTURE THEREOF 审中-公开
标题翻译： Verfahren zur Herstellung einer mehrschichtigen Verbindungsstruktur
公开(公告)号：EP1130639A1
公开(公告)日：2001-09-05
申请号：EP99949428.9
申请日：1999-10-26
申请人： TOKYO ELECTRON LIMITED
发明人： ISHIZUKA, Shuichi
IPC分类号： H01L21/768 , H01L21/316 , H01L21/318
CPC分类号： H01L21/76802 , H01L21/02112 , H01L21/0212 , H01L21/022 , H01L21/02274 , H01L21/02304 , H01L21/3127 , H01L21/318 , H01L21/76801 , H01L21/76832 , H01L21/76834 , H01L23/5329 , H01L2924/0002 , H01L2924/00
摘要： When a semiconductor device using fluorine-containing carbon films (CF films) 21, 22, 23 as inter-layer dielectric films is fabricated using boron nitride films (BN films) as hard masks 31, 32, 33, total inter-wiring capacitance of the semiconductor device can be made low. After a first CF film 21 as an inter-layer dielectric film is stacked, a hard mask 31 composed of a BN film is stacked on the CF film 21, and thereafter selectively removed by etching to form a predetermined groove pattern. The CF film 21 is next etched by using the hard mask 31 as a mask to form grooves for forming wiring layers 51. Then, Cu is buried into the grooves to complete the semiconductor device. Since this semiconductor device uses the CF film and the BN film having low relative dielectric constants, the relative dielectric constant of the entire semiconductor device can be made low. As a result, its total inter-wiring capacitance can be made low as well.
摘要翻译：当使用氮化硼膜（BN膜）作为硬掩模31,32,33来制造使用含氟碳膜（CF膜）21,22,23作为层间电介质膜的半导体器件时，总布线电容可以使半导体器件较低。在作为层间电介质膜的第一CF膜21层叠之后，在CF膜21上层叠由BN膜构成的硬掩模31，然后通过蚀刻选择性地除去以形成规定的槽图案。接着通过使用硬掩模31作为掩模来蚀刻CF膜21，以形成用于形成布线层51的槽。然后，将Cu埋入槽中以完成半导体器件。由于该半导体器件使用具有低相对介电常数的CF膜和BN膜，所以可以使整个半导体器件的相对介电常数低。因此，其总布线电容也可以变低。

75. 发明授权

EP0875905B1 Low dielectric constant composite film for integrated circuits of an inorganic aerogel and an organic filler grafted to the inorganic material and method of fabrication 失效
标题翻译：具有无机气凝胶的低介电常数集成电路用有机填料复合膜接枝无机材料和其生产
公开(公告)号：EP0875905B1
公开(公告)日：2001-06-27
申请号：EP97830194.3
申请日：1997-04-28
申请人： STMicroelectronics S.r.l.
发明人： Cerofolini, Gianfranco , De Santi, Giorgio , Crisenza, Giuseppe
IPC分类号： H01B3/30 , C08F292/00 , H01L23/532
CPC分类号： H01B3/30 , C08F292/00 , H01L23/5329 , H01L2924/0002 , Y02P20/544 , H01L2924/00

76. 发明公开

EP1109220A2 Dielektrische Füllung von elektrischen Verdrahtungsebenen 审中-公开
标题翻译：电线水平的电介质填充物
公开(公告)号：EP1109220A2
公开(公告)日：2001-06-20
申请号：EP00126887.9
申请日：2000-12-07
申请人： Infineon Technologies AG
发明人： Kirchhoff, Markus, Dr. , Rogalli, Michael, Dr. , Wege, Stephan
IPC分类号： H01L23/532
CPC分类号： H01L23/5329 , H01L2924/0002 , H01L2924/00
摘要： Die vorliegende Erfindung betrifft eine dielektrische Füllung für elektrische Verdrahtungsebenen eines integrierten Schaltkreises. Die elektrische Verdrahtung des integrierten Schaltkreises umfaßt einen Grundkörper (1), auf dem bereits Leitungs- und Passivierungsebenen angeordnet sein können; eine leitfähige Schicht (2), die auf dem Grundkörper (1) angeordnet ist und so strukturiert ist, daß sie eine erste Leiterbahn (3), eine zweite Leiterbahn (4) und einen Graben (5) zwischen der ersten Leiterbahn (3) und der zweiten Leiterbahn (4) aufweist; eine erste dielektrische Schicht (6) auf der leitfähigen Schicht (2) angeordnet ist und den Graben (5) zumindest teilweise auffüllt, wobei es sich bei der ersten dielektrischen Schicht (6) um den Polymerwerkstoff Polybenzoxazol handelt.
摘要翻译：本发明涉及用于集成电路的电布线级的电介质填充。该集成电路的电布线包括基体（1）可以被设置在线路和已经Passivierungsebenen; （2）形成的导电层上的基体（1）布置，并且被构造为使得其包括第一导体轨道（3），第二导体轨道（4）和第一导体轨道之间的沟槽（5）（3）和所述第二导体（4）; 所述导电层（2）和沟槽（5）至少部分地填充，其中，所述第一电介质层（6）是聚合物材料的聚苯并恶唑在第一电介质层（6）。

77. 发明公开

EP1068255A2 POLY(ARYLENE ETHER) COMPOSITIONS AND METHODS OF MANUFACTURE THEREOF 审中-公开
标题翻译：聚（亚芳基醚）组合物及其制造方法
公开(公告)号：EP1068255A2
公开(公告)日：2001-01-17
申请号：EP98963883.8
申请日：1998-12-11
申请人： AlliedSignal Inc.
发明人： LAU, Kreisler, S., Y. , CHEN, Tian-An , KOROLEV, Boris , BROUK, Emma , SCHILLING, Paul, E. , THOMPSON, Heike W.
IPC分类号： C08G65/40 , H01L23/498 , C07C17/278 , C07C25/24
CPC分类号： H01L23/5329 , C08G65/40 , C08G65/4006 , C08G65/4012 , C08G65/4025 , C08G2650/48 , C08L2203/20 , H01L23/49894 , H01L2924/0002 , H01L2924/12044 , H05K1/0326 , Y10T428/31504 , H01L2924/00
摘要： Dielectric compositions encompassing one or more poly(arylene ether) polymers are provided. The dielectric compositions have repetitive structural unit (I) where n=0 to 1; m=0 to 1-n; and Y1, Y2, Ar1 and Ar2 are each a divalent arylene radical, Y1 and Y2 derived from biphenol compounds, Ar1 derived from difluoroarylethynes and Ar2 derived from difluoroaryl compounds. Where both Y1 and Y2 are derived from fluorene bisphenol, n=0.1 to 1. Such poly(arylene ether) polymers are employed with a variety of microelectronic devices, for example, integrated circuits and multichip modules.
摘要翻译：提供了包含一种或多种聚（亚芳基醚）聚合物的介电组合物。介电组合物具有重复结构单元（I），其中n = 0至1; m = 0到1-n; 并且Y1，Y2，Ar1和Ar2各自为二价亚芳基，衍生自联苯酚化合物的Y1和Y2，衍生自二氟芳基乙炔的Ar1和衍生自二氟芳基化合物的Ar2。当Y 1和Y 2都衍生自芴双酚时，n = 0.1至1.这种聚（亚芳基醚）聚合物与各种微电子器件，例如集成电路和多芯片模块一起使用。

78. 发明公开

EP0917184A3 Electronic coatings having low dielectric constant 失效
标题翻译：具有低介电常数的电涂层
公开(公告)号：EP0917184A3
公开(公告)日：2000-10-18
申请号：EP98304291.2
申请日：1998-06-01
申请人： DOW CORNING CORPORATION
发明人： Chung, Kyuha , Saha, Chandan Kumar , Liou, Huey-Chiang , Liu. Youfan
IPC分类号： H01L21/316 , H01L21/312
CPC分类号： H01L21/02134 , H01L21/02203 , H01L21/02282 , H01L21/02337 , H01L21/316 , H01L21/31695 , H01L23/5329 , H01L2924/0002 , H01L2924/3011 , H01L2924/00
摘要： This invention is a method for producing insoluble coatings having a dielectric constant (Dk) of 2.5 to 2.8 on electronic substrates. The method comprises applying a composition comprising hydrogen silsesquioxane resin onto a substrate to form a film on the substrate; and heating the substrate at a temperature of 200°C. to 550°C. wherein the substrate is heated at a rate and for a time sufficient to produce an insoluble coating having a dielectric constant of 2.5 to 2.8.

79. 发明公开

EP0980095A1 Modular high frequency integrated circuit structure 审中-公开
标题翻译： Modulare integrierte Schaltungsanordnung hoher Frequenz
公开(公告)号：EP0980095A1
公开(公告)日：2000-02-16
申请号：EP99306215.7
申请日：1999-08-05
申请人： International Business Machines Corporation
发明人： Bartush, Thomas Adam, c/o IBM United Kingdom Ltd. , Harame, David Louis, c/o IBM United Kingdom Ltd. , Malinowski, John C., c/o IBM United Kingdom Ltd. , Piciacchio, Dawn T., c/o IBM United Kingdom Ltd. , Tessler, Christopher L., IBM United Kingdom Ltd. , Volant, Richard Paul, IBM United Kingdom Ltd.
IPC分类号： H01L21/768 , H01L23/538
CPC分类号： H01L21/76804 , H01L23/5329 , H01L23/66 , H01L2924/0002 , H01L2924/3011 , H01L2924/00
摘要： Disclosed is a manufacturable silicon-based modular integrated circuit structure having performance characteristics comparable to high frequency GaAs-based integrated circuit structures, comprising materials and made in process steps which are compatible with existing low cost silicon-based integrated circuit processing.
摘要翻译：公开了一种可制造的基于硅的模块化集成电路结构，其具有与高频GaAs基集成电路结构相当的性能特征，其包括与现有的低成本硅基集成电路处理兼容的材料和制造工艺步骤。

80. 发明公开

EP0976153A1 NANOPOROUS DIELECTRIC FILMS WITH GRADED DENSITY AND PROCESS FOR MAKING SUCH FILMS 失效
标题翻译： NANOPORÖSEDIELEKTRISCHE SCHICHTEN MIT DICHTGRADIENT UND VERFAHREN ZU IHRE HERSTELLUNG
公开(公告)号：EP0976153A1
公开(公告)日：2000-02-02
申请号：EP98914425.8
申请日：1998-04-02
申请人： AlliedSignal Inc.
发明人： WALLACE, Stephen , SMITH, Douglas, M. , RAMOS, Teresa , RODERICK, Kevin, H. , DRAGE, James, S.
IPC分类号： H01L21/768 , H01L23/522 , H01L23/532
CPC分类号： H01L23/5329 , H01L21/02126 , H01L21/02203 , H01L21/02216 , H01L21/02282 , H01L21/02337 , H01L21/02343 , H01L21/31695 , H01L21/7682 , H01L23/5222 , H01L2221/1047 , H01L2924/0002 , H01L2924/00
摘要： The present invention relates to nanoporous dielectric films (10) and to a process for their manufacture. A substrate having a plurality of raised lines (4) on its surface is provided with a relatively high porosity, low dielectric constant, silicon containing polymer composition (10) positioned between the raise lines (4) and a relatively low porosity, high dielectric constant, silicon containing composition (8) positioned on the lines (4).
摘要翻译：本发明涉及纳米多孔介电膜（10）及其制造方法。在其表面上具有多个凸起线（4）的基底设置有相对高孔隙率的低介电常数，位于升高线（4）之间的含硅聚合物组合物（10）和相对较低的孔隙率，高介电常数，位于管线（4）上的含硅组合物（8）。

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