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41. 发明公开

EP1353461A4 ANALOG FILTER 审中-公开
标题翻译：模拟滤波器
公开(公告)号：EP1353461A4
公开(公告)日：2005-05-25
申请号：EP01270028
申请日：2001-12-06
申请人： SAKAI YASUE
发明人： KOYANAGI YUKIO
IPC分类号： H03H11/04 , H03H15/02 , H03H17/02 , H03M3/02 , H04B14/06
CPC分类号： H03H11/04 , H03H17/02 , H03H17/026
摘要： An analog filter comprises first and second arithmetic operation sections (2-1, 2-2) connected in series and each composed of processing circuits connetected in series. Each processing circuit includes an S/H circuit of plural stages capable of holding a DELTA SIGMA -modulated signal and an analog adder for adding the input and output signals of the S/H circuit. The number of stages of the S/H circuits (11-1, 14-1, 17-1, 20-1; 11-2, 14-2, 17-2, 20-2) decreases toward the end of each arithmetic operation section. By using such an analog filter, oversampling and convolution of a DELTA SIGMA -modulated signal are conducted so that the envelop of the output waveform may be a quadratic curve of finite carrier that converges to zero at finite sampling points so as to prevent phase distortion of an LPF and a discretization error due to a conventional function. Comparing with a conventional circuit for oversampling and convolution, the number of stages of the S/H circuits and the number of adders are small.

42. 发明公开

EP0998795A4 METHOD AND APPARATUS FOR PERFORMANCE IMPROVEMENT BY QUALIFYING PULSES IN AN OVERSAMPLED, NOISE-SHAPING SIGNAL PROCESSOR 失效
标题翻译：提高性能的凭资质IN A脉冲的方法和装置的过采样噪声整形信号处理器
公开(公告)号：EP0998795A4
公开(公告)日：2004-03-17
申请号：EP98937027
申请日：1998-07-20
申请人： TRIPATH TECHNOLOGY INC
发明人： TRIPATHI ADYA S , DELANO CARY L
IPC分类号： H03M3/02 , H04B14/06
CPC分类号： H04B14/06 , H03M3/376 , H03M3/43 , H03M3/454
摘要： An oversampled, noise shaping signal processor (300) is described having at least one integrator stage (306) in the loop. A sampling stage (310) is connected coupled to the at least one integrator stage. The sampling stage samples an analog signal at a sample frequency. Qualification logic (318) coupled to the sampling stage receives a pulse waveform therefrom, and ensures that signal transitions in the pulse waveform occur more than a first time period apart and that the waveform can therefore be handled by, for example, a power switching device (312). A switching stage (312) in the loop is coupled to the qualification logic. The signal processor (300) has a feedback path from the output of the switching stage (312) to the input of the at least one integrator stage (306) thereby closing the loop.
摘要翻译：功率开关器件的过渡时间最终限制了寻求设备可被切换的速率。因为不可接受窄脉冲的发生是在对过采样，噪声整形信号处理器比较少见，寻求窄脉冲的消除是通过在调制器环路中使用的电路的哪些约束转变之间的时间为大于或等于引入一些最小时间周期，这又提供了平滑的接口功率开关器件。然而，由于通过该脉冲鉴定电路引入的延迟的，调制器回路采样频率增大到处理任何所得的不稳定性。因此，为了过采样，噪声整形信号处理器描述了具有在反馈回路中的至少一个积分器级。在反馈回路中的采样阶段被耦合到所述至少一个积分器级。采样阶段样品在采样频率的模拟信号。耦合到所述采样级资格逻辑接收来自一个脉冲波形那里，并确保没有在脉冲波形的信号转变发生大于第一时间段更开，并做了波形因此可以通过，例如，电力开关设备来处理。在反馈回路中的开关级被耦合到所述逻辑的资格。该信号处理器具有从开关级的输出到所述至少一个积分器级从而闭合反馈回路的输入端的反馈路径。

43. 发明授权

EP0877490B1 Procédé et dispositif de communication sur des convertisseurs delta sigma 失效
标题翻译：用于经由delta-sigma转换achrichtenübertragung方法和装置
公开(公告)号：EP0877490B1
公开(公告)日：2003-03-26
申请号：EP98410049.5
申请日：1998-05-06
申请人： STMicroelectronics S.A.
发明人： Combe, Michel , Fraisse, Christian
IPC分类号： H03M3/02 , H04B14/06
CPC分类号： H04B14/062

44. 发明授权

EP0661819B1 Data compression 失效
公开(公告)号：EP0661819B1
公开(公告)日：2003-01-29
申请号：EP94308662.9
申请日：1994-11-23
申请人： International Business Machines Corporation
发明人： Jones, Ronald Henry
IPC分类号： H03M7/30 , H04B14/06
CPC分类号： G11B20/00007 , H04B14/06 , H04B14/066

45. 发明公开

EP1078481A1 METHOD AND APPARATUS FOR AUTOMATED TIME DOMAIN MONITORING IN OPTICAL NETWORKS 有权
标题翻译：方法和装置自动工时域看着光网络
公开(公告)号：EP1078481A1
公开(公告)日：2001-02-28
申请号：EP99921955.3
申请日：1999-05-13
申请人： Telcordia Technologies, Inc.
发明人： BANWELL, Thomas, C. , CHEUNG, Nim, K. , ANDERSON, William, T. , HODGE, James
IPC分类号： H04B14/06
CPC分类号： H04B10/079 , H04B10/0795 , H04J2203/0062
摘要： Methods and apparatuses are provided for determining characteristics of an input optical signal in an optical network. An optical signal monitoring apparatus (200) estimates a minimum time interval between transitions (210) in the input signal, determines a clock signal (206) based on the estimated minimum time interval, and performs a time domain measurement (230) on the input signal based on the determined clock signal. The optical signal monitoring apparatus (200) samples the input signal based on the determined clock signal and determines the characteristics of the input signal.

46. 发明公开

EP0954129A1 Method and device for adaptive differential pulse code modulation. 失效
标题翻译： Verfahren und Einrichtung zur adaptiven differentnziellen Pulskodemodulation
公开(公告)号：EP0954129A1
公开(公告)日：1999-11-03
申请号：EP98401071.0
申请日：1998-04-30
申请人： ALCATEL
发明人： Hernandez Gamazo, José Miguel , Amengual Guedan, Juan
IPC分类号： H04B14/06
CPC分类号： H04B14/068
摘要： Method of adaptive differential pulse code modulation, ADPCM, which fundamentally satisfies the recommendations G.726 or G.727 of the CCITT, being implemented in an ADPCM encoder whereby, given an input sample, a quantified difference signal (DQ) is obtained by subtracting from the input sample an estimated value of this sample, the estimated signal (SE), whereby a feedback loop is formed which includes a prediction module (27). The prediction module (27) calculates, in the preceding frame, the estimated signal (SE) and a partial estimated signal of the sixth order prediction for the current frame sample. Consequently these operations are carried out in parallel with other of the algorithm, resulting in an overall speeding up of the encoding process.
摘要翻译：自适应差分脉冲编码调制方法ADPCM基本上满足CCITT的建议G.726或G.727，在ADPCM编码器中实现，给定输入采样，通过减去量化差分信号（DQ）获得量化差分信号（DQ）从所述输入样本估计所述样本的估计值，所述估计信号（SE）由此形成包括预测模块（27）的反馈回路。预测模块（27）在前一帧中计算当前帧样本的估计信号（SE）和六阶预测的部分估计信号。因此，这些操作与算法中的其他算法并行执行，导致编码过程的总体加速。

47. 发明公开

EP0756789A4 COMPLEXITY DETERMINING APPARATUS 失效
标题翻译：一种用于确定复杂
公开(公告)号：EP0756789A4
公开(公告)日：1999-06-09
申请号：EP94916553
申请日：1994-04-22
申请人： THOMSON CONSUMER ELECTRONICS
发明人： OZKAN MEHMET KEMAL , GIRONS REGIS SAINT
IPC分类号： H03M7/30 , H04B14/04 , H04B14/06 , H04N7/08 , H04N7/081 , H04N7/58 , H04N19/00 , H04N21/2365 , H04N21/434 , G06K9/36 , G06K9/46 , H04N7/12 , H04N11/02 , H04N11/04
CPC分类号： H04B14/046 , H04N19/124 , H04N19/14 , H04N19/146 , H04N19/149 , H04N19/152 , H04N19/176 , H04N19/177 , H04N19/61 , H04N21/2365 , H04N21/4347
摘要： Apparatus for determining a complexity measure of a data signal is disclosed which includes an encoder (14), having an input terminal (5) responsive to a data input signal (DATA IN) and a data output terminal producing a coded output signal (DATA OUT) representing the data input signal (DATA IN) at a constant bit rate. The encoder (14) includes a variable quantizer (46), responsive to the data input signal (DATA IN), for producing a quantized signal, representing the data input signal (DATA IN), having a quantizing step size defined in response to a quantizing step size control signal (QMB). A bit rate regulator (49) produces the quantizing step size control signal (QMB) in response to the bit rate of the coded output signal (TMB) and a quota input signal (Q). A complexity analyzer (14) generates a complexity representative signal (Xpic) related to the quantizing step size (QMB) and the bit rate of the coded output signal (TMB).

48. 发明公开

EP0673576A4 APPARATUS FOR AND METHOD OF SPEECH DIGITIZING. 失效
标题翻译： VORRICHTUNG UND VERFAHREN ZUR DIGITATISIERUNG VON SPRACHE。
公开(公告)号：EP0673576A4
公开(公告)日：1998-04-22
申请号：EP94928090
申请日：1994-09-13
申请人： ERICSSON GE MOBILE INC
发明人： DENT PAUL W
IPC分类号： H04L27/18 , G10L19/00 , H03C1/54 , H03H1/02 , H03M1/00 , H03M1/38 , H03M3/02 , H03M3/04 , H04B1/26 , H04B1/40 , H04B7/26 , H04B14/06 , H04L25/03 , H04L27/00 , H04L27/20 , H04Q7/38 , H04N5/225
CPC分类号： H03M3/024 , H03C1/542 , H03H1/02 , H04B1/0003 , H04B1/0014 , H04B1/0021 , H04B1/0039 , H04B1/26 , H04B1/40 , H04L25/03834 , H04L27/2017 , H04L27/2064
摘要： A speech encoder converts analog speech signals into a stream of binary coded speech samples. A circuit for performing analog to digital conversion compares an input speech signal with a signal from a digital integrator (26). Based on the comparison, a series of decisions are registered which indicate a step sign of the input signal. A syllabic filter (23) generates a step magnitude according to the registered decisions. The step sign and step magnitude are combined providing a sign/magnitude representation of the input signal. When the sign/magnitude representation is integrated digitally in a decimation filter (27), a digital representation of the analog signal is formed. A speech decoder, the antithesis of the encoder, converts binary coded speech samples into an analog waveform in a manner opposite to the A/D conversion method.
摘要翻译：语音编码器将模拟语音信号转换为二进制编码语音样本流。用于执行模数转换的电路将输入语音信号与来自数字积分器（26）的信号进行比较。根据比较结果，登记一系列指示输入信号的阶梯符号的决定。音节滤波器（23）根据登记的决定产生步幅。阶梯符号和阶跃幅度被组合，提供输入信号的符号/幅度表示。当符号/幅度表示在抽取滤波器（27）中被数字地集成时，形成模拟信号的数字表示。与编码器相对的语音解码器以与A / D转换方法相反的方式将二进制编码的语音样本转换为模拟波形。

49. 发明授权

EP0441980B1 TIME-DIVISION MULTIPLEX DATA RELAY EXCHANGE SYSTEM 失效
标题翻译：继电器开关SYSTEM FOR时间复用数据
公开(公告)号：EP0441980B1
公开(公告)日：1997-04-09
申请号：EP90912957.9
申请日：1990-09-04
申请人： FUJITSU LIMITED
发明人： TOMITA, Yoshihiro , FUJIWARA, Tatsuo , SHIMIZU, Hirotoshi , MATSUMOTO, Masashi , FUJIOKA, Yasushi
IPC分类号： H04M7/00 , H04B14/04 , H04B14/06 , H04J3/12 , H04Q11/04
CPC分类号： H04B14/068 , H04J3/12 , H04Q11/04
摘要： A relay exchange system in which a plurality of switchboards for switching transmission information contained in frames each consisting of m bits are connected in cascade using a plurality of transmission paths, a pair of multiplexers are provided at both ends of each of the transmission paths, frames each consisting of n (n

50. 发明授权

EP0394493B1 AUDIO SIGNAL DEMODULATION CIRCUIT 失效
标题翻译：解调器的音频信号。
公开(公告)号：EP0394493B1
公开(公告)日：1995-10-25
申请号：EP89911616.4
申请日：1989-10-24
申请人： MATSUSHITA ELECTRIC INDUSTRIAL CO., LTD. , NIPPON HOSO KYOKAI
发明人： MIYOSHI, Toshihiro , OKUMURA, Naoji , ARITA, Hisashi , ISHIKAWA, Kenji , NINOMIYA, Yuichi , OTSUKA, Yoshimichi , KAWASHIMA, Tadashi , IWAMOTO, Takushi
IPC分类号： H04B14/04 , H04B14/06
CPC分类号： H04N7/088 , H04B14/046
摘要： A circuit for demodulating digital voice signals to suppress the broken noise that generates when the synchronism is no more maintained or when the mute is forcibly applied. The demodulation circuit comprises a synchronism detecting circuit (18) and a muting circuit (17) which mutes the output of an interpolation circuit (16) responsive to a synchronizing lock signal produced from the synchronism detecting circuit (18) when the synchronism is no more maintained. The output of the interpolation circuit (16) that is a differential signal is muted and is then integrated to produce a voice signal of high sound quality without noise even when synchronism is not maintained.

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