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41. 发明授权

EP2929638B1 RECONFIGURABLE RECEIVER CIRCUITS FOR TEST SIGNAL GENERATION 有权
标题翻译：可重构接收机电路测试信号发生
公开(公告)号：EP2929638B1
公开(公告)日：2017-01-25
申请号：EP13818055.9
申请日：2013-12-10
申请人： Qualcomm Incorporated
发明人： LEUNG, Lai Kan , NARATHONG, Chiewcharn , HU, Jianyun , FENG, Yunfei
IPC分类号： H04B17/21 , H04B17/29 , H04B1/30
CPC分类号： H04B17/21 , H03F3/193 , H03F3/72 , H03F2200/294 , H03F2200/451 , H04B1/16 , H04B1/30 , H04B17/00 , H04B17/29
摘要： Receiver circuits that can be reconfigured to generate test signals in a wireless device are disclosed. In an exemplary design, an apparatus includes a mixer and an amplifier. The mixer downconverts an input radio frequency (RF) signal based on a local oscillator (LO) signal in a first mode. The amplifier, which is formed by at least a portion of the mixer, amplifies the LO signal and provides an amplified LO signal in a second mode. In another exemplary design, an apparatus includes an amplifier and an attenuator. The amplifier receives and amplifies an input RF signal in a first mode. The attenuator, which is formed by at least a portion of the amplifier, receives and passes an LO signal in a second mode.

42. 发明公开

EP3063888A1 TRANSMITTER (TX) RESIDUAL SIDEBAND (RSB) AND LOCAL OSCILLATOR (LO) LEAKAGE CALIBRATION USING A RECONFIGURABLE TONE GENERATOR (TG) AND LO PATHS 审中-公开
标题翻译：泄漏校准残留边带（VSB）站（TX）和本地振荡器（LO）与重构的音频发生器（TG）和Lo FOR
公开(公告)号：EP3063888A1
公开(公告)日：2016-09-07
申请号：EP14795701.3
申请日：2014-10-10
申请人： Qualcomm Incorporated
发明人： LEUNG, Lai Kan , NARATHONG, Chiewcharn , HU, Jianyun
IPC分类号： H04B17/11 , H04B17/14 , H04B17/21 , H04B1/38 , H04L27/36 , H04L27/00
CPC分类号： H04B1/38 , H04B17/11 , H04B17/14 , H04B17/21 , H04L27/364 , H04L2027/0016
摘要： Certain aspects of the present disclosure provide methods and apparatus for calibrating a transceiver for wireless communications. One example method generally includes configuring a first oscillating signal as an input signal to at least a portion of a receiver (RX) path, calibrating a residual sideband (RSB) of the receiver path using a second oscillating signal as a local oscillating signal for the receiver path, and calibrating an RSB of a transmitter (TX) path by routing an output of the transmitter path to the receiver path, after calibrating the RSB of the receiver path. Another example method generally includes routing an output of a transmitter path to a receiver path, using a first local oscillating signal for the transmitter path, using a second local oscillating signal for the receiver path, and measuring an output of the receiver path as a local oscillator (LO) leakage for the transmitter path.
摘要翻译：本公开的某些方面提供了一种用于校准用于无线通信的收发信机的方法和装置。一个实施例方法的基因集会包括配置第一振荡信号作为输入信号的边带，以一个接收器中的至少一个部分（RX）的路径，校准残差（RSB）使用第二振荡信号作为本地振荡信号的接收器路径的通过路由到发射机路径到接收器路径的输出，校准接收机路径的RSB后（TX）路径的接收器路径，和校准发射机RSB。另一示例方法基因集会包括路由到发射机路径的输出到一个接收器路径，使用用于发射机路径的第一本地振荡信号，使用用于接收器路径中的第二本地振荡信号，并且作为用于发射机路径的本地振荡器（LO）泄漏的接收机路径的输出的测量。

43. 发明公开

EP2974028A1 LOCAL OSCILLATOR (LO) GENERATOR WITH MULTI-PHASE DIVIDER AND PHASE LOCKED LOOP 审中-公开
标题翻译：采用了一块和多相位锁相环机振荡发生器
公开(公告)号：EP2974028A1
公开(公告)日：2016-01-20
申请号：EP14715181.5
申请日：2014-03-11
申请人： Qualcomm Incorporated
发明人： LIU, Li , NARATHONG, Chiewcharn
IPC分类号： H03L7/18
CPC分类号： H04B1/16 , H03L7/099 , H03L7/18
摘要： In one design, an apparatus includes an oscillator, a divider, and a phase locked loop (PLL). The oscillator receives a control signal and provides an oscillator signal having a frequency determined by the control signal. The divider receives the oscillator signal and generates multiple divided signals of different phases. The PLL receives a reference signal and a selected divided signal and generates the control signal for the oscillator. The divider is powered on and off periodically and wakes up in one of multiple possible states, with each state being associated with a different phase of the selected divided signal. Phase continuity of the selected divided signal is ensured by using the divider as part of the PLL. The PLL locks the selected divided signal to the reference signal, and the selected divided signal has continuous phase due to the reference signal having continuous phase.

44. 发明公开

EP2883305A1 MULTI-CASCODE AMPLIFIER BIAS TECHNIQUES 审中-公开
标题翻译：多编码放大器偏置技术
公开(公告)号：EP2883305A1
公开(公告)日：2015-06-17
申请号：EP13750611.9
申请日：2013-08-08
申请人： Qualcomm Incorporated
发明人： SU, Wenjun , NARATHONG, Chiewcharn , YIN, Guangming , HADJICHRISTOS, Aristotele
IPC分类号： H03F1/22 , H03F3/193
CPC分类号： H03F1/223 , H03F3/193
摘要： Techniques for generating bias voltages for a multi-cascode amplifier. In an aspect, a multi-cascode bias network is provided, each transistor in the bias network being a replica of a corresponding transistor in the multi-cascode amplifier, enabling accurate biasing of the transistors in the multi-cascode amplifier. In another aspect, a voltage supply for the multi-cascode amplifier is provided separately from a voltage supply for the replica bias network, to advantageously decouple variations in the amplifier voltage supply from the bias network voltage supply. In yet another aspect, the bias voltages of transistors in the multi-cascode amplifier may be configured by adjusting the impedance of resistive voltage dividers coupled to the transistor gate biases. As the gain of the amplifier depends on the bias voltages of the cascode amplifiers, the gain of the amplifier may be adjusted in this manner without introducing a variable gain element directly in the amplifier signal path.
摘要翻译：用于为多级共源共栅放大器生成偏置电压的技术。在一个方面中，提供了多级共射共基放大器偏置网络，偏置网络中的每个晶体管是多级共射共基放大器中的对应晶体管的复制品，其实现了多级共射共基放大器中的晶体管的精确偏置。在进一步的方面中，用于多级共射共基放大器的电压供应与用于复制品偏置网络的电压供应分离地提供，以有利地将放大器电压供应中的变化与偏置网络电压供应去耦。在又一方面，多级共射共基放大器中的晶体管的偏置电压可以通过调整耦合到晶体管栅极偏置的电阻分压器的阻抗来配置。由于放大器的增益取决于共源共栅放大器的偏置电压，所以放大器的增益可以以这种方式有利地被调整，而不会直接在放大器信号路径中引入可变增益元件。

45. 发明公开

EP2380278A1 ULTRA LOW NOISE HIGH LINEARITY LNA FOR MULTI-MODE TRANSCEIVER 有权
标题翻译：超低噪音低噪声放大器高线性度MULTI FASHIONS收发器
公开(公告)号：EP2380278A1
公开(公告)日：2011-10-26
申请号：EP09789605.4
申请日：2009-04-17
申请人： QUALCOMM Incorporated
发明人： YANG, Zixiang , NARATHONG, Chiewcharn , SUN, Bo
IPC分类号： H03F1/32 , H03F3/193 , H03F3/45 , H03F3/72
CPC分类号： H03F3/193 , H03F1/3205 , H03F1/3211 , H03F3/45183 , H03F3/72 , H03F2200/294 , H03F2200/451 , H03F2203/45386 , H03F2203/45481 , H03F2203/7221
摘要： An amplifier for operating at low, middle or high linearity modes, the amplifier comprising a first low noise amplifier (LNA) coupled to a second low noise amplifier for providing amplification; a first degeneration inductor coupled to the first LNA for providing impedance matching; a −g3 generation block coupled to an output of the second LNA for canceling third-order transconductance distortion; and a first enabling/disabling component coupled to the output of the second LNA and aligned in parallel with the −g3 generation block for operating at least one of the first and second LNAs at one of the low, middle or high linearity modes.

46. 发明公开

EP2340612A1 AMPLIFIER WITH GAIN EXPANSION STAGE 审中-公开
标题翻译：具有增益扩展级放大器
公开(公告)号：EP2340612A1
公开(公告)日：2011-07-06
申请号：EP09767874.2
申请日：2009-06-19
申请人： QUALCOMM Incorporated
发明人： NARATHONG, Chiewcharn , ANIRUDDHAN, Sankaran , SU, Wenjun
IPC分类号： H03F1/30 , H03F1/32 , H03F3/24
CPC分类号： H03F1/3276 , H03F1/301 , H03F1/308 , H03F1/3241 , H03F3/245 , H03F3/3022 , H03F2200/336 , H03F2200/451 , H03F2200/453 , H03F2203/30099 , H03F2203/30132 , H03F2203/7231
摘要： Techniques are disclosed for extending an amplifier's linear operating range by concatenating an amplifier exhibiting gain compression with a gain expansion stage. In an exemplary embodiment, a gain expansion stage incorporates a Class-B stage, a Class-AB stage, or a combination of the two. In an exemplary embodiment, both the gain compression stage and gain expansion stage are provided with a replica current biasing scheme to ensure stable biasing current over variations in temperature, process, and/or supply voltage. Further disclosed is an output voltage biasing scheme to set the DC output voltage to ensure maximum linear operating range.

47. 发明公开

EP4264837A2 BIASING TECHNIQUE FOR RECEIVER BASED ON RADIO FREQUENCY (RF) JAMMER DETECTION 审中-实审
公开(公告)号：EP4264837A2
公开(公告)日：2023-10-25
申请号：EP21878749.7
申请日：2021-11-22
申请人： QUALCOMM INCORPORATED
发明人： LEUNG, Lai Kan , TASIC, Aleksandar Miodrag , GATTA, Francesco , NARATHONG, Chiewcharn , HOLLAND, Kyle David
IPC分类号： H04B1/10

48. 发明授权

EP2039003B1 VERSATILE AND COMPACT DC-COUPLED CML BUFFER 有权
标题翻译：多功能和紧凑的直流耦合CML缓冲器
公开(公告)号：EP2039003B1
公开(公告)日：2018-04-04
申请号：EP07798718.8
申请日：2007-06-18
申请人： QUALCOMM Incorporated
发明人： NARATHONG, Chiewcharn , SU, Wenjun
IPC分类号： H03K3/356 , H03K19/017 , H03K19/0185
CPC分类号： H03K19/01721 , H03K3/356017 , H03K19/018514
摘要： Differential signal output nodes of a novel CML buffer are DC-coupled by contiguous conductors to the differential signal input nodes of a load (for example, a CML logic element). The CML buffer includes a pulldown load latch that increases buffer transconductance and that provides a DC bias voltage across the conductors and onto the input nodes of the load, thereby obviating the need for the load to have DC biasing circuitry. Capacitors of a conventional AC coupling between buffer and load are not needed, thereby reducing the amount of die area needed to realize the circuit and thereby reducing the capacitance of the buffer-to-load connections. Switching power consumption is low due to the low capacitance buffer-to-load connections. Differential signals can be communicated from buffer to load over a wide frequency range of from less than five kilohertz to more than one gigahertz with less than fifty percent signal attenuation.

49. 发明公开

EP3292629A1 LOW NOISE AMPLIFIER MODULE WITH OUTPUT COUPLER 审中-实审
标题翻译：具有输出耦合器的低噪声放大器模块
公开(公告)号：EP3292629A1
公开(公告)日：2018-03-14
申请号：EP16716805.3
申请日：2016-04-08
申请人： Qualcomm Incorporated
发明人： LEUNG, Lai Kan , WANG, Kevin Hsi Huai , PAN, Dongling , NARATHONG, Chiewcharn
IPC分类号： H03F1/02 , H03F3/21 , H03F3/24 , H03F3/68 , H03F3/72 , H03F3/62 , H03F3/189 , H04B17/21
CPC分类号： H04B17/21 , H03F1/0205 , H03F1/0277 , H03F3/189 , H03F3/19 , H03F3/211 , H03F3/24 , H03F3/62 , H03F3/68 , H03F3/72 , H03F2200/111 , H03F2200/294 , H03F2200/451 , H03F2203/21106 , H03F2203/21142 , H03F2203/21145 , H04W24/02
摘要： An amplifier module with an output coupler is disclosed. The amplifier module may include a plurality of input terminals and two or more output terminals. Each input terminal may be coupled to an input of an independent amplifier. Outputs from the independent amplifiers may be coupled to the two or more output terminals. The amplifier module may include an output coupler to couple the two or more output terminals together. A signal may be received by a first output terminal and be coupled by the output coupler to a second output terminal. In some embodiments, when the two or more output terminals are coupled together, the independent amplifiers may be made inactive or operated in a minimum gain configuration.

50. 发明授权

EP2470918B1 HIGH LINEAR FAST PEAK DETECTOR 有权
标题翻译：高线性快速PEAK探测器
公开(公告)号：EP2470918B1
公开(公告)日：2018-01-17
申请号：EP10751748.4
申请日：2010-08-27
申请人： QUALCOMM Incorporated
发明人： SU, Wenjun , HADJICHRISTOS, Aristotele , CASSIA, Marco , NARATHONG, Chiewcharn
IPC分类号： G01R19/04
CPC分类号： G01R19/04
摘要： A high linear fast peak detector having a variable bias current and/or a variable bias voltage is described. In an exemplary design, the peak detector includes a transistor, a variable current source, a capacitor, and a feedback circuit. The transistor receives the input signal and provides a source current. The variable current source receives the input signal, provides high bias current when the input signal is low, and provides low bias current when the input signal is high. The capacitor is charged by the source current when the input signal is high and is discharged by the high bias current when the input signal is low. The feedback circuit receives a detected signal from the capacitor and provides higher bias voltage for the transistor when the input signal is high, which results in higher source current from the transistor.

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