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1. 发明公开

EP4406127A1 CONFIGURABLE RECEIVE PATH FOR MIXER-FIRST OR AMPLIFIER-FIRST SIGNAL PROCESSING 审中-实审
公开(公告)号：EP4406127A1
公开(公告)日：2024-07-31
申请号：EP22777913.9
申请日：2022-08-31
申请人： QUALCOMM INCORPORATED
发明人： LEE, Jang Joon , HOLLAND, Kyle David , KANG, Jian , TASIC, Aleksandar Miodrag , LIAO, Chih-Fan , LI, Yingying , LEUNG, Lai Kan , NARATHONG, Chiewcharn
IPC分类号： H04B1/08
CPC分类号： H04B1/08

3. 发明授权

EP2188891B1 LOCAL OSCILLATOR BUFFER AND MIXER HAVING ADJUSTABLE SIZE 有权
公开(公告)号：EP2188891B1
公开(公告)日：2019-07-31
申请号：EP08830020.7
申请日：2008-09-12
申请人： QUALCOMM Incorporated
发明人： ANIRUDDHAN, Sankaran , NARATHONG, Chiewcharn , SRIDHARA, Sriramgopal , SRIDHARA, Ravi , SAHOTA, Gurkanwal, Singh , BOSSU, Frederic , CHOKSI, Ojas, M.
IPC分类号： H03G3/30 , H03D7/16 , H03D7/14

4. 发明公开

EP3149859A1 RECONFIGURABLE MULTI-MODE TRANSCEIVER 有权
标题翻译： REKONFIGURIERBARER多模式SENDEEMPFÄNGER
公开(公告)号：EP3149859A1
公开(公告)日：2017-04-05
申请号：EP15724135.7
申请日：2015-05-04
申请人： Qualcomm Incorporated
发明人： NARATHONG, Chiewcharn , LEUNG, Lai Kan , PAN, Dongling , RANGARAJAN, Rajagopalan , WANG, Kevin Hsi-huai , ASURI, Bhushan Shanti , TANG, Yiwu
IPC分类号： H04B1/00 , H04B1/403 , H04L5/00 , H04B1/50 , H04B1/54
CPC分类号： H04J4/00 , H04B1/0082 , H04B1/3833 , H04B1/403 , H04B1/50 , H04B1/54 , H04B7/00 , H04L5/001 , H04L5/0023 , H04L5/14 , H04L5/1469 , H04L7/00 , H04L27/36 , H04L27/38 , H04W88/02
摘要： Reconfiguring a transceiver design using a plurality of frequency synthesizers and a plurality of carrier aggregation (CA) receiver (Rx) and transmitter (Tx) chains, the method including: connecting a first frequency synthesizer to a first CA Tx chain; connecting the plurality of frequency synthesizers to the plurality of CA Rx chains, wherein a second frequency synthesizer of the plurality of frequency synthesizers is connected as a shared synthesizer to a first CA Rx chain and a second CA Tx chain.
摘要翻译：使用多个频率合成器和多个载波聚合（CA）接收机（Rx）和发射机（Tx）链重新配置收发机设计，所述方法包括：将第一频率合成器连接到第一CA Tx链; 将所述多个频率合成器连接到所述多个CA Rx链，其中所述多个频率合成器中的第二频率合成器作为共享合成器连接到第一CA Rx链和第二CA Tx链。

5. 发明公开

EP2920887A1 EXPANDABLE TRANSCEIVERS AND RECEIVERS 审中-公开
标题翻译：可膨胀收发器和接收器
公开(公告)号：EP2920887A1
公开(公告)日：2015-09-23
申请号：EP13798824.2
申请日：2013-11-12
申请人： Qualcomm Incorporated
发明人： TASIC, Aleksandar, Miodrag , NARATHONG, Chiewcharn
IPC分类号： H04B1/18
CPC分类号： H04B1/40 , H04B1/18
摘要： Expandable transceivers and receivers supporting operation on multiple frequency bands and multiple carriers are disclosed. In an exemplary design, an apparatus (e.g., a wireless device, an integrated circuit (IC) chip, or circuit module) includes a low noise amplifier (LNA) and interface circuit. The LNA resides on an IC chip and includes a first/on-chip output and a second/off-chip output. The interface circuit also resides on the IC chip, is coupled to the second output of the LNA, and provides an amplified RF signal outside of the IC chip. The apparatus may further include a buffer, load circuit, and downconverter circuit. The buffer resides on the IC chip, is coupled to the first output of the LNA, and receives a second amplified RF signal from outside of the IC chip. The load circuit is coupled to the first output of the LNA. The downconverter circuit is coupled to the load circuit.

6. 发明公开

EP2920879A2 OMNI-BAND AMPLIFIERS 有权
标题翻译： OMNIBAND-VERSTÄRKER
公开(公告)号：EP2920879A2
公开(公告)日：2015-09-23
申请号：EP13802154.8
申请日：2013-11-12
申请人： Qualcomm Incorporated
发明人： TASIC, Aleksandar Miodrag , DAVIERWALLA, Anosh Bomi , NARATHONG, Chiewcharn , VAN ZALINGE, Klaas
IPC分类号： H03F3/193 , H03F3/68 , H04B1/16
CPC分类号： H04W88/02 , H03F3/193 , H03F3/68 , H04B1/0053
摘要： Omni-band amplifiers supporting multiple band groups are disclosed. In an exemplary design, an apparatus (e.g., a wireless device, an integrated circuit, etc.) includes at least one gain transistor and a plurality of cascode transistors for a plurality of band groups. Each band group covers a plurality of bands. The gain transistor(s) receive an input radio frequency (RF) signal. The cascode transistors are coupled to the gain transistor(s) and provide an output RF signal for one of the plurality of band groups. In an exemplary design, the gain transistor(s) include a plurality of gain transistors for the plurality of band groups. One gain transistor and one cascode transistor are enabled to amplify the input RF signal and provide the output RF signal for the selected band group. The gain transistors may be coupled to different taps of a single source degeneration inductor or to different source degeneration inductors.
摘要翻译：公开了支持多个频带组的全频带放大器。在示例性设计中，装置（例如，无线装置，集成电路等）包括用于多个频带组的至少一个增益晶体管和多个共源共栅晶体管。每个带组覆盖多个频带。增益晶体管接收输入射频（RF）信号。共源共栅晶体管耦合到增益晶体管，并为多个带组中的一个提供输出RF信号。在示例性设计中，增益晶体管包括用于多个带组的多个增益晶体管。一个增益晶体管和一个共源共栅晶体管能够放大输入RF信号并提供所选频带组的输出RF信号。增益晶体管可以耦合到单个源极退化电感器的不同抽头或不同的源极退化电感器。

7. 发明公开

EP2856641A1 MULTIPLE-INPUT MULTIPLE-OUTPUT (MIMO) LOW NOISE AMPLIFIERS FOR CARRIER AGGREGATION 有权
标题翻译：低噪声放大器MIMO载波聚合
公开(公告)号：EP2856641A1
公开(公告)日：2015-04-08
申请号：EP13728607.6
申请日：2013-05-24
申请人： Qualcomm Incorporated
发明人： TASIC, Aleksandar Miodrag , DAVIERWALLA, Anosh Bomi , CETINONERI, Berke , KIM, Jusung , NARATHONG, Chiewcharn , VAN ZALINGE, Klaas , SAHOTA, Gurkanwal Singh , JAFFEE, James Ian
IPC分类号： H03F3/193 , H03F1/22 , H03F3/68
CPC分类号： H04L27/2647 , H03F1/223 , H03F3/193 , H03F3/68 , H03F3/72 , H03G3/20
摘要： Multiple-input multiple-output (MIMO) low noise amplifiers (LNAs) supporting carrier aggregation are disclosed. In an exemplary design, an apparatus (e.g., a wireless device, an integrated circuit, etc.) includes a MIMO LNA having a plurality of gain circuits, a drive circuit, and a plurality of load circuits. The gain circuits receive at least one input radio frequency (RF) signal and provide at least one amplified RF signal. Each gain circuit receives and amplifies one input RF signal and provides one amplified RF signal when the gain circuit is enabled. The at least one input RF signal include transmissions sent on multiple carriers at different frequencies to the wireless device. The drive circuit receives the at least one amplified RF signal and provides at least one drive RF signal. The load circuits receive the at least one drive RF signal and provide at least one output RF signal.

8. 发明公开

EP2673931A1 TWO POINT MODULATION DIGITAL PHASE LOCKED LOOP 审中-公开
标题翻译： DIGITALER PHASENREGELKREIS MIT ZWEIPUNKTMODULATION
公开(公告)号：EP2673931A1
公开(公告)日：2013-12-18
申请号：EP12704358.6
申请日：2012-02-08
申请人： Qualcomm Incorporated
发明人： LEUNG, Lai Kan , NARATHONG, Chiewcharn
IPC分类号： H04L27/20 , H03C3/09
CPC分类号： H04L27/20 , H03C3/0941 , H03C3/095 , H03C3/0975
摘要： A two point modulation digital phase locked loop circuit is disclosed. The circuit includes a sampling clock input that is switchable between a plurality of frequencies. The circuit also includes a sigma-delta modulator in a feedback path that receives low-pass modulation data. The circuit also includes a voltage-mode digital-to-analog converter (VDAC) that receives high-pass modulation data. The circuit also includes an analog voltage controlled oscillator coupled to the feedback path and the output of the VDAC. The circuit also includes a phase-to-digital converter (PDC) coupled to the feedback path, the sampling clock and a loop filter.
摘要翻译：公开了一种双点调制数字锁相环电路。该电路包括可在多个频率之间切换的采样时钟输入。电路还包括接收低通调制数据的反馈路径中的Σ-Δ调制器。该电路还包括接收高通调制数据的电压模式数模转换器（VDAC）。电路还包括耦合到反馈路径和VDAC的输出的模拟压控振荡器。电路还包括耦合到反馈路径的相对数字转换器（PDC），采样时钟和环路滤波器。

9. 发明授权

EP2368320B1 LINEAR AND POLAR DUAL MODE TRANSMITTER CIRCUIT 有权
标题翻译：线性和极双模车站围
公开(公告)号：EP2368320B1
公开(公告)日：2012-09-19
申请号：EP09760442.5
申请日：2009-11-25
申请人： QUALCOMM Incorporated
发明人： ANIRUDDHAN, Sankaran , NARATHONG, Chiewcharn , SRIDHARA, Ravi , NEJATI, Babak
IPC分类号： H03C3/40 , H03C5/00 , H03D7/14 , H03D7/16 , H03G3/30 , H04L27/36 , H04L27/34 , H04L27/38
CPC分类号： H03C5/00 , H03C3/40 , H03D7/1441 , H03D7/1458 , H03D7/1483 , H03D7/1491 , H03D7/165 , H03D7/166 , H03D2200/0023 , H03D2200/0084 , H03G3/3042 , H04L27/34 , H04L27/36 , H04L27/361 , H04L27/362 , H04L27/38 , H04L27/389

10. 发明公开

EP2368320A2 LINEAR AND POLAR DUAL MODE TRANSMITTER CIRCUIT 有权
标题翻译：线性和极双模车站围
公开(公告)号：EP2368320A2
公开(公告)日：2011-09-28
申请号：EP09760442.5
申请日：2009-11-25
申请人： QUALCOMM Incorporated
发明人： ANIRUDDHAN, Sankaran , NARATHONG, Chiewcharn , SRIDHARA, Ravi , NEJATI, Babak
IPC分类号： H03C3/40 , H03C5/00 , H04L27/36
CPC分类号： H03C5/00 , H03C3/40 , H03D7/1441 , H03D7/1458 , H03D7/1483 , H03D7/1491 , H03D7/165 , H03D7/166 , H03D2200/0023 , H03D2200/0084 , H03G3/3042 , H04L27/34 , H04L27/36 , H04L27/361 , H04L27/362 , H04L27/38 , H04L27/389
摘要： Method and apparatus for configuring a transmitter circuit to support linear or polar mode. In the linear mode, a baseband signal is specified by adjusting the amplitudes of in-phase (I) and quadrature (Q) signals, while in the polar mode, the information signal is specified by adjusting the phase of a local oscillator (LO) signal and the amplitude of either an I or a Q signal. In an exemplary embodiment, two mixers are provided for both linear and polar mode, with a set of switches selecting the appropriate input signals provided to one of the mixers based on whether the device is operating in linear or polar mode. In an exemplary embodiment, each mixer may be implemented using a scalable architecture that efficiently adjusts mixer size based on required transmit power.

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