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31. 发明公开

EP0997948A3 Semiconductor memory device 审中-公开
标题翻译：半导体存储装置
公开(公告)号：EP0997948A3
公开(公告)日：2005-01-19
申请号：EP99307315.4
申请日：1999-09-15
申请人： FUJITSU LIMITED
发明人： Kajii, Yoshio, c/o Fujitsu Limited , Yanai, Tsuyoshi, c/o Fujitsu LSI Technology Ltd. , Ohkawa, Takashi, c/o Fujitsu LSI Technology Ltd.
IPC分类号： H01L27/11 , H01L21/8244 , G11C11/412 , G11C8/14
CPC分类号： H01L27/1104 , Y10S257/903
摘要： A semiconductor memory device is constructed to include a memory cell formed by a plurality of transistors, wherein each of gate wiring layers of all of the transistors forming the memory cell is arranged to extend in one direction.

32. 发明授权

EP0952614B1 Field effect device with polycrystaline silicon channel 失效
标题翻译：具有多晶硅的沟道场效应器件
公开(公告)号：EP0952614B1
公开(公告)日：2003-07-30
申请号：EP99201796.2
申请日：1991-05-23
申请人： STMicroelectronics, Inc.
发明人： Chan, Tsiu C. , Han, Yu-Pin , Guritz, Elmer
IPC分类号： H01L27/11 , H01L21/8244
CPC分类号： H01L27/11 , H01L27/0605 , H01L27/1104 , H01L27/1108 , H01L27/1112 , H01L28/20

33. 发明授权

EP0821413B1 SRAM-cells and method of fabrication 失效
标题翻译： SRAM单元和制造过程
公开(公告)号：EP0821413B1
公开(公告)日：2002-10-09
申请号：EP96112137.3
申请日：1996-07-26
申请人： UNITED MICROELECTRONICS CORPORATION
发明人： Sun, Shih-Wei
IPC分类号： H01L27/11
CPC分类号： H01L29/42368 , H01L27/11 , H01L27/1104

34. 发明授权

EP0644552B1 Semiconductor memories 失效
标题翻译：半导体存储器
公开(公告)号：EP0644552B1
公开(公告)日：2001-06-06
申请号：EP94119513.3
申请日：1990-12-12
申请人： SONY CORPORATION
发明人： Sasaki, Masayoshi, c/o Intellectual Property Div.
IPC分类号： H01L27/11
CPC分类号： H01L27/1108 , G11C5/14 , G11C11/412 , H01L27/1104

35. 发明公开

EP1083604A2 Radiation hardened semiconductor memory 审中-公开
标题翻译： StrahlungsgeschützterHalbleiterspeicher
公开(公告)号：EP1083604A2
公开(公告)日：2001-03-14
申请号：EP00307507.4
申请日：2000-08-31
申请人： STMicroelectronics, Inc.
发明人： Chan, Tsiu C. , Zamanian, Mehdi
IPC分类号： H01L27/11 , H01L27/02 , H01L21/8244
CPC分类号： H01L27/1104
摘要： A radiation hardened memory device having static random access memory cells includes active gate isolation structures placed in series with oxide isolation regions between the active regions of a memory cell array. The active gate isolation structure includes a gate oxide and polycrystalline silicon gate layer electrically coupled to a supply terminal resulting in an active gate isolation structure that prevents a conductive channel extending from adjacent active regions from forming. The gate oxide of the active gate isolation structures is relatively thin compared to the conventional oxide isolation regions and thus, will be less susceptible to any adverse influence from trapped charges caused by radiation exposure.
摘要翻译：具有静态随机存取存储器单元的辐射硬化存储器件包括与存储器单元阵列的有源区之间的氧化物隔离区域串联放置的有源栅极隔离结构。有源栅极隔离结构包括电耦合到电源端的栅极氧化物和多晶硅栅极层，导致有源栅极隔离结构，其防止从相邻有源区域延伸的导电沟道形成。与常规的氧化物隔离区域相比，有源栅极隔离结构的栅极氧化物相对较薄，因此不太容易受到由辐射暴露引起的俘获电荷的任何不利影响。

36. 发明公开

EP0917194A3 Alignment of a contact hole 有权
标题翻译：的接触孔的精确定位
公开(公告)号：EP0917194A3
公开(公告)日：2000-05-17
申请号：EP98250396.3
申请日：1998-11-12
申请人： NEC CORPORATION
发明人： Imai, Kiyotaka
IPC分类号： H01L21/768 , H01L23/528 , H01L29/417 , H01L23/485
CPC分类号： H01L27/1104 , H01L21/76897
摘要： A semiconductor device includes a first semiconductor body, a diffusion layer in the first semiconductor body, and a laminated structure of an insulating layer on the first semiconductor body adjacent to the diffusion layer and a conductive layer on the insulating layer. An insulating spacer having a width W is formed on a sidewall of the laminated structure. A second semiconductor body is provided having a shared contact hole for establishing an ohmic contact between the diffusion layer and the conductive layer. The shared contact hole has a center axis located at a distance W/2 from the edge of the conductive layer so that portions of the diffusion layer and the conductive layer which are exposed to the outside through the shared contact hole have substantially equal areas.

37. 发明公开

EP0877425A3 Field effect device with polycrystalline silicon channel 失效
标题翻译： Feldeffektanordnung mit einem Kanal aus polykristallinem Silizium
公开(公告)号：EP0877425A3
公开(公告)日：1999-04-21
申请号：EP98201854.1
申请日：1991-05-23
申请人： SGS-THOMSON MICROELECTRONICS, INC.
发明人： Chan, Tsiu C. , Guritz, Elmer H. , Han, Yu-Pin
IPC分类号： H01L27/11
CPC分类号： H01L27/11 , H01L27/0605 , H01L27/1104 , H01L27/1108 , H01L27/1112 , H01L28/20
摘要： A CMOS SRAM cell having first and second field effect devices connected as an inverter. The first field effect device is n-channel and has both its source and drain in a substrate and its gate formed from a first polysilicon layer. The second field effect device has both its source and drain formed in the first polysilicon layer with its gate formed from the substrate. An electrical connection is formed between the drain of the first field effect device in the substrate and the drain of the second field effect device in the first polysilicon layer, this connection may be a diode connection. An electrical connection is formed between the gates of the first field effect device in the first polysilicon layer and the gate of the second field effect device in the substrate. The first and second field effect devices are thereby connected as an inverter.
摘要翻译： CMOS SRAM单元在作为数据存储节点的公共节点和电源之间具有多晶硅信号线。在该多晶硅信号线内制造场效应器件。场效应器件的沟道通过薄栅介质与衬底中的有源区域分离，衬底内的有源区域用作场效应器件的控制栅极。这种器件可用于提供用于CMOS SRAM单元的多晶硅P沟道晶体管。

38. 发明授权

EP0357980B1 A memory cell with capacitance for single event upset protection 失效
标题翻译：存储电容器作为对单一事件的保护。
公开(公告)号：EP0357980B1
公开(公告)日：1995-01-11
申请号：EP89114650.8
申请日：1989-08-08
申请人： TEXAS INSTRUMENTS INCORPORATED
发明人： Blake, Terence G. W. , Houston, Theodore W.
IPC分类号： H01L27/11 , H01L27/108
CPC分类号： G11C5/005 , G11C11/4125 , H01L27/1104 , Y10S257/904

39. 发明公开

EP0623932A2 Soft error immune CMOS static RAM cell 失效
标题翻译： Gegen weiche FehlerbroadstandsfähigeCMOS-statische RAM-Speicherzelle。
公开(公告)号：EP0623932A2
公开(公告)日：1994-11-09
申请号：EP94480022.6
申请日：1994-03-08
申请人： International Business Machines Corporation
发明人： Wang, Wen-Yuan , Klaasen, William Alan
IPC分类号： G11C11/412
CPC分类号： H01L27/1104 , Y10S257/903
摘要： Soft error immunity of a storage cell is greatly increased by division of a storage node into at least two portions and location of those portions on opposite sides of an isolation structure, such as a well of a conductivity type opposite to that of the substrate in which transistors of the memory cell may also be formed. The isolation structure thus limits collection of charge to only one of the portions of the storage node and reduces charge collection efficiency to a level where a critical amount of charge cannot be collected in all but a statistically negligible number of cases when such charge is engendered by impingement by ionizing radiation, such as energetic alpha particles. The layout of the memory cell having this feature also advantageously provides a simplified topology for the formation of additional ports comprising word line access transistors and bit lines.
摘要翻译：存储节点被分成至少两个部分并且位于隔离结构的相对侧上，例如与其中也可形成存储器单元的晶体管的衬底相反的导电类型的阱。隔离结构将电荷收集限制在存储节点的仅一个部分，并且将电荷收集效率降低到一个水平，其中在通过冲击产生这种电荷的情况下，除了统计上可忽略的数量之外，不能收集临界电荷量通过电离辐射，例如能量α粒子。具有该特征的存储单元的布局也有利地提供了用于形成包括字线访问晶体管和位线的附加端口的简化拓扑。

40. 发明授权

EP0348326B1 Static MESFET random access memory cell 失效
标题翻译：静态MESFET存储单元随机访问。
公开(公告)号：EP0348326B1
公开(公告)日：1994-10-19
申请号：EP89480063.0
申请日：1989-04-25
申请人： International Business Machines Corporation
发明人： Plass, Donald Wayne
IPC分类号： G11C11/417
CPC分类号： G11C11/417 , H01L27/1104

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