专利快速检索-快速检索全球专利，免费商用专利数据库-IPRDB

31. 发明公开

EP1365551A1 Highly-available OSPF routing protocol 审中-公开
标题翻译： HochverfügbaresOSPF Leitweglenkungsprotokoll
公开(公告)号：EP1365551A1
公开(公告)日：2003-11-26
申请号：EP03252645.1
申请日：2003-04-25
申请人： Chiaro Networks Ltd.
发明人： Folkes, Ronald Paul , Visser, Lance A. , Watson, Thomas Lee
IPC分类号： H04L12/56 , H04L29/14
CPC分类号： H04L45/28 , H04L45/02 , H04L45/586 , H04L45/60
摘要： In highly-available Open Shortest Path First (OSPF) routing in a network, the dynamic state of a backup OSPF instance 24 in a router is synchronized 222-225 with the dynamic state of an active OSPF instance 23 using explicit message transmission 224 from the active instance to the backup instance. After this, the dynamic state synchronization 225 of the backup OSPF instance 24 is maintained 226 using a combination of explicit message updates from the active OSPF instance together with a message flow-through mechanism. In the event of fail-over 301 of the active OSPF instance 23, then the router 20 recovers seamlessly without reconfiguring or interrupting traffic among peer routers in the network, by functionally substituting 301-310 the synchronized backup OSPF instance 24 for the active OSPF instance 23, such that the backup OSPF instance establishes 301-310 itself as the new active OSPF instance.
摘要翻译：在网络中的高度可用的开放最短路径优先（OSPF）路由中，路由器中的备份OSPF实例24的动态状态与活动OSPF实例23的动态状态同步222-225，使用来自活动实例到备份实例。此后，使用来自活动OSPF实例的显式消息更新与消息流通机制的组合来维护备份OSPF实例24的动态状态同步225。在故障切换301的活动OSPF实例23的情况下，路由器20无缝地恢复，而不会在网络中的对等路由器之间重新配置或中断流量，通过功能代替301-310同步备份OSPF实例24进行活动的OSPF实例如图23所示，备份OSPF实例自身建立了301-310作为新的活动OSPF实例。

32. 发明公开

EP1341016A2 Optical fiber array 审中-公开
标题翻译：光纤阵列
公开(公告)号：EP1341016A2
公开(公告)日：2003-09-03
申请号：EP03250554.7
申请日：2003-01-29
申请人： Chiaro Networks Ltd.
发明人： Geron, Amir , Shekel, Eyal
IPC分类号： G02B6/38
CPC分类号： G02B6/3812 , G02B6/3861 , G02B6/3885
摘要： An improved linear polarization maintaining optical fiber array and a method of making the array are disclosed. The fibers (14) of the array are seated in V-grooves (40) formed in two silicon plates (42,44), which are then approximated and bonded together to hold the fibers (14) securely therebetween. The terminal portions (20) of the fibers (14) are disposed in alumina, glass or zirconium ferrules (22), which protect the fibers (14) from distortion and thus increased loss, caused by asymmetric external pressure of the housing. Using the method of manufacture disclosed herein, it is possible to test each fiber prior to its incorporation in the array.
摘要翻译：公开了一种改进的线性偏振保持光纤阵列及其制造方法。阵列的纤维（14）位于形成在两个硅片（42,44）中的V形槽（40）中，然后将两个硅片（42,44）接近并粘合在一起以牢固地将纤维（14）固定在它们之间。纤维（14）的末端部分（20）设置在氧化铝，玻璃或锆箍（22）中，该氧化铝，玻璃或锆箍（22）保护纤维（14）免于由外壳的不对称外部压力引起的变形并因此增加损失。使用本文公开的制造方法，可以在将每根光纤并入阵列之前测试每根光纤。

33. 发明公开

EP1303063A2 Fast decision threshold controller for burst-mode receiver 审中-公开
标题翻译： Schnelle EntscheidungsschwellensteuerungfürBurstbetriebempfang
公开(公告)号：EP1303063A2
公开(公告)日：2003-04-16
申请号：EP02256886.9
申请日：2002-10-03
申请人： Chiaro Networks Ltd.
发明人： Brewer, Tony M. , Davies, Christopher P. , McDermott III, Thomas C. , Rozman, Allen F.
IPC分类号： H04B10/158
CPC分类号： H04L25/062 , H04B10/695
摘要： A repetitive burst-mode input signal that has a dark time portion, a preamble portion, and a payload portion is converted into a limited output signal in accordance with a decision threshold level, which is controlled by selectively coupling an averaged value of the burst-mode data amplitude to the decision threshold level. The timing sequence for selectively coupling the averaged signal value is controlled such that the average value of the burst-mode signal acquired during the preamble portion of the burst-mode signal is applied to the decision threshold level during substantially all of the payload portion. The control circuit may incorporate a phase-locked loop, which locks onto the repetitive dark time frequency and in response synthesizes a switchable track enable signal that controls the timing sequence of the decision threshold level. The phase-locked loop can employ all-digital, analog, and/or hybrid digital/analog circuitry.
摘要翻译：具有暗时间部分，前导码部分和有效载荷部分的重复突发模式输入信号根据判定阈值电平被转换成有限输出信号，该判定阈值电平通过选择性地耦合突发脉冲串的平均值来控制，模式数据幅度到决策阈值水平。控制用于选择性地耦合平均信号值的定时序列，使得在突发模式信号的前导部分期间获取的突发模式信号的平均值在基本上所有的有效载荷部分中被应用于判定阈值电平。控制电路可以结合锁相环，其锁定在重复的暗时间频率上，并且响应于合成控制决策阈值电平的定时序列的可切换轨道使能信号。锁相环可以采用全数字，模拟和/或混合数字/模拟电路。

34. 发明公开

EP0998693A4 INTEGRATED OPTICS BEAM DEFLECTORS AND SYSTEMS 失效
标题翻译：集成光束引水系统
公开(公告)号：EP0998693A4
公开(公告)日：2002-08-14
申请号：EP98928511
申请日：1998-06-23
申请人： CHIARO NETWORKS LTD
发明人： SHEKEL EYAL , MAJER DANIEL , RUSCHIN SHLOMO , MATMON GUY , VECHT JACOB , ARIEL YEDIDIA
IPC分类号： B41J2/44 , B41J2/45 , B41J2/455 , G02B6/12 , G02B6/28 , G02B6/43 , G02B27/00 , G02F1/015 , G02F1/295 , G02F1/313 , H01S5/323
CPC分类号： B41J2/451 , G02B6/2813 , G02B6/43 , G02B27/0087 , G02B2006/12145 , G02F1/2955 , G02F1/313 , G02F2202/101
摘要： An optical switch (20) including a monolithic plurality of selectably directable optical beam deflecting devices (52, 54, 56, 58) and a plurality of optical beam receiving devices (55, 424).

35. 发明公开

EP1220500A2 System and method for router packet control and ordering 审中-公开
标题翻译：系统及控制方法，并在路由器的数据包的分类
公开(公告)号：EP1220500A2
公开(公告)日：2002-07-03
申请号：EP01310442.7
申请日：2001-12-13
申请人： Chiaro Networks Ltd.
发明人： Brewer, Tony M. , Dugan, Michael K. , Kleiner, Jim , Palmer, Gregory S. , Vogel, Paul F.
IPC分类号： H04L12/56 , H04Q11/08
CPC分类号： H04L49/103 , H04L49/3018 , H04L49/352 , H04L49/357
摘要： Hardware interconnected around multiple packet forwarding engines prepends sequence numbers to packets going into multiple forwarding engines through parallel paths, After processing by the multiple forwarding engines, packets are reordered using queues and a packet ordering mechanism, such that the sequence numbers are put back into their original prepended order. Exception packets flowing through the forwarding engines do not follow a conventional fast path, but are processed off-line and emerge from the forwarding engines out of order relative to fast path packets. These exception packets are marked, such that after they exit the forwarding engines, they are ordered among themselves independent of conventional fast path packets. Viewed externally, all exception packets are ordered across all multiple forwarding engines independent of the fast path packets.
摘要翻译：硬件各地的多个数据包转发引擎互连前添加序列号，以包由多个转发引擎进入通过并行路径多个转发引擎，处理后的报文都使用队列和分组排序机制的重新排序，检查没有序列号被放回他们的原来预谋秩序。流经转发引擎异常分组不遵循常规的快速路径，但离线进行处理，并从转发引擎浮现出相对顺序的快速路径数据包。这些数据包被标记的异常，并检查后，他们退出转发引擎，他们自己独立的常规的快速路径数据包中订购。从外部看，所有的异常数据包会在所有多个转发引擎独立的快速路径数据包的排序。

36. 发明公开

EP1202596A2 System and method for router data aggregation and delivery 审中-公开
标题翻译： System und Verfahren zur Aggregation undÜbermittlungvon Routerdaten
公开(公告)号：EP1202596A2
公开(公告)日：2002-05-02
申请号：EP01309174.9
申请日：2001-10-30
申请人： Chiaro Networks Ltd.
发明人： Brewer, Tony M. , Blackmon, Harry C. , Davis, Chris , Dozier, Harold W. , McDermott, Thomas C., III , Wallach, Steven J. , Walker, Dean E. , Yeh, Lou
IPC分类号： H04Q11/00 , H04L12/56
CPC分类号： H04L45/00 , H04J3/0605 , H04L1/004 , H04L1/0083
摘要： A chunk format for a large-scale, high data throughput router includes a preamble that allows each individual chunk to have clock and data recovery performed before the chunk data is retrieved. The format includes a chunk header that contains information specific to the entire chunk. A chunk according to the present format can contain multiple packet segments, with each segment having its own packet header for packet-specific information. The format provides for a scrambler seed which allows scrambling the data to achieve a favorable zero and one balance as well as minimal run lengths. There can be a random choice of available scrambler seeds for any particular chunk to avoid malicious forcing of zero and one patterns or run lengths of bit zeroes and ones. There are a chunk cyclical redundancy check (CRC) as well as forward error correction (FEC) bytes to detect and/or correct any errors and also to insure a high degree of data and control integrity. Advantageously, a framing symbol inserted into the chunk format itself allows the receiving circuitry to identify or locate a particular chunk format. "Break Bytes" and "Make Bytes" fields located at the beginning of a chunk preamble precondition an optical receiver to a proper state before the actual chunk arrives at the receiver.
摘要翻译：用于大规模，高数据吞吐量路由器的块格式包括前导码，其允许每个单独的块在检索块数据之前执行时钟和数据恢复。该格式包括一个包含特定于整个块的信息的块头。根据本格式的块可以包含多个分组段，每个段具有用于分组特定信息的其自己的分组报头。该格式提供加扰器种子，其允许加扰数据以获得良好的零和一个平衡以及最小的游程长度。可以随意选择任何特定块的可用扰码器种子，以避免恶意强制零和一种模式或运行长度的零位和零。有一个块循环冗余校验（CRC）以及前向纠错（FEC）字节来检测和/或纠正任何错误，并且还保证高度的数据和控制完整性。有利地，插入块格式的成帧符号本身允许接收电路识别或定位特定的块格式。位于块前导前缀前面的“间隔字节”和“字节”字段使光接收器在实际块到达接收器之前处于适当的状态。

37. 发明公开

EP1202502A2 System and method for router central arbitration 审中-公开
标题翻译：在einem路由器中的Verfahren und Vorrichtung mit zentralisierter Arbitrierung
公开(公告)号：EP1202502A2
公开(公告)日：2002-05-02
申请号：EP01309173.1
申请日：2001-10-30
申请人： Chiaro Networks Ltd.
发明人： Brewer, Tony M. , Palmer, Gregory S. , Shaw, Keith W.
IPC分类号： H04L12/56
CPC分类号： H04L45/00 , H04L45/60 , H04L47/50 , H04L47/525 , H04L47/6225 , H04L47/624 , H04L49/1507 , H04L49/205 , H04L49/254 , H04L49/50
摘要： A centralized arbitration mechanism provides that a router switch fabric is configured in a consistent fashion. Remotely distributed packet forwarding modules determine which data chunks are ready to go through the optical switch and communicates this to the central arbiter. Each packet forwarding module has an ingress ASIC containing packet headers in roughly four thousand virtual output queues. Algorithms choose at most two chunk requests per chunk period to be sent to the arbiter, which queues up to roughly 24 requests per output port. Requests are sent through a Banyan network, which models the switch fabric and scales on the order of NlogN, where N is the number of router output ports.. Therefore a crossbar switch function can be modeled up to the 320 output ports physically in the system, and yet have the central arbiter scale with the number of ports in a much less demanding way. An algorithm grants at most two requests per port in each chunk period and returns the grants to the ingress ASIC. Also for each chunk period the central arbiter communicates the corresponding switch configuration control information to the switch fabric.
摘要翻译：集中仲裁机制规定，路由器交换结构以一致的方式配置。远程分发的分组转发模块确定哪些数据块准备好通过光学交换机并将其传送到中央仲裁器。每个分组转发模块具有包含大约四千个虚拟输出队列中的分组报头的入口ASIC。算法选择每个块周期最多两个块请求被发送到仲裁器，每个输出端口最多排列大约24个请求。通过Banyan网络发送请求，该网络对交换结构进行建模，并按NlogN的顺序进行扩展，其中N是路由器输出端口的数量。因此，交叉开关功能可以建模到物理系统中的320个输出端口，但中央仲裁规模与港口数量要求相当低。算法在每个块周期内为每个端口提供最多两个请求，并将该授权返回给入口ASIC。而且对于每个块周期，中央仲裁器将相应的交换机配置控制信息传送给交换结构。

38. 发明公开

EP1210622A4 INTEGRATED OPTICS BEAM DEFLECTORS 审中-公开
标题翻译：集成光束偏转装置
公开(公告)号：EP1210622A4
公开(公告)日：2008-03-19
申请号：EP00940728
申请日：2000-07-05
申请人： CHIARO NETWORKS LTD
发明人： SHEKEL EYAL , RAFAELI ELI , ARIEL YEDIDYA , MATMON GUY , MAJER DANIEL
IPC分类号： G02B6/30 , G02B6/36 , G02B6/42 , G02B6/00 , G02B6/32
CPC分类号： G02B6/4249 , G02B6/30 , G02B6/362 , G02B6/3636 , G02B6/3652 , G02B6/368 , G02B6/4204 , G02B6/4206 , G02B6/4236 , G02B6/4239 , G02B6/4246
摘要： This invention discloses an optical device including at least one first substrate defining a multiplicity of optical fiber positioning grooves (22), a multiplicity of optical fibers (20) fixed in each of said multiplicity of optical fiber (20) positioning grooves on the at least one first substrate (24), whereby the multiplicity of optical fibers (20) lie in an optical fiber plane and the ends of each of the multiplicity of optical fibers (20) lie substantially in a first predetermined arrangement in the optical fiber plane, a second substrate fixed onto the at least one first substrate such that an edge of the second substrate extends beyond the ends of each of the multiplicity of optical fibers (20), a lens assembly including a third substrate, and a lens fixed onto the third substrate, the lens assembly (40) being mounted onto the second substrate (42) such that the lens lies in a second predetermined arrangement with respect to the ends of each of the multiplicity of optical fibers, whereby the separation between the lens and the ends of each of the multiplicity of optical fibers is defined in a plane perpendicular to the optical fibers plane to a first degree of accuracy, less than the first degree of accuracy.

39. 发明公开

EP1294145A3 System and method for router keep-alive control 审中-公开
标题翻译：系统和方法“保活”路由器的控制
公开(公告)号：EP1294145A3
公开(公告)日：2005-04-13
申请号：EP02256444.7
申请日：2002-09-17
申请人： Chiaro Networks Ltd.
发明人： Watson, Thomas Lee , Gillam, David A. , Visser, Lance Arnold
IPC分类号： H04L12/56
CPC分类号： H04L69/16 , H04L69/162
摘要： The real-time aspects of keep-alive generation are removed from the dynamic routing protocol (DRP) application and are embedded within a Unix-based operating system, which is programmed by DRP. A keep-alive control provides the ability to create a keep-alive message and a timeout interval on a TCP socket. Each socket can have an independent keep-alive message and timeout interval. A keep-alive message is sent whenever the TCP socket sends no normal user output for a duration exceeding the timeout interval. A timeout interval is normally specified in seconds and a keep-alive message is user definable and must not exceed a predetermined length in bytes. System calls are used to set the timeout interval and keep-alive message independently. Both a timeout and a keep-alive message must be set before the timeout becomes active.

40. 发明公开

EP1202598A3 Timing and synchronization for an IP router using an optical switch 审中-公开
标题翻译：定时和同步用于与光开关的IP路由器
公开(公告)号：EP1202598A3
公开(公告)日：2005-01-19
申请号：EP01309177.2
申请日：2001-10-30
申请人： Chiaro Networks Ltd.
发明人： Brewer, Tony M. , Blackmon, Harry C. , Dozier, Harold W. , O'Leary, William D. , Walker, Dean E.
IPC分类号： H04Q11/00 , H04L12/56
CPC分类号： H04Q11/0005 , H04L49/101 , H04L49/254 , H04L49/30 , H04L49/552 , H04Q11/0066
摘要： Information and control are synchronized as they flow through a large distributed IP router system with independent clocks. The IP router includes multiple equipment racks and shelves, each containing multiple modules. The IP router is based on a passive switching device, which in some embodiments is an optical switch. Control and data come to the switching device from different sources, which have different clocks. Timing and synchronization control are provided, such that information and control both arrive at the switching device at the proper time. A single point in the system originates timing, which is then distributed through various ASICs of the system to deliver configuration control to the switch at the appropriate time. The launch of information to the switch is also controlled with a dynamic feedback loop from an optical switch controller. Control aspects of the optical switch are aligned by this same mechanism to deliver control and data to the optical switch simultaneously.

你已经成功收藏专利！

检索式保存成功!

IPRDB

热门服务

关于我们

友情链接

联系方式