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21. 发明授权

EP3163441B1 COMPUTER DEVICE AND MEMORY STARTING METHOD FOR COMPUTER DEVICE 有权
公开(公告)号：EP3163441B1
公开(公告)日：2018-09-19
申请号：EP14905730.9
申请日：2014-11-10
申请人： Huawei Technologies Co. Ltd.
发明人： HE, Jian , LI, Xiancai , NI, Xiaoke , YAO, Yimin
IPC分类号： G06F9/4401 , G06F11/22 , G06F11/27 , G11C29/08 , G11C29/14 , G11C29/04 , G11C29/12 , G11C7/20
CPC分类号： G06F9/4406 , G06F9/4401 , G06F9/4411 , G06F11/221 , G06F11/2247 , G06F11/27 , G11C7/20 , G11C29/08 , G11C29/12 , G11C29/14 , G11C2029/0407 , G11C2207/2254
摘要： The present invention provides a computer device and a memory startup method of a computer, to resolve a problem in the prior art that an excessively long time of memory initialization affects user experience. The present invention provides the computer device and the memory startup method of a computer, where a basic input/output system initializes only a first part of memory in a memory initialization phase after a computer is powered on and started, so that an operating system can be started, and after the operating system is started, the basic input/output system continues to initialize memory that is not initialized in the computer, so that, in a startup phase, the computer can start the operating system without needing to wait until all memory has been initialized; therefore, a time from being started to entering the operating system is reduced for the computer, and a user can quickly enter the operating system to perform an operation, thereby improving user experience.

22. 发明公开

EP3229040A1 OPTOELEKTRONISCHER SENSOR MIT EINEM MESSDATENSPEICHER UND SPEICHERTESTVERFAHREN 有权转让
标题翻译：带测量记忆的光电传感器和记忆测试方法
公开(公告)号：EP3229040A1
公开(公告)日：2017-10-11
申请号：EP17164787.8
申请日：2017-04-04
申请人： Sick AG
发明人： Schopp, Thomas
IPC分类号： G01S7/497 , G01S17/42 , G11C29/08 , G11C29/56
CPC分类号： G01S17/42 , G01S7/497 , G11C29/08 , G11C29/56008 , G11C29/56016
摘要： Es wird ein optoelektronischer Sensor (10) mit mindestens einem Messdatenspeicher (48) für Speicherung von Messdaten und mit einer Steuerung (36) angegeben, die für einen Funktionstest des Messdatenspeichers ausgebildet ist. Dabei ist die Steuerung (36, 52a) weiterhin dafür ausgebildet, für den Funktionstest periodisch Messdaten durch Testdaten zu ersetzen und dabei die Messdaten zu verwerfen.
摘要翻译：提供了具有用于存储测量数据的至少一个测量数据存储器（48）和控制器（36）的光电子传感器（10），其被设计用于测量数据存储器的功能测试。在这种情况下，控制器（36,52a）还被设计成周期性地用功能测试的测试数据代替测量数据，从而丢弃测量数据。

23. 发明公开

EP2738771A1 An apparatus and a method for memory testing by a programmable circuit in a safety critical system 审中-公开
标题翻译：装置和方法用于在安全关键系统中由可编程电路测试存储器
公开(公告)号：EP2738771A1
公开(公告)日：2014-06-04
申请号：EP12195266.7
申请日：2012-12-03
申请人： Kone Corporation
发明人： Staengler, Ferenc
IPC分类号： G11C29/08 , G06F11/22 , G06F11/30
CPC分类号： G06F11/27 , G11C29/08
摘要： The invention relates to a method and apparatus. In the method, a programmable random access memory testing circuit detects a signal to initiate testing of at least one random access memory circuit, the testing circuit being connected to a bus to which a processor and the at least one memory circuit is connected, the at least one memory circuit comprising at least a first memory block. The testing circuit determines that the bus is not reserved and reserves the bus. The testing circuit reads application data in a first memory block to a temporary memory of the testing circuit. The testing circuit executes marching test for the first memory block in a memory circuit. The testing circuit returns the application data back to the first memory block in the memory circuit. The testing circuit releases the bus. The testing circuit may again reserve the bus if the allocation of the bus is not necessary for other purposes than memory testing. Thereupon, the testing circuit may conduct a testing of the second memory block.
摘要翻译：本发明涉及的方法和装置。在该方法中，可编程随机存取存储器测试电路检测的信号以启动至少一个随机存取存储器电路的测试，所述测试电路被连接到至哪一个处理器和至少一个存储器电路连接的总线，所述至少一个存储器电路，其包括至少一个第一存储块。 bestimmt做了总线的测试电路不保留，并保留总线。所述测试电路在第一存储器块到测试电路的暂时存储器中读取的应用程序数据。所述测试电路用于执行在存储器电路中的第一存储器块行军测试。所述测试电路返回应用程序数据返回到存储电路中的第一存储器块。所述测试电路释放总线。测试电路可以再次保留总线如果总线的分配是没有必要的其它目的，而不是存储器的测试。有在，测试电路可进行第二存储器块的测试。

24. 发明授权

EP1624458B1 Adaptive algorithm for MRAM manufacturing 有权转让
标题翻译：的自适应算法用于制造MRAM
公开(公告)号：EP1624458B1
公开(公告)日：2013-04-24
申请号：EP05392005.4
申请日：2005-06-14
申请人： Headway Technologies, Inc. , Applied Spintronics Technology, Inc.
发明人： Yang, Hsu Kai , Shi, Xi Zeng , Wang, Po-Kang , Yang, Bruce
IPC分类号： G11C29/02 , G11C29/08 , G11C29/50 , G11C11/15
CPC分类号： G11C14/0081 , G11C11/1659 , G11C11/1675 , G11C29/02 , G11C29/08 , G11C29/50

25. 发明公开

EP2102869A4 CIRCUIT AND METHOD FOR TESTING MULTI-DEVICE SYSTEMS 审中-公开
标题翻译：电路及方法测试多个设备系统
公开(公告)号：EP2102869A4
公开(公告)日：2009-12-30
申请号：EP07845609
申请日：2007-11-29
申请人： MOSAID TECHNOLOGIES INC
发明人： PYEON HONG BEOM
IPC分类号： G11C29/08 , G06F11/00 , G06F11/22 , G11C29/00 , G11C29/32 , G11C29/40
CPC分类号： G11C29/32 , G11C29/003 , G11C29/40 , G11C2029/0409 , G11C2029/2602

26. 发明公开

EP1766632A4 SYSTEM AND METHOD FOR TESTING A DATA STORAGE DEVICE WITHOUT REVEALING MEMORY CONTENT 有权转让
标题翻译： SYSTEM UND VERFAHREN ZUMPRÜFENEINER DATENSPEICHEREINRICHTUNG OHNEENTHÜLLUNGVON SPEICHERINHALT
公开(公告)号：EP1766632A4
公开(公告)日：2007-07-25
申请号：EP05732025
申请日：2005-04-01
申请人： RESEARCH IN MOTION LTD
发明人： RANDELL JERROLD R
IPC分类号： G11C29/00 , G01R31/317 , G06F12/14 , G11C29/08
CPC分类号： G01R31/31719 , G11C16/04 , G11C29/08 , H04L9/0891 , H04L9/0894 , H04L2209/26 , H04L2209/80
摘要： A system and method for testing a data storage device without revealing memory content. To control the individual bits of the memory during testing each value is written into the memory according to the equation NEW_DATA = CURRENT_DATA XOR DATA_SEED such that individual bits of NEW_DATA are equal to CURRENT_DATA with selected bits inverted when the corresponding positions in DATA_SEED are high. NEW_DATA is written into the memory, read out and verified, so that all bit positions can be controlled and tested in both logic states, while NEW_DATA and CURRENT_DATA are not ascertainable by the testing software.
摘要翻译：一种测试数据存储设备而不暴露存储器内容的系统和方法。为了在测试期间控制存储器的各个位，根据等式NEW_DATA = CURRENT_DATA XOR DATA_SEED将每个值写入存储器，使得当DATA_SEED中的相应位置为高时，NEW_DATA的各个位等于CURRENT_DATA，选择的位反转。 NEW_DATA被写入存储器，读出并验证，以便可以在两种逻辑状态下控制和测试所有位的位置，而NEW_DATA和CURRENT_DATA不能由测试软件确定。

27. 发明公开

EP0206486A2 Memory test circuit. 失效
标题翻译：内存测试。
公开(公告)号：EP0206486A2
公开(公告)日：1986-12-30
申请号：EP86303512
申请日：1986-05-08
申请人： TOSHIBA KK
发明人： FURUYAMA TOHRU , OHSAWA TAKASHI
IPC分类号： G01R31/26 , G11C29/08 , G11C29/26 , G11C29/34 , G11C29/38 , G11C29/00
CPC分类号： G11C29/34 , G11C29/08 , G11C29/26 , G11C29/38
摘要： A memory test circuit is described. The memory test circuit comprises means (12, 13) for simultaneously writing identical test data into several memory cells (14), means (13) for simultaneously reading the test data written into the memory cells, means (16) for obtaining a first logical operation of the test data read from the memory cells, means (17) for obtaining a second logical operation of the test data read from the memory cells, and means (18,19, SW1, SW2) for inspecting whether or not the memory cells into which the test data is written operate correctly is carried out on the basis of the first logical operation and second logical operation of the test data read from the memory cells.

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