专利快速检索-快速检索全球专利，免费商用专利数据库-IPRDB

11. 发明公开

EP0048536A3 Sintered body of lead titanate and method of manufacturing same 失效
标题翻译：烧结钛酸铅体及其制造方法
公开(公告)号：EP0048536A3
公开(公告)日：1982-10-20
申请号：EP81302105
申请日：1981-05-12
申请人： Matsushita Electric Industrial Co., Ltd.
发明人： Inada, Masanori , Horibe, Yasutaka
IPC分类号： H01L21/477 , H01L41/18 , H01L41/22 , H01B03/00
CPC分类号： C04B35/472 , C01G23/003 , C01P2002/34 , C01P2002/77 , C01P2004/10 , C01P2004/20 , C01P2004/61 , C01P2004/62 , H01L41/187
摘要： Powders of lead titanate consisting of acicular, plate-like crystalline particles of tetragonal lead titanate which are elongated in the direction of the a-axis are manufactured from acicular particles of tetragonal titanium dioxide of anatase type or from titanium dioxide hydrate particles which are mixed with powders of lead oxide or lead-containing compounds and the resulting mixture is fired. Alternatively, potassium titanate fibers of the general formula K 2 0. nTiO 2 may be used in place of the titanium compounds. Grain oriented sintered bodies of lead titanate can be manufactured from said powders.
摘要翻译：由a型轴向拉长的四方钛酸铅的针状，板状结晶性颗粒构成的钛酸铅粉末由锐钛矿型四方钛酸二氧化钛或与二氧化钛水合物颗粒混合的针状粒子将氧化铅或含铅化合物的粉末和所得混合物烧制。或者，通式K 2 O的钛酸钾纤维。可以使用nTiO 2代替钛化合物。可以由所述粉末制造钛酸铅晶粒取向的烧结体。

12. 发明公开

EP0048536A2 Sintered body of lead titanate and method of manufacturing same 失效
标题翻译： GesinterterKörperaus Bleititanat和Verfahren zu dessen Herstellung。
公开(公告)号：EP0048536A2
公开(公告)日：1982-03-31
申请号：EP81302105.2
申请日：1981-05-12
申请人： MATSUSHITA ELECTRIC INDUSTRIAL CO., LTD.
发明人： Inada, Masanori , Horibe, Yasutaka
IPC分类号： H01L21/477 , H01L41/18 , H01L41/22 , H01B3/00
CPC分类号： C04B35/472 , C01G23/003 , C01P2002/34 , C01P2002/77 , C01P2004/10 , C01P2004/20 , C01P2004/61 , C01P2004/62 , H01L41/187
摘要： Powders of lead titanate consisting of acicular, plate-like crystalline particles of tetragonal lead titanate which are elongated in the direction of the a-axis are manufactured from acicular particles of tetragonal titanium dioxide of anatase type or from titanium dioxide hydrate particles which are mixed with powders of lead oxide or lead-containing compounds and the resulting mixture is fired. Alternatively, potassium titanate fibers of the general formula K 2 0. nTiO 2 may be used in place of the titanium compounds. Grain oriented sintered bodies of lead titanate can be manufactured from said powders.
摘要翻译：由a型轴向拉长的四方钛酸铅的针状，板状结晶性颗粒构成的钛酸铅粉末由锐钛矿型四方钛酸二氧化钛或与二氧化钛水合物颗粒混合的针状粒子将氧化铅或含铅化合物的粉末和所得混合物烧制。或者，通式K 2 O的钛酸钾纤维。可以使用nTiO 2代替钛化合物。可以由所述粉末制造钛酸铅晶粒取向的烧结体。

13. 发明授权

EP0300803B1 High-frequency bipolar transistor and its fabrication method 失效
标题翻译：高频双极型晶体管及其制造方法。
公开(公告)号：EP0300803B1
公开(公告)日：1994-06-22
申请号：EP88306729.0
申请日：1988-07-22
申请人： MATSUSHITA ELECTRIC INDUSTRIAL CO., LTD.
发明人： Ota, Yorito , Inada, Masanori , Yanagihara, Manabu
IPC分类号： H01L29/06 , H01L29/73
CPC分类号： H01L29/66318 , H01L29/1004 , H01L29/7371 , Y10S148/01 , Y10S148/072

14. 发明授权

EP0240307B1 Bipolar transistor and method of producing the same 失效
标题翻译：一种双极型晶体管及其制造方法。
公开(公告)号：EP0240307B1
公开(公告)日：1993-12-22
申请号：EP87302784.1
申请日：1987-03-31
申请人： MATSUSHITA ELECTRIC INDUSTRIAL CO., LTD.
发明人： Inada, Masanori , Eda, Kazuo , Ota, Yorito , Nakagawa, Atsushi , Yanagihara, Manabu
IPC分类号： H01L29/08 , H01L29/73
CPC分类号： H01L29/66318 , H01L29/0804 , H01L29/41708 , H01L29/7371 , Y10S148/01 , Y10S148/072

15. 发明公开

EP0387010A2 Hetero-junction bipolar transistor 失效
标题翻译：双极晶体管mitHeteroübergang。
公开(公告)号：EP0387010A2
公开(公告)日：1990-09-12
申请号：EP90302391.9
申请日：1990-03-06
申请人： MATSUSHITA ELECTRIC INDUSTRIAL CO., LTD.
发明人： Inada, Masanori , Ryoji, Akira
IPC分类号： H01L29/73 , H01L29/62
CPC分类号： H01L29/66318 , H01L21/28 , H01L29/7371
摘要： An object of the present invention is to suppress the surface recombination over the whole area of the external base of a hetero-junction bipolar transistor (HBT), to keep the current gain large, and to reduce the base contact resistance. The HBT of the invention has, as a surface protective film layer, a p-type semiconductor layer which has the higher portential of the energy conduction band than the base layer on an external base outside the junction between the mesa of the n-type emitter layer and the p-type base layer, and a base electrode thereon. Preferably, it has as a base contact layer a p-type semiconductor layer which shows reduced contact resistance with the base electrode on the surface protective layer comprising a p-type semiconductor layer. More preferabiy, it has a structure wherein a base electrode is formed on the base contact layer in contact with the projection part of the emitter electrode to the base contact layers A method of producing this HBT comprises at least the steps of forming an emitter mask on the portion to be an emitter on a multi-layer structure material having an n-type semiconductor layer for forming a collector, a p-type semiconductor layer or forming a base, and an n-type semiconductor layer for forming an emitter in this order from the substrate, and etching by using the emitter mask to form an emitter mesa and to expose a base layer; epitaxially forming as a surface protective film layer a p-type semiconductor layer which show the higher potential of the energy conduction band than the base layer on the external base outside the junction part between the emitter mesa and the base layer by using the emitter mask; and epitaxially forming a base electrode on the p-type surface protective film layer.
摘要翻译：本发明的目的是抑制异质结双极晶体管（HBT）的外部基极的整个区域的表面复合，以保持电流增益较大，并降低基极接触电阻。本发明的HBT具有作为表面保护膜层的p型半导体层，该p型半导体层在n型发射极的台面之间的结外部的外部基底上具有比基底层更高的能量导带的突出率层和p型基层，以及基极。优选地，其具有作为基极接触层的p型半导体层，其在包括p型半导体层的表面保护层上显示出与基底电极的接触电阻降低。更优选地，其具有这样的结构，其中在与基极接触层的发射极的突出部分接触的基底接触层上形成基极。制造该HBT的方法至少包括以下步骤：在在具有用于形成集电体的n型半导体层，p型半导体层或形成基极的多层结构材料上的发射极部分和用于以此顺序形成发射极的n型半导体层并且通过使用发射极掩模进行蚀刻以形成发射极台面并露出基底层; 通过使用发射体掩模，在发射极台面和基底层外部的外部基底外表面上形成表现出保护膜层的p型半导体层，该p型半导体层表现出比基底层更高的能量导电电位; 并在p型表面保护膜层上外延形成基极。

16. 发明公开

EP0240307A3 Bipolar transistor and method of producing the same 失效
标题翻译：双极晶体管及其制造方法
公开(公告)号：EP0240307A3
公开(公告)日：1989-12-27
申请号：EP87302784.1
申请日：1987-03-31
申请人： MATSUSHITA ELECTRIC INDUSTRIAL CO., LTD.
发明人： Inada, Masanori , Eda, Kazuo , Ota, Yorito , Nakagawa, Atsushi , Yanagihara, Manabu
IPC分类号： H01L29/08 , H01L29/73
CPC分类号： H01L29/66318 , H01L29/0804 , H01L29/41708 , H01L29/7371 , Y10S148/01 , Y10S148/072
摘要： A dummy emitter (a dummy collector, in inverted type) is formed in the portion corresponding to an emitter (a collector, in inverted type) region, on a multiplayer structural material comprising layers for forming emitter, base and collector, and using it as mask, an external base region is exposed by etching, and a projection of emitter (collector, in inverted type) region is formed, while the dummy emitter (the dummy collector, in inverted type) is inverted into an emitter (a collector, in inverted type) electrode, thereby forming an emitter (a collector, in inverted type) electrode metal layer to cover the whole upper surface of the emitter (the collector, in inverted type). Using thus formed emitter (collector, in inverted type) electrode metal layer, a base electrode metal layer is formed, by self-alignment, adjacently to the emitter (the collector, in inverted type). In other method, on a multilayer structural material, impurities are introduced outside the portion corresponding to the base region of a bipolar transistor in order to insulate, at least, the layer to form the emitter, the layer to form the base, or at most, these layers and the layer to form the collector, and an extension type dummy emitter (dummy collector, in inverted type) extending from the emitter (collector, in inverted type) portion to the insulating region formed by transforming from the semiconductor material to form the emitter (the collector, in inverted type), and using it as mask, the external base region is exposed to form a projection coupling the emitter region and insulating region, and the dummy emitter (the dummy collector, in inverted type) is inverted to transform into an emitter (a collector, in inverted type) electrode metal layer to cover the whole upper surface of the projection.

17. 发明公开

EP0214802A3 Semiconductor device having an abrupt junction and method of manufacturing same using epitaxy 失效
标题翻译：具有破裂连接的半导体器件及其使用外延制造的方法
公开(公告)号：EP0214802A3
公开(公告)日：1987-09-02
申请号：EP86306552
申请日：1986-08-22
申请人： Matsushita Electric Industrial Co., Ltd.
发明人： Inada, Masanori , Eda, Kazuo , Ota, Yorito
IPC分类号： H01L29/36 , H01L29/72 , H01L21/205
CPC分类号： H01L29/36 , H01L29/7371 , Y10S148/01 , Y10S148/072
摘要： A semiconductor device of a multilayer structure com. prising semiconductor materials of different properties manufactured by using at least a step of epitaxially forming a semi- conductor material layer on a substrate and a passivation film layer thereover, a step of introducing impurities into specific portions of the epitaxially formed semiconductor material layer and a step of removing the passivation film layer formed directly above the epitaxially formed semiconductor material layer within an epitaxy device and then applying epitaxial growing. Impurities introduced additionally to specific portions of the layer inside are eliminated substantially abruptly at the boundary in adjacent with the layer above the region introduced with impurities and the properties of semiconductors vary substantially abruptly at the boundary between the layer. introduced with the Impurities and the layer thereabove. The material for the passivation film layer for use with the manufacturing step comprises a passivation film material that can be epitaxially formed and easily removed at a temperature and in a atmosphere under which the epitaxially formed layer below the passivation film are not decomposed or evaporized, particularly, passivation film material composed of a multilayer structure formed by epitaxially forming, on the above-mentioned passivation film material, that can be selectively removed easily out of as epitaxy device.

18. 发明公开

EP0214802A2 Semiconductor device having an abrupt junction and method of manufacturing same using epitaxy 失效
标题翻译：与通过外延突然过渡和方法，用于其制造的半导体器件。
公开(公告)号：EP0214802A2
公开(公告)日：1987-03-18
申请号：EP86306552.0
申请日：1986-08-22
申请人： MATSUSHITA ELECTRIC INDUSTRIAL CO., LTD.
发明人： Inada, Masanori , Eda, Kazuo , Ota, Yorito
IPC分类号： H01L29/36 , H01L29/72 , H01L21/205
CPC分类号： H01L29/36 , H01L29/7371 , Y10S148/01 , Y10S148/072
摘要： A semiconductor device of a multilayer structure com. prising semiconductor materials of different properties manufactured by using at least a step of epitaxially forming a semi- conductor material layer on a substrate and a passivation film layer thereover, a step of introducing impurities into specific portions of the epitaxially formed semiconductor material layer and a step of removing the passivation film layer formed directly above the epitaxially formed semiconductor material layer within an epitaxy device and then applying epitaxial growing. Impurities introduced additionally to specific portions of the layer inside are eliminated substantially abruptly at the boundary in adjacent with the layer above the region introduced with impurities and the properties of semiconductors vary substantially abruptly at the boundary between the layer. introduced with the Impurities and the layer thereabove. The material for the passivation film layer for use with the manufacturing step comprises a passivation film material that can be epitaxially formed and easily removed at a temperature and in a atmosphere under which the epitaxially formed layer below the passivation film are not decomposed or evaporized, particularly, passivation film material composed of a multilayer structure formed by epitaxially forming, on the above-mentioned passivation film material, that can be selectively removed easily out of as epitaxy device.

你已经成功收藏专利！

检索式保存成功!

IPRDB

热门服务

关于我们

友情链接

联系方式