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91. 发明公开

EP1113497A3 Semiconductor package with conductor impedance selected during assembly 审中-公开
标题翻译：半导体封装，其中，所述电路阻抗可以在组装过程中选择
公开(公告)号：EP1113497A3
公开(公告)日：2006-01-25
申请号：EP00127906.6
申请日：2000-12-20
申请人： TEXAS INSTRUMENTS INCORPORATED
发明人： Lamson, Michael A. , Yue, Heping
IPC分类号： H01L23/66 , H01L23/64 , H01L23/528 , H01L23/522
CPC分类号： H01L23/66 , H01L23/49816 , H01L23/5222 , H01L23/5286 , H01L23/64 , H01L24/48 , H01L24/49 , H01L2223/6627 , H01L2224/05554 , H01L2224/16 , H01L2224/48091 , H01L2224/48227 , H01L2224/49175 , H01L2224/49433 , H01L2924/00014 , H01L2924/01004 , H01L2924/01005 , H01L2924/01006 , H01L2924/01013 , H01L2924/01029 , H01L2924/01074 , H01L2924/014 , H01L2924/10161 , H01L2924/14 , H01L2924/1903 , H01L2924/19107 , H01L2924/30105 , H01L2924/30107 , H01L2924/3011 , H01L2924/30111 , H01L2924/00 , H01L2224/45099 , H01L2224/05599
摘要： A semiconductor package having a plurality of conductors arrayed in two (or more) parallel planes, and an available ground conductor. Conductors in the auxiliary or second plane substantially overlay the primary signal conductors in the first plane, and the impedance of any lead or lead pair is arbitrarily set at the assembly process by connecting the auxiliary conductors to ground or by leaving them floating. Differential pairs of signal conductors, either odd or even mode are set by connecting the auxiliary conductors to a ground contact.
摘要翻译：具有两个（或多个）平行的平面排列的导体的多个半导体封装，并且可用的接地导体的。在辅助或第二平面覆盖导体平面基本上在所述第一主信号导体，和任何铅或铅对的阻抗是任意由连接辅助导体接地或通过使他们浮动设定在组装过程。信号导体，无论是奇数还是偶数模式的差分对通过辅助导体连接到接地触头设置。

92. 发明公开

EP1376747A3 Common mode rejection in differential pairs using slotted ground planes 审中-公开
标题翻译： Gleichtaktunterdrückungbei differentiellen Leitungen durch Schlitze in derMassefläche
公开(公告)号：EP1376747A3
公开(公告)日：2005-07-20
申请号：EP03101915.1
申请日：2003-06-26
申请人： Texas Instruments Incorporated
发明人： Howard, Gregory , Swanson, Leland S.
IPC分类号： H01P3/08 , H05K1/02
CPC分类号： H01P3/081 , H01L2224/48472 , H01L2224/49175 , H01L2924/30107 , H01L2924/3011 , H01L2924/30111 , H05K1/0245 , H05K1/0253 , H05K2201/09272 , H01L2924/00
摘要： In high-speed semiconductor packaging, differential pair transmission lines 605 are used to receive incoming signals carried using differential signaling. Common mode noise can decrease the frequency at which these signals are clocked. The use of slots 620 formed in the ground (or power plane) 609 of the substrate and lying perpendicularly (and equally spaced) underneath the differential pair 605 improves the common mode rejection of the differential pair 605 by increasing the common mode impedance without affecting the differential mode impedance. The use of slots 620 does not require modifications to the packaging, and only minor modifications to the substrate.
摘要翻译：在高速半导体封装中，使用差分对传输线605来接收使用差分信号传送的输入信号。共模噪声可以降低这些信号频率的频率。使用形成在基板的接地（或电源平面）609中并且位于差分对605之下的垂直（并且等间隔）的槽620，通过增加共模阻抗来改善差分对605的共模抑制，而不会影响差分模式阻抗。槽620的使用不需要对包装进行修改，并且仅对基材进行微小的修改。

93. 发明公开

EP1548536A1 Metal-oxide-semiconductor device having integrated bias circuit 有权
标题翻译： Metalloxyd-Halbleiteranordnung mit integrierter Vorspannungsschaltung
公开(公告)号：EP1548536A1
公开(公告)日：2005-06-29
申请号：EP04256760.2
申请日：2004-11-02
申请人： Agere Systems Inc.
发明人： Lopez, Osvaldo , Lott, Joel Morrison
IPC分类号： G05F3/20
CPC分类号： H03F3/195 , G05F3/205 , H01L2224/49175 , H01L2924/1305 , H01L2924/13091 , H01L2924/30107 , H01L2924/3011 , H01L2924/30111 , H03F1/301 , H03F2200/18 , H01L2924/00
摘要： An IC device includes an MOS device having a gate terminal, a source terminal and a drain terminal, the gate terminal being operatively coupled to an input of the IC device, the drain terminal being operatively coupled to an output of the IC device, and the source terminal being coupled to a negative voltage supply. The IC device further includes a bias generator operatively coupled to the gate terminal of the MOS device, the bias generator generating a bias voltage and/or a bias current for biasing the MOS device at a substantially constant quiescent operating point. The bias generator is configured such that the bias voltage and/or bias current varies as a function of a junction temperature of the MOS device. In this manner, the bias generator accurately tracks one or more operating conditions of the MOS device, thereby improving the performance of the device.
摘要翻译： IC器件包括具有栅极端子，源极端子和漏极端子的MOS器件，栅极端子可操作地耦合到IC器件的输入，漏极端子可操作地耦合到IC器件的输出，源极端子耦合到负电压源。 IC器件还包括可操作地耦合到MOS器件的栅极端子的偏置发生器，偏置发生器产生偏置电压和/或偏置电流，用于在基本上恒定的静态工作点上偏置MOS器件。偏置发生器被配置为使得偏置电压和/或偏置电流作为MOS器件的结温的函数而变化。以这种方式，偏置发生器精确地跟踪MOS器件的一个或多个工作条件，从而提高器件的性能。

94. 发明公开

EP1388170A2 BOND WIRE TUNING OF RF POWER TRANSISTORS AND AMPLIFIERS 审中-公开
标题翻译： BONDDRAHTSABSTIMMUNG VON RF LEISTUNGSTRANSISTOREN UND RFLEISTUNGSVERSTÄRKERN
公开(公告)号：EP1388170A2
公开(公告)日：2004-02-11
申请号：EP02721613.4
申请日：2002-03-19
申请人： Infineon Technologies AG
发明人： LEIGHTON, Larry , PERUGUPALLI, Prasanth , DIXIT, Nagaraj, V. , MOLLER, Tom
IPC分类号： H01L23/64 , H01L23/66 , H01L21/66
CPC分类号： H03F1/565 , H01L23/64 , H01L24/48 , H01L24/49 , H01L2223/6644 , H01L2224/48091 , H01L2224/48137 , H01L2224/49111 , H01L2224/49175 , H01L2924/00014 , H01L2924/01014 , H01L2924/01079 , H01L2924/01083 , H01L2924/01322 , H01L2924/10253 , H01L2924/12042 , H01L2924/19041 , H01L2924/19042 , H01L2924/19105 , H01L2924/30105 , H01L2924/30107 , H01L2924/3011 , H01L2924/30111 , H03F3/191 , H01L2924/00 , H01L2224/45099 , H01L2224/05599
摘要： A method for manufacturing a power transistor circuit includes securing a die to a substrate, the die comprising a transistor having an input terminal and an output terminal. One or more performance characteristics of the transistor are measured. Using one or more wire sets, the transistor input terminal is electrically connected to one or more input matching elements and an input signal lead. The impedance of the one or more wire sets, (as determined by selecting a desired number and/or length of the wires in each set, is selected based at least in part on the measured transistor performance characteristic(s). Similarly, using one or more additional wire sets, the transistor output terminal is electrically connected to one or more output matching elements and an output signal lead, wherein the impedance of the additional wire sets is selected based at least in part on the measured transistor performance characteristic(s).
摘要翻译：一种用于制造功率晶体管电路的方法，包括将晶片固定到衬底，所述管芯包括具有输入端和输出端的晶体管。测量晶体管的一个或多个性能特性。使用一个或多个导线组，晶体管输入端子电连接到一个或多个输入匹配元件和输入信号引线。至少部分地基于测量的晶体管性能特征来选择通过选择每组中的导线的期望数量和/或长度来确定的一个或多个导线组的阻抗。类似地，使用一个或多个额外的线组，晶体管输出端子电连接到一个或多个输出匹配元件和输出信号引线，其中附加导线组的阻抗至少部分地基于测量的晶体管性能来选择特性（一个或多个）。

95. 发明公开

EP1316996A2 Semiconductor device 审中-公开
标题翻译： Halbleiteranordnung
公开(公告)号：EP1316996A2
公开(公告)日：2003-06-04
申请号：EP02253491.1
申请日：2002-05-17
申请人： FUJITSU LIMITED
发明人： Mihara, Takayuki, Kyushu Fujitsu Electronics Ltd. , Akasaki, Yuji, c/o Kyushu Fujitsu Electronics Ltd.
IPC分类号： H01L23/31
CPC分类号： H01L23/3107 , H01L23/49541 , H01L23/66 , H01L24/48 , H01L24/49 , H01L2224/05554 , H01L2224/05599 , H01L2224/45099 , H01L2224/48091 , H01L2224/48247 , H01L2224/48253 , H01L2224/49113 , H01L2224/49171 , H01L2224/49433 , H01L2224/85399 , H01L2924/00014 , H01L2924/01057 , H01L2924/181 , H01L2924/3011 , H01L2924/30111 , H01L2924/3025 , H01L2924/00 , H01L2924/00012 , H01L2224/45015 , H01L2924/207
摘要： The present invention relates to a semiconductor device comprising a semiconductor chip (1), a signal lead (3) connected to a signal electrode (1a) of the semiconductor chip (1), an external signal electrode (4) connected with the signal lead (3), a ground lead (6) extending along the signal lead (3), and a sealing resin sealing these elements. The external signal electrode (4) is formed as a protruding electrode protruding from an undersurface of the sealing resin. One surface of the signal lead (3) is exposed on the undersurface of the sealing resin.
摘要翻译：本发明涉及一种半导体器件，包括半导体芯片（1），连接到半导体芯片（1）的信号电极（1a）的信号引线（3），与信号引线（4）连接的外部信号电极（3），沿着信号引线（3）延伸的接地引线（6）和密封这些元件的密封树脂。外部信号电极（4）形成为从密封树脂的下表面突出的突出电极。信号引线（3）的一个表面暴露在密封树脂的下表面上。

96. 发明公开

EP1267400A2 Composite material member for semiconductor device and insulated and non-insulated semiconductor devices using this composite material member 审中-公开
标题翻译：半导体和绝缘和非绝缘的半导体器件因而复合部件
公开(公告)号：EP1267400A2
公开(公告)日：2002-12-18
申请号：EP02006688.2
申请日：2002-03-27
申请人： Hitachi, Ltd. , Hitachi Cable, Ltd.
发明人： Kurihara, Yasutoshi, Hitachi, Ltd., Int. Prop. Gp. , Kondo, Yasuo, Hitachi, Ltd., Int. Prop. Gp. , Ueno, Takumi, Hitachi, Ltd., Int. Prop. Gp. , Morita, Toshiaki, Hitachi, Ltd., Int. Prop. Gp. , Koyama, Kenji, Hitachi, Ltd., Int. Prop. Gp. , Suzumura, Takashi, Hitachi Cable Ltd., , Nakagawa, Kazuhiko, Hitachi Cable Ltd., , Fukuda, Kunihiro, Hitachi Cable Ltd.,
IPC分类号： H01L23/373
CPC分类号： H01L23/142 , H01L23/3736 , H01L24/73 , H01L2224/32225 , H01L2224/32245 , H01L2224/45124 , H01L2224/45144 , H01L2224/48091 , H01L2224/48227 , H01L2224/48247 , H01L2224/48472 , H01L2224/49109 , H01L2224/49111 , H01L2224/49175 , H01L2224/73265 , H01L2924/01327 , H01L2924/09701 , H01L2924/10253 , H01L2924/1301 , H01L2924/13055 , H01L2924/13091 , H01L2924/14 , H01L2924/15322 , H01L2924/16195 , H01L2924/181 , H01L2924/19107 , H01L2924/3011 , H01L2924/30111 , H01L2924/3025 , H05K1/05 , Y10T428/12083 , Y10T428/12535 , Y10T428/12611 , Y10T428/12889 , Y10T428/12903 , Y10T428/1291 , Y10T428/25 , H01L2924/00 , H01L2924/00012 , H01L2924/00014
摘要： To provide a composite material member (125') for semiconductor device, an insulated semiconductor device and non-insulated semiconductor device using the composite material member, which are effective for obtaining a semiconductor device that alleviates thermal stress or thermal strain occurring during production or operation has no possibilities of deformation, degeneration and rupture of each member, and is highly reliably and inexpensive. The composite material member for semiconductor device is characterized by being a composite metal plate with particles composed of cuprous oxide (125B) dispersed in a copper matrix (125A), in which a surface of the composite metal plate is covered with a metal layer (125C), and a copper layer (125D) with thickness of 0.5 µm or larger exists in an interface formed by the composite metal plate and the metal layer.
摘要翻译：是提供一种用于半导体器件的复合材料构件（125“），使用该复合材料构件，其是有效的，用于获得的半导体器件做绝缘半导体器件和非绝缘型半导体器件减轻热应力或热应变的生产或操作期间发生的具有不变形，变性和各部件的破裂的可能性，并且是高度可靠和廉价的。用于半导体器件的复合材料构件由是一种复合的金属板与分散于铜基质（125A）氧化亚铜（125B）构成的粒子为特征的，（其中，所述复合金属板的表面覆盖有金属层125C ），和铜层（125D），用0.5微米的厚度或更大的在由复合金属板和金属层形成的界面存在英寸

97. 发明公开

EP1245046A1 INTERCONNECTION DEVICE AND METHOD 审中-公开
标题翻译：连接装置及方法
公开(公告)号：EP1245046A1
公开(公告)日：2002-10-02
申请号：EP00986661.7
申请日：2000-12-20
申请人： Hei, Inc.
发明人： HUANG, Guanghua , CHANDLER, Parker
IPC分类号： H01L23/66
CPC分类号： H01L23/66 , H01L24/48 , H01L24/49 , H01L2224/05599 , H01L2224/32225 , H01L2224/45014 , H01L2224/48091 , H01L2224/48227 , H01L2224/48465 , H01L2224/49175 , H01L2224/73265 , H01L2224/85399 , H01L2924/00014 , H01L2924/01027 , H01L2924/01029 , H01L2924/01033 , H01L2924/01039 , H01L2924/01082 , H01L2924/014 , H01L2924/14 , H01L2924/1423 , H01L2924/15313 , H01L2924/15787 , H01L2924/19041 , H01L2924/30105 , H01L2924/30107 , H01L2924/3011 , H01L2924/30111 , H01L2924/00 , H01L2924/00012 , H01L2224/45099 , H01L2224/45015 , H01L2924/207
摘要： An RF microcircuit package and interconnection device is disclosed which minimizes impedance mismatch between circuit elements. Multiple signal vie and close proximity ground vies as well as tuned wire bonds are disclosed.

98. 发明公开

EP1036849A3 Metal matrix composite material, process for its production and use 有权
标题翻译：金属基复合材料，其制备方法及其应用过程
公开(公告)号：EP1036849A3
公开(公告)日：2002-09-25
申请号：EP00104647.3
申请日：2000-03-03
申请人： Hitachi, Ltd.
发明人： Okamoto, Kazutaka, c/o Hitachi Ltd. , Kondo, Yasuo, c/o Hitachi Ltd. , Abe, Teruyoshi, c/o Hitachi Ltd. , Aono, Yasuhisa, c/o Hitachi Ltd. , Kaneda, Junya, c/o Hitachi Ltd. , Saito, Ryuichi, c/o Hitachi Ltd. , Koike, Yoshihiko, c/o Hitachi Ltd.
IPC分类号： C22C1/10 , H01L29/00
CPC分类号： H01L24/32 , C22C1/1036 , C22C32/0021 , C22C32/0036 , H01L23/142 , H01L23/3735 , H01L23/4334 , H01L24/29 , H01L24/45 , H01L24/48 , H01L24/49 , H01L24/73 , H01L25/072 , H01L2224/0603 , H01L2224/291 , H01L2224/29111 , H01L2224/2919 , H01L2224/32225 , H01L2224/45124 , H01L2224/45144 , H01L2224/48091 , H01L2224/48227 , H01L2224/48247 , H01L2224/48472 , H01L2224/49109 , H01L2224/49111 , H01L2224/49113 , H01L2224/73265 , H01L2224/83455 , H01L2224/83805 , H01L2924/01005 , H01L2924/01006 , H01L2924/01013 , H01L2924/01018 , H01L2924/01019 , H01L2924/01023 , H01L2924/01029 , H01L2924/01033 , H01L2924/01042 , H01L2924/01047 , H01L2924/0105 , H01L2924/01074 , H01L2924/01078 , H01L2924/01079 , H01L2924/01082 , H01L2924/0132 , H01L2924/01322 , H01L2924/0133 , H01L2924/10329 , H01L2924/12042 , H01L2924/1301 , H01L2924/1305 , H01L2924/13055 , H01L2924/13091 , H01L2924/14 , H01L2924/15153 , H01L2924/1517 , H01L2924/1532 , H01L2924/15787 , H01L2924/16195 , H01L2924/181 , H01L2924/3011 , H01L2924/30111 , H01L2924/3511 , H01L2924/00014 , H01L2924/01014 , H01L2924/00 , H01L2924/01028 , H01L2924/00012 , H01L2924/3512 , H01L2924/0695 , H01L2924/014
摘要： Provided are a composite material excellent in plastic workability, a method of producing the composite material, a heat-radiating board of a semiconductor equipment, and a semiconductor equipment to which this heat-radiating board is applied. This composite material comprises a metal and an inorganic compound formed to have a dendritic shape or a bar shape. In particular, this composite material is a copper composite material, which comprises 10 to 55 vol.% cuprous oxide (Cu 2 O) and the balance of copper (Cu) and incidental impurities and has a coefficient of thermal expansion in a temperature range from a room temperature to 300°C of from 5 × 10 -6 to 17 × 10 -6 /°C and a thermal conductivity of 100 to 380 W/m · k. This composite material can be produced by a process comprising the steps of melting, casting and working and is applied to a heat-radiating board of a semiconductor article.

99. 发明公开

EP1238429A1 POWER TRANSISTOR MODULE, POWER AMPLIFIER AND METHOD IN THE FABRICATION THEREOF 审中-公开
标题翻译：功率晶体管模块，功率放大器及其制造方法
公开(公告)号：EP1238429A1
公开(公告)日：2002-09-11
申请号：EP00989082.3
申请日：2000-12-12
申请人： TELEFONAKTIEBOLAGET LM ERICSSON
发明人： OLOFSSON, Lars-Anders , AHL, Bengt
IPC分类号： H01L23/522 , H01L21/768
CPC分类号： H01L23/66 , H01L23/4824 , H01L24/48 , H01L24/49 , H01L2223/6644 , H01L2224/05599 , H01L2224/48091 , H01L2224/48137 , H01L2224/49175 , H01L2224/85399 , H01L2924/00014 , H01L2924/01004 , H01L2924/01079 , H01L2924/07802 , H01L2924/12042 , H01L2924/13055 , H01L2924/15151 , H01L2924/16152 , H01L2924/19041 , H01L2924/30107 , H01L2924/3011 , H01L2924/30111 , H01L2924/00 , H01L2224/45015 , H01L2924/207 , H01L2224/45099
摘要： The present invention relates to a power transistor module (101, 301, 401, 501) for radio frequency appli-cations, particularly for use in an amplifier stage in a radio base station or in a ground transmitter for TV or radio, wherein said power transistor module compri-ses a support plate (107, 115, 307, 407), a power transistor chip (109, 609, 709) arranged thereon, outer electrical connections (131, 133, 533) projecting from the module for external connection and inner electrical connections connected between said transistor chip and said outer connections, at least one of said inner electrical connections comprising a first conductor pattern (128, 228, 628, 728) arranged on a flexible foil (120, 520). The invention further comprises a power amplifier comprising said module, a method in the fabrication of said module, a method in the fabrication of a power amplifier, where said module is electrically connected to a circuit board (105) mounted at a heat sink (103) and to be mounted at said heat sink, and finally to a power amplifier manufactured according to the method.
摘要翻译：用于射频应用的功率晶体管模块技术领域本发明涉及一种用于射频应用的功率晶体管模块（101,301,401,501），特别是用于无线电基站或用于电视或无线电的地面发射机中的放大器级中，其中所述功率晶体管模块包括支撑板（107,115,307,407），布置在其上的功率晶体管芯片（109,609,709），从外部连接的模块突出的外部电连接（131,133,533）和在所述晶体管芯片和所述外部连接之间连接的内部电连接，所述内部电连接中的至少一个包括布置在柔性箔（120,520）上的第一导体图案（128,228,628,728）。本发明还包括一个包括所述模块的功率放大器，一种制造所述模块的方法，一种制造功率放大器的方法，其中所述模块电连接到安装在散热器（103）上的电路板（105））并且被安装在所述散热器处，并且最终被安装到根据该方法制造的功率放大器。

100. 发明公开

EP1082777A4 WIDEBAND RF PORT STRUCTURE USING COPLANAR WAVEGUIDE AND BGA I/O 审中-公开
标题翻译：宽带射频栅极结构KAPLANARWELLENLEITER具有和BGA ON / OUTPUT
公开(公告)号：EP1082777A4
公开(公告)日：2002-09-04
申请号：EP99921919
申请日：1999-05-13
申请人： MICROSUBSTRATES CORP
发明人： DOURIET DANIEL F
IPC分类号： H01L23/12 , H01L23/498 , H01L23/66 , H01P1/04 , H01P3/02 , H01P5/02 , H01P5/08 , H05K1/02 , H05K3/34 , H01P5/00
CPC分类号： H01L23/66 , H01L23/49805 , H01L24/48 , H01L24/49 , H01L24/73 , H01L2223/6616 , H01L2223/6627 , H01L2224/16225 , H01L2224/32225 , H01L2224/48091 , H01L2224/48227 , H01L2224/48465 , H01L2224/49171 , H01L2224/49175 , H01L2224/73265 , H01L2224/854 , H01L2924/00014 , H01L2924/01039 , H01L2924/01057 , H01L2924/01067 , H01L2924/01078 , H01L2924/01079 , H01L2924/12042 , H01L2924/14 , H01L2924/1423 , H01L2924/15173 , H01L2924/15174 , H01L2924/15311 , H01L2924/1903 , H01L2924/19033 , H01L2924/19041 , H01L2924/30107 , H01L2924/3011 , H01L2924/30111 , H01P1/047 , H01P3/003 , H05K1/0245 , H05K1/025 , H05K3/3436 , H05K3/3442 , H05K2201/09236 , H01L2924/00 , H01L2924/00012 , H01L2224/45015 , H01L2924/207 , H01L2224/45099 , H01L2224/05599
摘要： MMIC package comprises a trace pattern (30, 36, 38) which matches impedances at all transitions (70, 72) to enhance signal transmission and avoid reflection.

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