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1. 发明授权

CN1005884B 高跨导高厄利(Early)电压模似(MOS)晶体管失效
公开(公告)号：CN1005884B
公开(公告)日：1989-11-22
申请号：CN86100192
申请日：1986-01-12
申请人：南开大学
发明人：马龙 , 钱其璈
IPC分类号： H01L29/68 , H01L29/50 , H01L27/06
摘要：高跨导高Early电压的MOS晶体管——HGET，属于一族新型半导体集成器件。它能在常规的MOS工艺下制造出跨导为20～40m，Early电压为40～50V的器件。这种器件放大器的电压增益可达57db。它的等效电路是由两个MOS管和一个双极型晶体管复合构成，它的工艺简单，又能比普通的MOS器件的芯片面积小β倍，用于模拟电路中即能获得高增益，又因互补作用，能灵活满足不同电路的设计要求。

2. 发明授权

CN1018779B 垂直双极型晶体管失效
公开(公告)号：CN1018779B
公开(公告)日：1992-10-21
申请号：CN90108153.1
申请日：1988-01-30
申请人：得克萨斯仪器公司
发明人：拉杰夫·让·沙夏 , 托安·特兰
IPC分类号： H01L29/50 , H01L29/73 , H01L21/82
摘要：双极型和CMOS晶体管。掩膜、图形制作和注入被集成以减少复杂性，形成PMOS和NMOS栅极导体和双极型发射极结构的并合多晶硅。多晶硅被重掺杂以形成MOS晶体管栅极和另一高杂质浓度的区域，该区域嗣后被扩散至双极型基区。对双极型晶体管的集电极、基极、发射极和MOS晶体管的栅极、源极、漏极用横向延伸的接触条带可制作面积小性能高的晶体管。对电极金属化图形对准的要求可降低。

3. 发明公开

CN1050469A 双极型和互补金属氧化物半导体晶体管失效
公开(公告)号：CN1050469A
公开(公告)日：1991-04-03
申请号：CN90108153.1
申请日：1988-01-30
申请人：得克萨斯仪器公司
发明人：拉杰夫·让·沙夏 , 托安·特兰
IPC分类号： H01L29/50 , H01L29/73 , H01L27/04 , H01L21/82
摘要：双极型和CMOS晶体管。掩膜、图形制作和注入被一体化以减少复杂性，形成PMOS和NMOS栅极导体和双极型发射极结构的分层多晶硅。多晶硅被重掺杂以形成MOS晶体管栅极和另一高杂质浓度的区域，该区域嗣后被扩散至双极型基区。对双极型晶体管的集电极、基极、发射极和MOS晶体管的栅极、源极、漏极用横向延伸的接触条带可制作面积小性能高的晶体管。对电极金属化图形对准的要求可降低。

4. 发明授权

US5998835A High performance MOSFET device with raised source and drain 失效
标题翻译：高性能MOSFET器件，具有升高的源极和漏极
公开(公告)号：US5998835A
公开(公告)日：1999-12-07
申请号：US24840
申请日：1998-02-17
申请人： Toshiharu Furukawa , Mark C. Hakey , Steven J. Holmes , David V. Horak , William H. Ma , Jack A. Mandelman
发明人： Toshiharu Furukawa , Mark C. Hakey , Steven J. Holmes , David V. Horak , William H. Ma , Jack A. Mandelman
IPC分类号： H01L21/225 , H01L21/336 , H01L29/78 , H01L29/50
CPC分类号： H01L29/66613 , H01L29/66621 , H01L29/7834 , H01L21/2255
摘要： A MOSFET device and a method of manufacturing the device. The device has a trench formed in a silicon substrate. The channel of the device is at the bottom of the trench. Diffusion layers are formed adjacent to opposite sides of the trench. Each diffusion layer is connected to the edge of the device channel by extending the diffusion layer along the side wall of the trench and under a portion of the trench.
摘要翻译：一种MOSFET器件及其制造方法。该器件具有形成在硅衬底中的沟槽。设备的通道位于沟槽的底部。扩散层邻近沟槽的相对侧形成。通过沿着沟槽的侧壁和沟槽的一部分延伸扩散层，将每个扩散层连接到器件沟道的边缘。

5. 发明授权

US5523607A Integrated current-limiter device for power MOS transistors 失效
公开(公告)号：US5523607A
公开(公告)日：1996-06-04
申请号：US383213
申请日：1995-02-02
申请人： Raffaele Zambrano
发明人： Raffaele Zambrano
IPC分类号： H01L21/331 , H01L27/06 , H01L29/735 , H01L29/70 , H01L29/78 , H01L29/50
CPC分类号： H01L29/6625 , H01L27/0623 , H01L29/735
摘要： A bipolar control transistor, forming part of an integrated current-limiter device comprises inside an epitaxial layer superimposed over a semiconductor substrate of a first type of conductivity, a base region of a second type of conductivity accessible from a base contact and regions of collector and emitter of the first type of conductivity contained in the base region and accessible from respective collector and emitter contacts. The base region comprises at least one highly-doped deep-body region which contains almost completely said emitter region, a lightly-doped body region which contains the collector region and an intermediate-doped region which co-operates with the first deep-body region to completely contain the emitter region and a surface area of the base region that is included between the regions of collector and emitter. There is also at least one first portion of a layer of polysilicon superimposed and self-aligned with the surface area between the regions of collector and emitter and electrically connected to the collector contact of the bipolar transistor.

6. 发明授权

US5406114A Bipolar high-frequency transistor 失效
标题翻译：双极高频晶体管
公开(公告)号：US5406114A
公开(公告)日：1995-04-11
申请号：US159598
申请日：1993-12-01
申请人： Knut Brenndoerfer , Jakob Huber
发明人： Knut Brenndoerfer , Jakob Huber
IPC分类号： H01L23/12 , H01L21/331 , H01L23/495 , H01L23/66 , H01L29/73 , H01L29/50 , H01L27/082 , H01L29/40
CPC分类号： H01L24/06 , H01L23/49562 , H01L23/66 , H01L24/49 , H01L2223/6644 , H01L2224/04042 , H01L2224/05599 , H01L2224/0603 , H01L2224/45144 , H01L2224/48091 , H01L2224/48247 , H01L2224/48257 , H01L2224/4847 , H01L2224/48599 , H01L2224/49111 , H01L2224/49171 , H01L2224/49175 , H01L24/45 , H01L24/48 , H01L2924/00014 , H01L2924/01004 , H01L2924/01014 , H01L2924/01015 , H01L2924/0102 , H01L2924/01029 , H01L2924/01031 , H01L2924/01033 , H01L2924/01047 , H01L2924/01068 , H01L2924/01072 , H01L2924/01078 , H01L2924/01079 , H01L2924/01082 , H01L2924/10253 , H01L2924/10329 , H01L2924/1305 , H01L2924/1306 , H01L2924/14 , H01L2924/181 , H01L2924/30105 , H01L2924/30107 , H01L2924/3011
摘要： A high-frequency transistor has a suitably doped and structured semiconductor chip (1) that is composed of a doped Si substrate and has base, collector and emitter contactings (2, 3, 4). The chip (1) is surrounded by a housing (8), the contacts being connected to the respective base, collector and emitter terminals (6, 7, 5) of the housing. With the housing the transistor has a high gain at frequencies above 1 GHz. The base, collector and emitter contacts (2, 3, 4) are provided at the upper side of the semiconductor chip (1). The semiconductor chip (1) has its underside arranged on the emitter terminal (5) of the housing (8) which is fashioned as HF ground. The emitter contact (4) is connected over a short distance to the emitter terminal (5) of the housing (8). The base and collector contacts (2, 3) are each respectively connected via at least one bond wire (9) to the respective base or collector terminals (6, 7).
摘要翻译：高频晶体管具有由掺杂的Si衬底组成并具有基极，集电极和发射极接触（2,3,4）的适当掺杂和结构化的半导体芯片（1）。芯片（1）由壳体（8）围绕，触点连接到壳体的相应的基座，集电极和发射极端子（6,7）。使用外壳，晶体管在高于1 GHz的频率具有高增益。基极，集电极和发射极触点（2,3,4）设置在半导体芯片（1）的上侧。半导体芯片（1）的下侧布置在壳体（8）的发射极端子（5）上，其被形成为HF接地。发射极触点（4）在短距离上连接到壳体（8）的发射极端子（5）。基极和集电极触点（2,3）分别经由至少一个接合线（9）连接到相应的基极或集电极端子（6,7）。

7. 发明公开

EP0361455A2 Color cathode ray tube apparatus 失效
标题翻译： VorrichtungfüreineFarbkathodenstrahlröhre。
公开(公告)号：EP0361455A2
公开(公告)日：1990-04-04
申请号：EP89117890.7
申请日：1989-09-27
申请人： KABUSHIKI KAISHA TOSHIBA
发明人： Shimoma, Taketoshi Intellectual Property Division , Kamohara, Eiji Intellectual Property Division , Sugawara, Shigeru Intellectual Property Division , Shimokobe, Jiro Intellectual Property Division
IPC分类号： H01L29/50 , H01J29/51
CPC分类号： H01J29/51 , H01J29/503 , H01J2229/4865 , H01J2229/4872 , H01J2229/4875 , H01J2229/4879 , H01J2229/4896
摘要： A color cathode ray tube apparatus is provided with an electron gun (62, 112, 162, 212) which has a common large-aperture electron lens on which three electron beams are incident. Since the electron gun has individual electron lenses for individual electron beams, the electron beams can be properly converged and focused on a screen (66, 116, 166, 216). Thus, the apparatus enjoys a satisfactory picture characteristic.
摘要翻译：彩色阴极射线管装置设置有电子枪（62,112,162,212），该电子枪具有共同的三个电子束入射的大孔径电子透镜。由于电子枪具有用于单个电子束的单独的电子透镜，所以电子束可被适当地会聚并聚焦在屏幕（66,116,166,216）上。因此，该装置具有令人满意的图像特性。

8. 发明授权

EP0123936B1 Semiconductor device 失效
公开(公告)号：EP0123936B1
公开(公告)日：1989-01-11
申请号：EP84103566.0
申请日：1984-03-30
申请人： HITACHI, LTD.
发明人： Horiuchi, Masatada , Yamaguchi, Ken
IPC分类号： H01L29/08 , H01L29/50 , H01L27/08 , H01L29/62
CPC分类号： H01L29/0847 , H01L21/2257 , H01L21/823835 , H01L27/0927 , H01L29/41783 , H01L29/456 , H01L29/66575 , H01L29/66628
摘要： Disclosed is a semiconductor device, especially MISFET, which can ensure high breakdown voltage and operate at high speed. The source and drain regions (5, 6; 24, 25) have an impurity concentration not exceeding 10 cm , and on the surface of the impurity regions there is a metal silicide layer (12, 214) with a very thin, highly conductive layer (13) formed underneath the silicide. In the case of CMOS, the impurity concentration of the n-type drain or source regions (24, 25) does not exceed 10 cm whereas the impurity concentration of an p-type drain or source regions does not exceed 10 cm and at least one portion (214) of the drain or source region (24, 25) is made of a metal silicide, thereby effectively preventing the latch-up phenomenon. The characteristics of the MISFET may be further improved by having a gate sidewall insulator of a high dielectric constant.

9. 发明授权

US5422509A Integrated current-limiter device for power MOS transistors 失效
标题翻译：用于功率MOS晶体管的集成电流限制器件
公开(公告)号：US5422509A
公开(公告)日：1995-06-06
申请号：US40216
申请日：1993-04-01
申请人： Raffaele Zambrano
发明人： Raffaele Zambrano
IPC分类号： H01L21/331 , H01L27/06 , H01L29/735 , H01L29/50 , H01L29/70 , H01L29/78
CPC分类号： H01L29/6625 , H01L27/0623 , H01L29/735 , Y10S148/01 , Y10S148/011 , Y10S148/126
摘要： A bipolar control transistor, forming part of an integrated current-limiter device comprises inside an epitaxial layer superimposed over a semiconductor substrate of a first type of conductivity, a base region of a second type of conductivity accessible from a base contact and regions of collector and emitter of the first type of conductivity contained in the base region and accessible from respective collector and emitter contacts. The base region comprises at least one highly-doped deep-body region which contains almost completely said emitter region, a lightly-doped body region which contains the collector region and an intermediate-doped region which co-operates with the first deep-body region to completely contain the emitter region and a surface area of the base region that is included between the regions of collector and emitter. There is also at least one first portion of a layer of polysilicon superimposed and self-aligned with the surface area between the regions of collector and emitter and electrically connected to the collector contact of the bipolar transistor.
摘要翻译：形成集成电流限制器件的一部分的双极性控制晶体管包括叠加在第一导电类型的半导体衬底上的外延层的内部，可从基极接触的第二类导电性的基极区域和集电极和第一类电导率的发射极包含在基极区域中并且可从相应的集电极和发射极触点接近。基极区域包括至少一个高度掺杂的深体区域，其包含几乎完全是所述发射极区域，包含集电极区域的轻掺杂体区域和与第一深体区域配合的中间掺杂区域以完全包含发射极区域和包括在集电极和发射极的区域之间的基极区域的表面积。还存在与集电极和发射极的区域之间的表面积叠置并自对准并与双极晶体管的集电极触点电连接的多晶硅层的至少一个第一部分。

10. 发明授权

US4684965A Monolithic programmable attenuator 失效
标题翻译：单片可编程衰减器
公开(公告)号：US4684965A
公开(公告)日：1987-08-04
申请号：US810900
申请日：1985-12-20
申请人： Yusuke Tajima , Toshikazu Tsukii
发明人： Yusuke Tajima , Toshikazu Tsukii
IPC分类号： H03H11/24 , H01L29/50 , H01L29/52
CPC分类号： H03H11/245
摘要： A programmable attenuator includes a plurality of field effect transistors (FETS) arranged together to provide an attenuation network. Each one of the FETS has a plurality of cell portions, each cell portion having drain, gate and source regions, the source and drain regions of the cell portions being connected in parallel. A first selected portion of the gate regions of each one of said FETS is connected to a gate electrode. A second selected remaining portion of the gate regions of each one of the FETS has the gate regions thereof isolated from the gate electrode. A signal fed to the gate electrode of each FET is distributed to the connected gate regions of each field effect transistor. In response to such signal, the total drain-source resistance of such FET is changed between a predetermined low value and a predetermined high value, with the resistance of the predetermined high value being determined, in part, by the number of such isolated gate regions.
摘要翻译：可编程衰减器包括布置在一起以提供衰减网络的多个场效应晶体管（FETS）。每个FETS具有多个单元部分，每个单元部分具有漏极，栅极和源极区域，单元部分的源极和漏极区域并联连接。每个所述FETS的栅极区域的第一选定部分连接到栅电极。每个FET的栅极区域的第二剩余部分的栅极区域与栅电极隔离。馈送到每个FET的栅电极的信号被分配到每个场效应晶体管的连接的栅极区域。响应于这种信号，这种FET的总漏极 - 源极电阻在预定的低值和预定的高值之间变化，其中预定的高电阻的电阻部分地被这样的隔离栅极区域的数量确定。

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