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1. 发明授权

US08975182B2 Method for manufacturing semiconductor device, and semiconductor device 有权
标题翻译：半导体装置的制造方法以及半导体装置
公开(公告)号：US08975182B2
公开(公告)日：2015-03-10
申请号：US14234476
申请日：2012-07-27
申请人： Satoshi Tanimoto , Yusuke Zushi , Yoshinori Murakami , Takashi Iseki , Masato Takamori , Shinji Sato , Kohei Matsui
发明人： Satoshi Tanimoto , Yusuke Zushi , Yoshinori Murakami , Takashi Iseki , Masato Takamori , Shinji Sato , Kohei Matsui
IPC分类号： H01L21/44 , H01L23/48 , H01L23/52 , H01L29/40 , H01L23/00 , B23K35/28 , B23K35/00 , B23K35/02 , C22C18/04 , B23K1/00 , B23K1/008 , B23K1/19 , H01L29/16 , H01L29/20
CPC分类号： H01L29/1602 , B23K1/0016 , B23K1/008 , B23K1/19 , B23K1/206 , B23K35/007 , B23K35/025 , B23K35/282 , B23K35/286 , B23K2101/34 , B23K2101/40 , B23K2101/42 , C22C18/04 , H01L24/29 , H01L24/32 , H01L24/83 , H01L29/1608 , H01L29/2003 , H01L2224/29118 , H01L2224/32225 , H01L2224/83001 , H01L2224/83203 , H01L2224/83447 , H01L2224/83815 , H01L2924/01322 , H01L2924/10254 , H01L2924/10272 , H01L2924/1033 , H01L2924/15747 , H01L2924/15787 , H01L2924/01013 , H01L2924/0103 , H01L2924/00
摘要： A method for manufacturing a semiconductor device is carried out by readying each of a semiconductor element, a substrate having Cu as a principal element at least on a surface, and a ZnAl solder chip having a smaller shape than that of the semiconductor element; disposing the semiconductor element and the substrate so that respective bonding surfaces face each other, and sandwiching the ZnAl eutectic solder chip between the substrate and the semiconductor element; increasing the temperature of the ZnAl solder chip sandwiched between the substrate and the semiconductor element while applying a load to the ZnAl solder chip such that the ZnAl solder chip melts to form a ZnAl solder layer; and reducing the temperature of the ZnAl solder layer while applying a load to the ZnAl solder layer.
摘要翻译：半导体器件的制造方法是通过将半导体元件，至少具有表面的Cu作为主要元素的基板和比半导体元件的形状小的ZnAl焊料芯片进行准位来进行的。将所述半导体元件和所述基板配置为使得各个接合面彼此面对，并将所述ZnAl共晶焊料夹在所述基板和所述半导体元件之间; 在向ZnAl焊料芯片施加负载的同时，增加夹在基板和半导体元件之间的ZnAl焊料芯片的温度，使得ZnAl焊料芯片熔化形成ZnAl焊料层; 并且在向ZnAl焊料层施加负载的同时降低ZnAl焊料层的温度。

2. 发明授权

US08921998B2 Semiconductor module 有权
标题翻译：半导体模块
公开(公告)号：US08921998B2
公开(公告)日：2014-12-30
申请号：US14236236
申请日：2012-08-24
申请人： Yusuke Zushi , Yoshinori Murakami , Satoshi Tanimoto , Shinji Sato , Kohei Matsui
发明人： Yusuke Zushi , Yoshinori Murakami , Satoshi Tanimoto , Shinji Sato , Kohei Matsui
IPC分类号： H01L23/10 , H01L23/34 , H01L23/538 , H01L23/373 , H01L23/00 , H01L25/07 , H01L23/498 , H01L25/18
CPC分类号： H01L23/5384 , H01L23/3735 , H01L23/49811 , H01L24/48 , H01L24/49 , H01L25/072 , H01L25/18 , H01L2224/48091 , H01L2224/48132 , H01L2224/48227 , H01L2224/48235 , H01L2224/4846 , H01L2224/48472 , H01L2224/49111 , H01L2224/49175 , H01L2924/00014 , H01L2924/10272 , H01L2924/1033 , H01L2924/1203 , H01L2924/1305 , H01L2924/13055 , H01L2924/1306 , H01L2924/13062 , H01L2924/13091 , H01L2924/30105 , H01L2924/30107 , H01L2924/3011 , H01L2924/00 , H01L2924/00012 , H01L2224/45099 , H01L2224/45015 , H01L2924/207
摘要： A semiconductor module has a pair of semiconductor devices, a heat sink, a first electrode, an output electrode and a second electrode. The semiconductor devices are connected in series with each other and have first terminals that are electrically connected to a first power system and a second terminal that is electrically connected to a second power system. The first electrode is electrically connected both to one of the first terminal and to an electrode of one of the semiconductor devices. The output electrode is electrically connected both to the second terminal and to an electrode of the other of the semiconductor device. The second electrode is electrically connected to the other of the first terminals. The second electrode is connected to the heat sink via a first insulating member. The output electrode is connected to the second electrode via a second insulating member.
摘要翻译：半导体模块具有一对半导体器件，散热器，第一电极，输出电极和第二电极。半导体器件彼此串联连接并且具有电连接到第一电力系统的第一端子和电连接到第二电力系统的第二端子。第一电极电连接到第一端子中的一个和半导体器件中的一个的电极。输出电极与第二端子和半导体器件的另一个的电极电连接。第二电极与第一端子中的另一个电连接。第二电极通过第一绝缘构件连接到散热器。输出电极经由第二绝缘构件与第二电极连接。

3. 发明授权

US08916882B2 Switching circuit and semiconductor module 有权
标题翻译：开关电路和半导体模块
公开(公告)号：US08916882B2
公开(公告)日：2014-12-23
申请号：US14116890
申请日：2012-05-11
申请人： Yusuke Zushi , Yoshinori Murakami , Satoshi Tanimoto , Shinji Sato , Kohei Matsui
发明人： Yusuke Zushi , Yoshinori Murakami , Satoshi Tanimoto , Shinji Sato , Kohei Matsui
IPC分类号： H03K17/16 , H01L27/06 , H02M1/08
CPC分类号： H01L27/0629 , H01L27/0682 , H01L2224/48091 , H01L2224/48137 , H01L2224/49111 , H01L2924/19105 , H02M1/08 , H03K17/04123 , H03K17/166 , H01L2924/00014
摘要： A switching circuit includes: a first switching element (Q1); a resistor (11) inserted between a control electrode (G) of the first switching element (Q1) and a control circuit (13) switching the first switching element (Q1); and a first capacitor (15) and a second switching element (14) connected in series between the control electrode (G) of the first switching element (Q1) and a low potential-side electrode (S) of the first switching element (Q1). A high potential-side electrode of the second switching element (14) is connected to the control electrode (G) of the first switching element (Q1). An electrode of the first capacitor (15) is connected to the low potential-side electrode (S) of the first switching element (Q1). A control electrode of the second switching element (14) is connected to an electrode of the resistor (11) connected to the control circuit (13).
摘要翻译：开关电路包括：第一开关元件（Q1）; 插入在第一开关元件（Q1）的控制电极（G）和切换第一开关元件（Q1）的控制电路（13）之间的电阻器（11）; 以及串联连接在第一开关元件（Q1）的控制电极（G）和第一开关元件（Q1）的低电位侧电极（S）之间的第一电容器（15）和第二开关元件（14））。第二开关元件（14）的高电位侧电极连接到第一开关元件（Q1）的控制电极（G）。第一电容器（15）的电极与第一开关元件（Q1）的低电位侧电极（S）连接。第二开关元件（14）的控制电极连接到与控制电路（13）连接的电阻器（11）的电极。

4. 发明申请

US20140191250A1 METHOD FOR MANUFACTURING SEMICONDUCTOR DEVICE, AND SEMICONDUCTOR DEVICE 有权
标题翻译：制造半导体器件的方法和半导体器件
公开(公告)号：US20140191250A1
公开(公告)日：2014-07-10
申请号：US14234476
申请日：2012-07-27
申请人： Satoshi Tanimoto , Yusuke Zushi , Yoshinori Murakami , Takashi Iseki , Masato Takamori , Shinji Sato , Kohei Matsui
发明人： Satoshi Tanimoto , Yusuke Zushi , Yoshinori Murakami , Takashi Iseki , Masato Takamori , Shinji Sato , Kohei Matsui
IPC分类号： H01L23/00 , H01L29/16 , H01L29/20
CPC分类号： H01L29/1602 , B23K1/0016 , B23K1/008 , B23K1/19 , B23K1/206 , B23K35/007 , B23K35/025 , B23K35/282 , B23K35/286 , B23K2101/34 , B23K2101/40 , B23K2101/42 , C22C18/04 , H01L24/29 , H01L24/32 , H01L24/83 , H01L29/1608 , H01L29/2003 , H01L2224/29118 , H01L2224/32225 , H01L2224/83001 , H01L2224/83203 , H01L2224/83447 , H01L2224/83815 , H01L2924/01322 , H01L2924/10254 , H01L2924/10272 , H01L2924/1033 , H01L2924/15747 , H01L2924/15787 , H01L2924/01013 , H01L2924/0103 , H01L2924/00
摘要： A method for manufacturing a semiconductor device is carried out by readying each of a semiconductor element, a substrate having Cu as a principal element at least on a surface, and a ZnAl solder chip having a smaller shape than that of the semiconductor element; disposing the semiconductor element and the substrate so that respective bonding surfaces face each other, and sandwiching the ZnAl eutectic solder chip between the substrate and the semiconductor element; increasing the temperature of the ZnAl solder chip sandwiched between the substrate and the semiconductor element while applying a load to the ZnAl solder chip such that the ZnAl solder chip melts to form a ZnAl solder layer; and reducing the temperature of the ZnAl solder layer while applying a load to the ZnAl solder layer.
摘要翻译：半导体器件的制造方法是通过将半导体元件，至少具有表面的Cu作为主要元素的基板和比半导体元件的形状小的ZnAl焊料芯片进行准位来进行的。将所述半导体元件和所述基板配置为使得各个接合面彼此面对，并将所述ZnAl共晶焊料夹在所述基板和所述半导体元件之间; 在向ZnAl焊料芯片施加负载的同时，增加夹在基板和半导体元件之间的ZnAl焊料芯片的温度，使得ZnAl焊料芯片熔化形成ZnAl焊料层; 并且在向ZnAl焊料层施加负载的同时降低ZnAl焊料层的温度。

5. 发明申请

US20140159225A1 SEMICONDUCTOR MODULE 有权
标题翻译：半导体模块
公开(公告)号：US20140159225A1
公开(公告)日：2014-06-12
申请号：US14236236
申请日：2012-08-24
申请人： Yusuke Zushi , Yoshinori Murakami , Satoshi Tanimoto , Shinji Sato , Kohei Matsui
发明人： Yusuke Zushi , Yoshinori Murakami , Satoshi Tanimoto , Shinji Sato , Kohei Matsui
IPC分类号： H01L23/538
CPC分类号： H01L23/5384 , H01L23/3735 , H01L23/49811 , H01L24/48 , H01L24/49 , H01L25/072 , H01L25/18 , H01L2224/48091 , H01L2224/48132 , H01L2224/48227 , H01L2224/48235 , H01L2224/4846 , H01L2224/48472 , H01L2224/49111 , H01L2224/49175 , H01L2924/00014 , H01L2924/10272 , H01L2924/1033 , H01L2924/1203 , H01L2924/1305 , H01L2924/13055 , H01L2924/1306 , H01L2924/13062 , H01L2924/13091 , H01L2924/30105 , H01L2924/30107 , H01L2924/3011 , H01L2924/00 , H01L2924/00012 , H01L2224/45099 , H01L2224/45015 , H01L2924/207
摘要： A semiconductor module has a pair of semiconductor devices, a heat sink, a first electrode, an output electrode and a second electrode. The semiconductor devices are connected in series with each other and have first terminals that are electrically connected to a first power system and a second terminal that is electrically connected to a second power system. The first electrode is electrically connected both to one of the first terminal and to an electrode of one of the semiconductor devices. The output electrode is electrically connected both to the second terminal and to an electrode of the other of the semiconductor device. The second electrode is electrically connected to the other of the first terminals. The second electrode is connected to the heat sink via a first insulating member. The output electrode is connected to the second electrode via a second insulating member.
摘要翻译：半导体模块具有一对半导体器件，散热器，第一电极，输出电极和第二电极。半导体器件彼此串联连接并且具有电连接到第一电力系统的第一端子和电连接到第二电力系统的第二端子。第一电极电连接到第一端子中的一个和半导体器件中的一个的电极。输出电极与第二端子和半导体器件的另一个的电极电连接。第二电极与第一端子中的另一个电连接。第二电极通过第一绝缘构件连接到散热器。输出电极经由第二绝缘构件与第二电极连接。

6. 发明申请

US20140091324A1 SWITCHING CIRCUIT AND SEMICONDUCTOR MODULE 有权
标题翻译：切换电路和半导体模块
公开(公告)号：US20140091324A1
公开(公告)日：2014-04-03
申请号：US14116890
申请日：2012-05-11
申请人： Yusuke Zushi , Yoshinori Murakami , Satoshi Tanimoto , Shinji Sato , Kohei Matsui
发明人： Yusuke Zushi , Yoshinori Murakami , Satoshi Tanimoto , Shinji Sato , Kohei Matsui
IPC分类号： H01L27/06
CPC分类号： H01L27/0629 , H01L27/0682 , H01L2224/48091 , H01L2224/48137 , H01L2224/49111 , H01L2924/19105 , H02M1/08 , H03K17/04123 , H03K17/166 , H01L2924/00014
摘要： A switching circuit includes: a first switching element (Q1); a resistor (11) inserted between a control electrode (G) of the first switching element (Q1) and a control circuit (13) switching the first switching element (Q1); and a first capacitor (15) and a second switching element (14) connected in series between the control electrode (G) of the first switching element (Q1) and a low potential-side electrode (S) of the first switching element (Q1). A high potential-side electrode of the second switching element (14) is connected to the control electrode (G) of the first switching element (Q1). An electrode of the first capacitor (15) is connected to the low potential-side electrode (S) of the first switching element (Q1). A control electrode of the second switching element (14) is connected to an electrode of the resistor (11) connected to the control circuit (13).
摘要翻译：开关电路包括：第一开关元件（Q1）; 插入在第一开关元件（Q1）的控制电极（G）和切换第一开关元件（Q1）的控制电路（13）之间的电阻器（11）; 以及串联连接在第一开关元件（Q1）的控制电极（G）和第一开关元件（Q1）的低电位侧电极（S）之间的第一电容器（15）和第二开关元件（14））。第二开关元件（14）的高电位侧电极连接到第一开关元件（Q1）的控制电极（G）。第一电容器（15）的电极与第一开关元件（Q1）的低电位侧电极（S）连接。第二开关元件（14）的控制电极连接到与控制电路（13）连接的电阻器（11）的电极。

7. 发明授权

US11666759B2 Nerve stimulating apparatus, biometric information measuring system, and method of setting stimulus generating timings of biometric information measuring system 有权
公开(公告)号：US11666759B2
公开(公告)日：2023-06-06
申请号：US17069193
申请日：2020-10-13
申请人： Shinji Sato , Sukchan Kim , Taishi Watanabe , Yuki Mitani , Yuki Miyano , Shigenori Kawabata , Toru Sasaki
发明人： Shinji Sato , Sukchan Kim , Taishi Watanabe , Yuki Mitani , Yuki Miyano , Shigenori Kawabata , Toru Sasaki
IPC分类号： A61N1/36
CPC分类号： A61N1/36031 , A61N1/36034
摘要： A nerve stimulating apparatus includes a plurality of stimulating units configured to respectively apply stimuli to a plurality of nerve regions branching from a particular nerve region of a living body, and a stimulation timing controller configured to set generating timings of respectively generating the stimuli at the plurality of stimulating units. The stimulation timing controller sets the generating timings of generating the stimuli at the plurality of stimulating units based on response results of the particular nerve region, the response results being obtained in response to the stimuli that are respectively generated at the plurality of stimulating units and that are respectively applied to the plurality of nerve regions, and the response results being measured by a biometric information measuring apparatus that measures biometric information.

8. 发明授权

US08896806B2 Exposure apparatus, exposure method, and device manufacturing method 有权
标题翻译：曝光装置，曝光方法和装置制造方法
公开(公告)号：US08896806B2
公开(公告)日：2014-11-25
申请号：US12644703
申请日：2009-12-22
申请人： Shinji Sato
发明人： Shinji Sato
IPC分类号： G03B27/52
CPC分类号： G03F7/70341 , G03F7/70916
摘要： An exposure apparatus that exposes a substrate includes: an optical system that includes an emission surface from which an exposure light is emitted; a first surface that is disposed in at least a part of a surrounding of an optical path of the exposure light emitted from the emission surface; a second surface that is disposed in at least a part of a surrounding of the first surface and at a position lower than the first surface; a space portion into which a liquid can flow via a first aperture between the first surface and the second surface and which is opened to the atmosphere via a second aperture different from the first aperture; and a first recovery portion that recovers at least a part of the liquid flowing into the space portion. Here, the emission surface, the first surface, and the second surface are opposed to the surface of the substrate in at least a part of the exposure of the substrate, and the substrate is exposed with the exposure light from the emission surface via the liquid between the emission surface and the surface of the substrate.
摘要翻译：曝光基板的曝光装置包括：包括发射曝光光的发射面的光学系统; 第一表面，其设置在从所述发射表面发射的所述曝光光的光路的周围的至少一部分中; 第二表面，其设置在所述第一表面的周围的至少一部分中并且位于比所述第一表面低的位置; 空间部分，液体可以经由第一表面和第二表面之间的第一孔流动，并且经由不同于第一孔的第二孔向大气开放; 以及第一回收部，其回收流入空间部的液体的至少一部分。这里，在基板的曝光的至少一部分中，发光面，第一表面和第二表面与基板的表面相对，并且通过液体从发射表面暴露出曝光的基板在发射表面和衬底的表面之间。

9. 发明申请

US20140166622A1 TANK-TYPE CIRCUIT BREAKER 有权
标题翻译：油罐式断路器
公开(公告)号：US20140166622A1
公开(公告)日：2014-06-19
申请号：US14233305
申请日：2012-08-24
申请人： Junichi Abe , Shinji Sato , Tomoko Tanabe , Naoaki Inoue
发明人： Junichi Abe , Shinji Sato , Tomoko Tanabe , Naoaki Inoue
IPC分类号： H01H33/26
CPC分类号： H01H33/26 , G01R31/1227 , H01H33/668 , H02B13/0655
摘要： Capacitors (5a, 5b) are provided in the insulators of bushings (4a, 4b), respectively. One ends of the capacitors (5a, 5b) are connected to central conductors (3a, 3b) side, and the other ends are connected to a tank (1) side at the ground potential. When a discharge signal from the outside of the tank (1) reaches the capacitors (5a, 5b) through the central conductors (3a, 3b), the capacitors (5a, 5b) work as a filter to attenuate and prevent the signal in the frequency band of the discharge waveform from propagating to the inside of the tank (1). When an antenna (7) placed in the tank (1) receives a signal in the frequency band of the discharge waveform, a discharge detection unit (20) determines that a discharge inside the tank has been detected.
摘要翻译：电容器（5a，5b）分别设置在衬套（4a，4b）的绝缘体中。电容器（5a，5b）的一端与中心导体（3a，3b）侧连接，另一端与接地电位的水箱（1）侧连接。当来自罐（1）的外部的放电信号通过中心导体（3a，3b）到达电容器（5a，5b）时，电容器（5a，5b）用作滤波器，以衰减并防止放电波形的频带从传播到罐（1）的内部。当放置在储罐（1）中的天线（7）接收到放电波形的频带中的信号时，放电检测单元（20）确定已经检测到罐内的放电。

10. 发明授权

US08638608B2 Selected word line dependent select gate voltage during program 有权
标题翻译：程序中所选字线相关选择栅极电压
公开(公告)号：US08638608B2
公开(公告)日：2014-01-28
申请号：US13430502
申请日：2012-03-26
申请人： Chun-Hung Lai , Deepanshu Dutta , Shinji Sato , Gerrit Jan Hemink
发明人： Chun-Hung Lai , Deepanshu Dutta , Shinji Sato , Gerrit Jan Hemink
IPC分类号： G11C11/34
CPC分类号： G11C11/5628 , G11C16/0483 , G11C16/10
摘要： Methods and devices for operating non-volatile storage are disclosed. One or more programming conditions depend on the location of the word line that is selected for programming, which may reduce or eliminate program disturb. The voltage applied to the gate of a select transistor of a NAND string may depend on the location of the selected word line. This could be either a source side or drain side select transistor. This may prevent or reduce program disturb that could result due to DIBL. This may also prevent or reduce program disturb that could result due to GIDL. A negative bias may be applied to the gate of a source side select transistor when programming at least some of the word lines. In one embodiment, progressively lower voltages are used for the gate of the drain side select transistor when programming progressively higher word lines.
摘要翻译：公开了用于操作非易失性存储器的方法和装置。一个或多个编程条件取决于选择用于编程的字线的位置，这可以减少或消除程序干扰。施加到NAND串的选择晶体管的栅极的电压可以取决于所选字线的位置。这可以是源极侧或漏极侧选择晶体管。这可能会阻止或减少由于DIBL而导致的程序干扰。这也可以防止或减少由于GIDL可能导致的程序干扰。当编程至少一些字线时，负偏压可以施加到源极侧选择晶体管的栅极。在一个实施例中，当编程逐渐增加的字线时，逐渐降低的电压用于漏极侧选择晶体管的栅极。

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