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1. 发明授权

US08008715B2 Semiconductor device 有权
标题翻译：半导体器件
公开(公告)号：US08008715B2
公开(公告)日：2011-08-30
申请号：US12185630
申请日：2008-08-04
申请人： Yusuke Kawaguchi , Kazuya Nakayama , Tsuyoshi Ohta , Takeshi Uchihara , Takahiro Kawano , Yuji Kato
发明人： Yusuke Kawaguchi , Kazuya Nakayama , Tsuyoshi Ohta , Takeshi Uchihara , Takahiro Kawano , Yuji Kato
IPC分类号： H01L29/78
CPC分类号： H01L29/7813 , H01L29/42372 , H01L29/42376 , H01L29/4238 , H01L29/7811
摘要： There is provided a semiconductor device comprising: a first semiconductor layer of a first conductivity type; a second semiconductor layer of a second conductivity type provided on the first semiconductor layer of the first conductivity type; a semiconductor region of the first conductivity type selectively provided on a front surface portion of the second semiconductor layer of the second conductivity type; a first main electrode provided in contact with a surface of the semiconductor region; a second main electrode provided on a side of the first semiconductor layer of the first conductivity type, the side being opposite to the surface on which the second semiconductor layer of the second conductivity type is provided; a gate wiring provided on the second semiconductor layer of the second conductivity type around an element region in which the semiconductor region is provided; a trench penetrating the second semiconductor layer of the second conductivity type to reach the first semiconductor layer of the first conductivity type, and also extending under the element region and the gate wiring; a gate electrode provided inside the trench in the element region with a gate insulating film interposed in between; and a gate electrode lead portion provided inside the trench under the gate wiring with the gate insulating film interposed in between, and contacting the gate wiring and the gate electrode.
摘要翻译：提供一种半导体器件，包括：第一导电类型的第一半导体层; 设置在第一导电类型的第一半导体层上的第二导电类型的第二半导体层; 选择性地设置在第二导电类型的第二半导体层的前表面部分上的第一导电类型的半导体区域; 设置成与半导体区域的表面接触的第一主电极; 设置在第一导电类型的第一半导体层的一侧的第二主电极，与设置有第二导电类型的第二半导体层的表面相对的一侧; 围绕设置有半导体区域的元件区域设置在第二导电类型的第二半导体层上的栅极布线; 穿过第二导电类型的第二半导体层的沟槽到达第一导电类型的第一半导体层，并且还在元件区域和栅极布线之下延伸; 设置在所述元件区域的所述沟槽内部的栅电极，其间插入有栅极绝缘膜; 以及栅极引线部分，其设置在栅极布线下方的沟槽内部，栅极绝缘膜介于其间并与栅极布线和栅电极接触。

2. 发明申请

US20090032875A1 SEMICONDUCTOR DEVICE 有权
标题翻译：半导体器件
公开(公告)号：US20090032875A1
公开(公告)日：2009-02-05
申请号：US12185630
申请日：2008-08-04
申请人： Yusuke KAWAGUCHI , Kazuya Nakayama , Tsuyoshi Ohta , Takeshi Uchihara , Takahiro Kawano , Yuji Kato
发明人： Yusuke KAWAGUCHI , Kazuya Nakayama , Tsuyoshi Ohta , Takeshi Uchihara , Takahiro Kawano , Yuji Kato
IPC分类号： H01L29/00
CPC分类号： H01L29/7813 , H01L29/42372 , H01L29/42376 , H01L29/4238 , H01L29/7811
摘要： There is provided a semiconductor device comprising: a first semiconductor layer of a first conductivity type; a second semiconductor layer of a second conductivity type provided on the first semiconductor layer of the first conductivity type; a semiconductor region of the first conductivity type selectively provided on a front surface portion of the second semiconductor layer of the second conductivity type; a first main electrode provided in contact with a surface of the semiconductor region; a second main electrode provided on a side of the first semiconductor layer of the first conductivity type, the side being opposite to the surface on which the second semiconductor layer of the second conductivity type is provided; a gate wiring provided on the second semiconductor layer of the second conductivity type around an element region in which the semiconductor region is provided; a trench penetrating the second semiconductor layer of the second conductivity type to reach the first semiconductor layer of the first conductivity type, and also extending under the element region and the gate wiring; a gate electrode provided inside the trench in the element region with a gate insulating film interposed in between; and a gate electrode lead portion provided inside the trench under the gate wiring with the gate insulating film interposed in between, and contacting the gate wiring and the gate electrode.
摘要翻译：提供一种半导体器件，包括：第一导电类型的第一半导体层; 设置在第一导电类型的第一半导体层上的第二导电类型的第二半导体层; 选择性地设置在第二导电类型的第二半导体层的前表面部分上的第一导电类型的半导体区域; 设置成与所述半导体区域的表面接触的第一主电极; 设置在第一导电类型的第一半导体层的一侧的第二主电极，与设置有第二导电类型的第二半导体层的表面相对的一侧; 围绕设置有半导体区域的元件区域设置在第二导电类型的第二半导体层上的栅极布线; 穿过第二导电类型的第二半导体层的沟槽到达第一导电类型的第一半导体层，并且还在元件区域和栅极布线之下延伸; 设置在所述元件区域的所述沟槽内部的栅电极，其间插入有栅极绝缘膜; 以及栅极引线部分，其设置在栅极布线下方的沟槽内部，栅极绝缘膜介于其间并与栅极布线和栅电极接触。

3. 发明申请

US20080035992A1 SEMICONDUCTOR DEVICE 审中-公开
标题翻译：半导体器件
公开(公告)号：US20080035992A1
公开(公告)日：2008-02-14
申请号：US11836383
申请日：2007-08-09
申请人： Yusuke KAWAGUCHI , Yoshihiro Yamaguchi , Syotaro Ono , Akio Nakagawa , Miwako Akiyama , Kazuya Nakayama , Masakazu Yamaguchi
发明人： Yusuke KAWAGUCHI , Yoshihiro Yamaguchi , Syotaro Ono , Akio Nakagawa , Miwako Akiyama , Kazuya Nakayama , Masakazu Yamaguchi
IPC分类号： H01L29/78
CPC分类号： H01L29/7813 , H01L21/2815 , H01L29/0634 , H01L29/0696 , H01L29/1095 , H01L29/41766 , H01L29/42356 , H01L29/4236 , H01L29/42368 , H01L29/42376 , H01L29/66734 , H01L29/7828
摘要： This semiconductor device comprises a drift layer of a first conductivity type formed on a drain layer of a first conductivity type, and a drain electrode electrically connected to the drain layer. A semiconductor base layer of a second conductivity type is formed in a surface of the drift layer, and a source region of a first conductivity type is further formed in the semiconductor base layer.A source electrode is electrically connected to the source region and a semiconductor base layer. Plural gate electrodes are formed through a gate insulation film so that a semiconductor base layer may be sandwiched by the gate electrodes. The width of the semiconductor base layer sandwiched by the gate electrodes is 0.3 micrometers or less.
摘要翻译：该半导体器件包括形成在第一导电类型的漏极层上的第一导电类型的漂移层和电连接到漏极层的漏电极。在漂移层的表面上形成第二导电类型的半导体基底层，并且在半导体基底层中进一步形成第一导电类型的源极区。源电极电连接到源区和半导体基层。多个栅电极通过栅极绝缘膜形成，使得半导体基底层可以被栅电极夹持。被栅电极夹持的半导体基底层的宽度为0.3微米以下。

4. 发明授权

US07034346B2 Semiconductor device and method for manufacturing the same 有权
标题翻译：半导体装置及其制造方法
公开(公告)号：US07034346B2
公开(公告)日：2006-04-25
申请号：US10445952
申请日：2003-05-28
申请人： Kazuya Nakayama , Satoshi Aida , Shigeo Kouzuki , Masaru Izumisawa
发明人： Kazuya Nakayama , Satoshi Aida , Shigeo Kouzuki , Masaru Izumisawa
IPC分类号： H01L27/148
CPC分类号： H01L29/7802 , H01L21/26586 , H01L29/0696 , H01L29/0847 , H01L29/0878 , H01L29/1095 , H01L29/41766 , H01L29/4232 , H01L29/42364 , H01L29/42376 , H01L29/4933 , H01L29/66712 , H01L2924/0002 , H01L2924/00
摘要： A semiconductor device according to an embodiment of the present invention has a gate electrode which is formed on a semiconductor substrate via a gate insulating film, and which has a slit portion; side wall films formed at both side faces of the gate electrode and at side walls of the slit portion, and which fill an interior of the slit portion and cover the gate insulating film directly beneath the slit portion; and an interlayer insulating film formed to cover the gate electrode and the side wall films.
摘要翻译：根据本发明的实施例的半导体器件具有通过栅极绝缘膜形成在半导体衬底上并具有狭缝部分的栅电极; 形成在栅电极的两个侧面和狭缝部的侧壁处的侧壁膜，并且填充狭缝部分的内部并在狭缝部分正下方覆盖栅极绝缘膜; 以及形成为覆盖栅电极和侧壁膜的层间绝缘膜。

5. 发明授权

US06469425B1 Electron emission film and field emission cold cathode device 有权
标题翻译：电子发射膜和场致发射冷阴极器件
公开(公告)号：US06469425B1
公开(公告)日：2002-10-22
申请号：US09501241
申请日：2000-02-10
申请人： Tadashi Sakai , Kazuya Nakayama , Li Zhang , Gehan Anil Joseph Amaratunga , Ioannis Alexandrou , Mark Baxendale , Nalin Rupasinghe
发明人： Tadashi Sakai , Kazuya Nakayama , Li Zhang , Gehan Anil Joseph Amaratunga , Ioannis Alexandrou , Mark Baxendale , Nalin Rupasinghe
IPC分类号： H01J130
CPC分类号： H01J9/022 , H01J1/30 , H01J2201/30446
摘要： An electron emission film includes a matrix consisting essentially of amorphous carbon and fullerene-like structures consisting essentially of a two-dimensional network of six-membered carbon rings. The fullerene-like structures are dispersed in the matrix and partially project from the matrix. The weight ratio of amorphous carbon to the fullerene-like structures is about 50:50 to 5:95. Amorphous carbon contains nitrogen acting as a donor at a concentration of about 4×10−7 to 10 atom %.
摘要翻译：电子发射膜包括基本上由无定形碳和富勒烯样结构组成的基体，其基本上由六元碳环的二维网络组成。富勒烯样结构分散在基质中并部分地从基质上突出。无定形碳与富勒烯样结构的重量比为约50:50至5:95。无定形碳含有以约4×10-7至10原子％浓度的作为供体的氮。

6. 发明授权

US5793065A Insulated-gate thyristor 失效
公开(公告)号：US5793065A
公开(公告)日：1998-08-11
申请号：US483325
申请日：1995-06-07
申请人： Takashi Shinohe , Kazuya Nakayama , Minami Takeuchi , Masakazu Yamaguchi , Mitsuhiko Kitagawa , Ichiro Omura , Akio Nakagawa
发明人： Takashi Shinohe , Kazuya Nakayama , Minami Takeuchi , Masakazu Yamaguchi , Mitsuhiko Kitagawa , Ichiro Omura , Akio Nakagawa
IPC分类号： H01L29/423 , H01L29/745 , H01L29/749 , H01L29/74 , H01L31/111
CPC分类号： H01L29/7455 , H01L29/42308 , H01L29/749
摘要： Disclosed herein is an insulated-gate thyristor comprising a base layer of a first conductivity type, having first and second major surfaces, a first main-electrode region of the first conductivity type, formed in the first major surface of the base layer, a second main-electrode region of a second conductivity type, formed in the second major surface of the base layer, at least a pair of grooves extending from the first main-electrode region into the base layer, and opposing each other and spaced apart by a predetermined distance, insulated gate electrodes formed within the grooves, and a turn-off insulated-gate transistor structure for releasing carriers of the second conductivity type from the base layer.

7. 发明申请

US20050258503A1 Semiconductor device and method for manufacturing the same 有权
标题翻译：半导体装置及其制造方法
公开(公告)号：US20050258503A1
公开(公告)日：2005-11-24
申请号：US11186838
申请日：2005-07-22
申请人： Kazuya Nakayama , Satoshi Aida , Shigeo Kouzuki , Masaru Izumisawa
发明人： Kazuya Nakayama , Satoshi Aida , Shigeo Kouzuki , Masaru Izumisawa
IPC分类号： H01L21/265 , H01L21/336 , H01L29/06 , H01L29/08 , H01L29/10 , H01L29/423 , H01L29/49 , H01L29/78 , H01L29/788
CPC分类号： H01L29/7802 , H01L21/26586 , H01L29/0696 , H01L29/0847 , H01L29/0878 , H01L29/1095 , H01L29/41766 , H01L29/4232 , H01L29/42364 , H01L29/42376 , H01L29/4933 , H01L29/66712 , H01L2924/0002 , H01L2924/00
摘要： A semiconductor device according to an embodiment of the present invention has a gate electrode which is formed on a semiconductor substrate via a gate insulating film, and which has a slit portion; side wall films formed at both side faces of the gate electrode and at side walls of the slit portion, and which fill an interior of the slit portion and cover the gate insulating film directly beneath the slit portion; and an interlayer insulating film formed to cover the gate electrode and the side wall films.
摘要翻译：根据本发明的实施例的半导体器件具有通过栅极绝缘膜形成在半导体衬底上并具有狭缝部分的栅电极; 形成在栅电极的两个侧面和狭缝部的侧壁处的侧壁膜，并且填充狭缝部分的内部并在狭缝部分正下方覆盖栅极绝缘膜; 以及形成为覆盖栅电极和侧壁膜的层间绝缘膜。

8. 发明授权

US06236069B1 Insulated-gate thyristor 失效
标题翻译：绝缘栅晶闸管
公开(公告)号：US06236069B1
公开(公告)日：2001-05-22
申请号：US09102360
申请日：1998-06-23
申请人： Takashi Shinohe , Kazuya Nakayama , Minami Takeuchi , Masakazu Yamaguchi , Mitsuhiko Kitagawa , Ichiro Omura , Akio Nakagawa
发明人： Takashi Shinohe , Kazuya Nakayama , Minami Takeuchi , Masakazu Yamaguchi , Mitsuhiko Kitagawa , Ichiro Omura , Akio Nakagawa
IPC分类号： H01L2974
CPC分类号： H01L29/7455 , H01L29/42308 , H01L29/749
摘要： Disclosed herein is an insulated-gate thyristor comprising a base layer of a first conductivity type, having first and second major surfaces, a first main-electrode region of the first conductivity type, formed in the first major surface of the base layer, a second main-electrode region of a second conductivity type, formed in the second major surface of the base layer, at least a pair of grooves extending from the first main-electrode region into the base layer, and opposing each other and spaced apart by a predetermined distance, insulated gate electrodes formed within the grooves, and a turn-off insulated-gate transistor structure for releasing carriers of the second conductivity type from the base layer.
摘要翻译：本文公开了一种绝缘栅极晶闸管，其包括第一导电类型的基极层，具有第一和第二主表面，形成在基底层的第一主表面中的第一导电类型的第一主电极区域，第二导电类型的第二主表面形成在基底层的第二主表面的第二导电类型的主电极区域，至少一对从第一主电极区域延伸到基底层中并且彼此相对并间隔开预定的凹槽距离，形成在沟槽内的绝缘栅电极，以及用于从基层释放第二导电类型的载流子的关断绝缘栅晶体管结构。

9. 发明授权

US6057636A Micro power switch using a cold cathode and a driving method thereof 失效
标题翻译：使用冷阴极的微功率开关及其驱动方法
公开(公告)号：US6057636A
公开(公告)日：2000-05-02
申请号：US931417
申请日：1997-09-16
申请人： Tadashi Sakai , Tomio Ono , Naoshi Sakuma , Hiromichi Ohashi , Kazuya Nakayama
发明人： Tadashi Sakai , Tomio Ono , Naoshi Sakuma , Hiromichi Ohashi , Kazuya Nakayama
IPC分类号： H01J1/304 , H01J19/24 , H01J21/10 , H03K17/54 , H01J1/46 , H01J1/02 , H01J1/05
CPC分类号： H01J21/105 , H03K17/545
摘要： The present invention provides a micro power switch comprising a cold cathode for emitting electrons, an anode for capturing the electrons emitted from the cold cathode, and a control electrode for controlling an amount of the electrons emitted from the cold cathode, wherein the cold cathode is made of material having a smaller electron emission barrier than the control electrode, the anode is applied with a positive potential in relation to the cold cathode, and the control electrode is applied with a potential equal to or lower than a potential of the cold cathode.
摘要翻译：本发明提供了一种微功率开关，其包括用于发射电子的冷阴极，用于捕获从冷阴极发射的电子的阳极和用于控制从冷阴极发射的电子的量的控制电极，其中冷阴极为由具有比控制电极更小的电子发射势垒的材料制成，阳极相对于冷阴极施加正电位，并且控制电极施加等于或低于冷阴极电位的电位。

10. 发明授权

US5464994A Insulated-gate thyristor 失效
标题翻译：绝缘栅晶闸管
公开(公告)号：US5464994A
公开(公告)日：1995-11-07
申请号：US291754
申请日：1994-08-16
申请人： Takashi Shinohe , Kazuya Nakayama , Minami Takeuchi , Masakazu Yamaguchi , Mitsuhiko Kitagawa , Ichiro Omura , Akio Nakagawa
发明人： Takashi Shinohe , Kazuya Nakayama , Minami Takeuchi , Masakazu Yamaguchi , Mitsuhiko Kitagawa , Ichiro Omura , Akio Nakagawa
IPC分类号： H01L29/423 , H01L29/745 , H01L29/749 , H01L29/74
CPC分类号： H01L29/7455 , H01L29/42308 , H01L29/749
摘要： Disclosed herein is an insulated-gate thyristor comprising a base layer of a first conductivity type, having first and second major surfaces, a first main-electrode region of the first conductivity type, formed in the first major surface of the base layer, a second main-electrode region of a second conductivity type, formed in the second major surface of the base layer, at least a pair of grooves extending from the first main-electrode region into the base layer, and opposing each other and spaced apart by a predetermined distance, insulated gate electrodes formed within the grooves, and a turn-off insulated-gate transistor structure for releasing carriers of the second conductivity type from the base layer.
摘要翻译：本文公开了一种绝缘栅极晶闸管，其包括第一导电类型的基极层，具有第一和第二主表面，形成在基底层的第一主表面中的第一导电类型的第一主电极区域，第二导电类型的第二主表面形成在基底层的第二主表面的第二导电类型的主电极区域，至少一对从第一主电极区域延伸到基底层中并且彼此相对并间隔开预定的凹槽距离，形成在沟槽内的绝缘栅电极，以及用于从基层释放第二导电类型的载流子的关断绝缘栅晶体管结构。

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