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    • 5. 发明授权
    • Metaphysically addressed cache metadata
    • 形而上学的缓存元数据
    • US08370577B2
    • 2013-02-05
    • US12493165
    • 2009-06-26
    • Gad SheafferDavid CallahanJan GrayAli-Reza Adl-TabatabaiShlomo Raikin
    • Gad SheafferDavid CallahanJan GrayAli-Reza Adl-TabatabaiShlomo Raikin
    • G06F12/00
    • G06F17/30997G06F12/0802G06F12/109
    • Storing metadata that is disjoint from corresponding data by storing the metadata to the same address as the corresponding data but in a different address space. A metadata store instruction includes a storage address for the metadata. The storage address is the same address as that for data corresponding to the metadata, but the storage address when used for the metadata is implemented in a metadata address space while the storage address, when used for the corresponding data is implemented in a different data address space. As a result of executing the metadata store instruction, the metadata is stored at the storage address. A metadata load instruction includes the storage address for the metadata. As a result of executing the metadata load instruction, the metadata stored at the address is received. Some embodiments may further implement a metadata clear instruction which clears any entries in the metadata address space.
    • 通过将元数据存储到与相应数据相同的地址但在不同的地址空间中,存储与相应数据不相关的元数据。 元数据存储指令包括元数据的存储地址。 存储地址与对应于元数据的数据的地址相同,但是当用于元数据的存储地址被实现在元数据地址空间中,而当用于相应数据的存储地址被实现在不同的数据地址 空间。 作为执行元数据存储指令的结果,元数据被存储在存储地址处。 元数据加载指令包括元数据的存储地址。 作为执行元数据加载指令的结果,接收存储在地址处的元数据。 一些实施例可以进一步实现清除元数据地址空间中的任何条目的元数据清除指令。
    • 7. 发明申请
    • USING BUFFERED STORES OR MONITORING TO FILTER REDUNDANT TRANSACTIONAL ACCESSES AND MECHANISMS FOR MAPPING DATA TO BUFFERED METADATA
    • 使用缓冲存储器或监视过滤冗余交易访问和将数据映射到缓冲元数据的机制
    • US20110145516A1
    • 2011-06-16
    • US12638098
    • 2009-12-15
    • Ali-Reza Adl-TabatabaiGad SheafferBratin SahaJan GrayDavid CallahanBurton SmithGraefe Goetz
    • Ali-Reza Adl-TabatabaiGad SheafferBratin SahaJan GrayDavid CallahanBurton SmithGraefe Goetz
    • G06F12/00
    • G06F9/522G06F8/458G06F9/52G06F11/3471G06F2201/865G06F2201/87
    • A method and apparatus for accelerating a Software Transactional Memory (STM) system is herein described. A data object and metadata for the data object may each be associated with a filter, such as a hardware monitor or ephemerally held filter information. The filter is in a first, default state when no access, such as a read, from the data object has occurred during a pendancy of a transaction. Upon encountering a first access to the metadata, such as a first read, access barrier operations, such as logging of the metadata; setting a read monitor; or updating ephemeral filter information with an ephemeral/buffered store operation, are performed. Upon a subsequent/redundant access to the metadata, such as a second read, access barrier operations are elided to accelerate the subsequent access based on the filter being set to the second state to indicate a previous access occurred. Additionally, mapping of data objects to ephemeral information may be provided by software, such as through a pointer to the ephemeral information associated with the data object; an offset from a base address of the data object to the ephemeral information included associated with the data object; an index into a segment containing the ephemeral information associated with the data object; mapping the data object to the ephemeral information utilizing address arithmetic; and a hash that maps the data object to ephemeral information.
    • 这里描述了用于加速软件事务存储器(STM)系统的方法和装置。 数据对象和数据对象的元数据可以分别与诸如硬件监视器或者瞬时保持的过滤器信息的过滤器相关联。 过滤器处于第一个默认状态,当事务的挂起期间没有发生来自数据对象的访问,例如读取。 在遇到元数据的首次访问时,例如第一读取,访问屏障操作,诸如记录元数据; 设置一个读取监视器; 或者用临时/缓冲存储操作来更新临时过滤器信息。 在对诸如第二读取的元数据的后续/冗余访问(例如第二读取)时,消除访问屏障操作以基于被设置为第二状态的过滤器来加速后续访问,以指示先前的访问发生。 另外,数据对象到短暂信息的映射可以由软件提供,例如通过指向与数据对象相关联的短暂信息的指针; 从数据对象的基地址到包括与数据对象相关联的临时信息的偏移; 指向包含与数据对象相关联的短暂信息的段的索引; 使用地址算术将数据对象映射到临时信息; 以及将数据对象映射到临时信息的散列。
    • 8. 发明申请
    • WAIT LOSS SYNCHRONIZATION
    • 等待丢失同步
    • US20100332753A1
    • 2010-12-30
    • US12493163
    • 2009-06-26
    • Jan GrayDavid CallahanBurton Jordan SmithGad SheafferAli-Reza Adl-TabatabaiBratin Saha
    • Jan GrayDavid CallahanBurton Jordan SmithGad SheafferAli-Reza Adl-TabatabaiBratin Saha
    • G06F12/02G06F1/32G06F12/08
    • G06F12/0831G06F1/3225
    • Synchronizing threads on loss of memory access monitoring. Using a processor level instruction included as part of an instruction set architecture for a processor, a read, or write monitor to detect writes, or reads or writes respectively from other agents on a first set of one or more memory locations and a read, or write monitor on a second set of one or more different memory locations are set. A processor level instruction is executed, which causes the processor to suspend executing instructions and optionally to enter a low power mode pending loss of a read or write monitor for the first or second set of one or more memory locations. A conflicting access is detected on the first or second set of one or more memory locations or a timeout is detected. As a result, the method includes resuming execution of instructions.
    • 在内存访问监控丢失时同步线程。 使用处理器级指令作为处理器,读取或写入监视器的指令集体系结构的一部分而被包括,以分别从第一组一个或多个存储器位置和读取的或其他存储器位置的其他代理检测写入或读取或写入 设置在第二组一个或多个不同存储单元上的写监视器。 执行处理器级指令,这使得处理器暂停执行指令,并且可选地进入低功率模式,等待丢失第一或第二组一个或多个存储器位置的读或写监视器。 在一个或多个存储器位置的第一或第二组上检测到冲突的访问,或者检测到超时。 结果,该方法包括恢复指令的执行。
    • 10. 发明授权
    • Private memory regions and coherence optimizations
    • 私人记忆区域和一致性优化
    • US08812796B2
    • 2014-08-19
    • US12493164
    • 2009-06-26
    • Jan GrayDavid CallahanBurton Jordan SmithGad SheafferAli-Reza Adl-Tabatabai
    • Jan GrayDavid CallahanBurton Jordan SmithGad SheafferAli-Reza Adl-Tabatabai
    • G06F12/00G06F13/00G06F13/28G06F9/46
    • G06F12/0835G06F9/467G06F12/0811G06F12/0831G06F2209/521
    • Private or shared read-only memory regions. One embodiment may be practiced in a computing environment including a plurality of agents. A method includes acts for declaring one or more memory regions private to a particular agent or shared read only amongst agents by having software utilize processor level instructions to specify to hardware the private or shared read only memory address regions. The method includes an agent executing a processor level instruction to specify one or more memory regions as private to the agent or shared read-only amongst a plurality of agents. As a result of an agent executing a processor level instruction to specify one or more memory regions as private to the agent or shared read-only amongst a plurality of agents, a hardware component monitoring the one or more memory regions for conflicting accesses or prevents conflicting accesses on the one or more memory regions.
    • 专用或共享只读存储器区域。 一个实施例可以在包括多个代理的计算环境中实践。 一种方法包括通过使软件利用处理器级指令向硬件指定私有或共享的只读存储器地址区域来将用于声明特定代理私有的一个或多个存储器区域或仅在代理之间共享的操作。 该方法包括执行处理器级别指令的代理,以指定对代理私有的一个或多个存储器区域或者在多个代理之间共享只读。 作为代理执行处理器级别指令的结果,所述处理器级指令指定一个或多个存储器区域对于所述代理是专用的,或者在多个代理之间共享为只读存储器区域,硬件组件监视所述一个或多个存储器区域以进行冲突访问或防止冲突 访问一个或多个存储器区域。