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1. 发明申请

US20100332753A1 WAIT LOSS SYNCHRONIZATION 有权
标题翻译：等待丢失同步
公开(公告)号：US20100332753A1
公开(公告)日：2010-12-30
申请号：US12493163
申请日：2009-06-26
申请人： Jan Gray , David Callahan , Burton Jordan Smith , Gad Sheaffer , Ali-Reza Adl-Tabatabai , Bratin Saha
发明人： Jan Gray , David Callahan , Burton Jordan Smith , Gad Sheaffer , Ali-Reza Adl-Tabatabai , Bratin Saha
IPC分类号： G06F12/02 , G06F1/32 , G06F12/08
CPC分类号： G06F12/0831 , G06F1/3225
摘要： Synchronizing threads on loss of memory access monitoring. Using a processor level instruction included as part of an instruction set architecture for a processor, a read, or write monitor to detect writes, or reads or writes respectively from other agents on a first set of one or more memory locations and a read, or write monitor on a second set of one or more different memory locations are set. A processor level instruction is executed, which causes the processor to suspend executing instructions and optionally to enter a low power mode pending loss of a read or write monitor for the first or second set of one or more memory locations. A conflicting access is detected on the first or second set of one or more memory locations or a timeout is detected. As a result, the method includes resuming execution of instructions.
摘要翻译：在内存访问监控丢失时同步线程。使用处理器级指令作为处理器，读取或写入监视器的指令集体系结构的一部分而被包括，以分别从第一组一个或多个存储器位置和读取的或其他存储器位置的其他代理检测写入或读取或写入设置在第二组一个或多个不同存储单元上的写监视器。执行处理器级指令，这使得处理器暂停执行指令，并且可选地进入低功率模式，等待丢失第一或第二组一个或多个存储器位置的读或写监视器。在一个或多个存储器位置的第一或第二组上检测到冲突的访问，或者检测到超时。结果，该方法包括恢复指令的执行。

2. 发明授权

US08161247B2 Wait loss synchronization 有权
标题翻译：等待丢失同步
公开(公告)号：US08161247B2
公开(公告)日：2012-04-17
申请号：US12493163
申请日：2009-06-26
申请人： Jan Gray , David Callahan , Burton Jordan Smith , Gad Sheaffer , Ali-Reza Adl-Tabatabai , Bratin Saha
发明人： Jan Gray , David Callahan , Burton Jordan Smith , Gad Sheaffer , Ali-Reza Adl-Tabatabai , Bratin Saha
IPC分类号： G06F12/00 , G06F13/00 , G06F13/28 , G06F1/00 , G06F1/26 , G06F1/32 , G06F9/46
CPC分类号： G06F12/0831 , G06F1/3225
摘要： Synchronizing threads on loss of memory access monitoring. Using a processor level instruction included as part of an instruction set architecture for a processor, a read, or write monitor to detect writes, or reads or writes respectively from other agents on a first set of one or more memory locations and a read, or write monitor on a second set of one or more different memory locations are set. A processor level instruction is executed, which causes the processor to suspend executing instructions and optionally to enter a low power mode pending loss of a read or write monitor for the first or second set of one or more memory locations. A conflicting access is detected on the first or second set of one or more memory locations or a timeout is detected. As a result, the method includes resuming execution of instructions.
摘要翻译：在内存访问监控丢失时同步线程。使用处理器级指令作为处理器，读取或写入监视器的指令集体系结构的一部分而被包括，以分别从第一组一个或多个存储器位置和读取的或其他存储器位置的其他代理检测写入或读取或写入设置在第二组一个或多个不同存储单元上的写监视器。执行处理器级指令，这使得处理器暂停执行指令，并且可选地进入低功率模式，等待丢失第一或第二组一个或多个存储器位置的读或写监视器。在一个或多个存储器位置的第一或第二组上检测到冲突的访问，或者检测到超时。结果，该方法包括恢复指令的执行。

3. 发明授权

US08356166B2 Minimizing code duplication in an unbounded transactional memory system by using mode agnostic transactional read and write barriers 有权
标题翻译：通过使用模式不可知事务读写障碍来最大限度地减少无界事务内存系统中的代码重复
公开(公告)号：US08356166B2
公开(公告)日：2013-01-15
申请号：US12493168
申请日：2009-06-26
申请人： Ali-Reza Adl-Tabatabai , Bratin Saha , Gad Sheaffer , Vadim Bassin , Robert Y. Geva , Martin Taillefer , Darek Mihocka , Burton Jordan Smith , Jan Gray
发明人： Ali-Reza Adl-Tabatabai , Bratin Saha , Gad Sheaffer , Vadim Bassin , Robert Y. Geva , Martin Taillefer , Darek Mihocka , Burton Jordan Smith , Jan Gray
IPC分类号： G06F15/00 , G06F9/00 , G06F9/44 , G06F7/38
CPC分类号： G06F9/3004 , G06F9/30076 , G06F9/30087 , G06F9/30101 , G06F9/30181 , G06F9/30189 , G06F9/3857 , G06F9/467
摘要： Minimizing code duplication in an unbounded transactional memory system. A computing apparatus including one or more processors in which it is possible to use a set of common mode-agnostic TM barrier sequences that runs on legacy ISA and extended ISA processors, and that employs hardware filter indicators (when available) to filter redundant applications of TM barriers, and that enables a compiled binary representation of the subject code to run correctly in any of the currently implemented set of transactional memory execution modes, including running the code outside of a transaction, and that enables the same compiled binary to continue to work with future TM implementations which may introduce as yet unknown future TM execution modes.
摘要翻译：最大限度地减少无界事务内存系统中的代码重复。一种包括一个或多个处理器的计算设备，其中可以使用在传统ISA和扩展ISA处理器上运行的一组共同模式不可知TM屏障序列，并且采用硬件滤波器指示器（当可用时）可以过滤冗余应用 TM屏障，并且使得主体代码的编译二进制表示可以在任何当前实现的事务存储器执行模式集中运行，包括在事务之外运行代码，并且使得相同的编译的二进制文件能够继续工作与未来的TM实现可能会引入未知的未来TM执行模式。

4. 发明申请

US20100332808A1 MINIMIZING CODE DUPLICATION IN AN UNBOUNDED TRANSACTIONAL MEMORY SYSTEM 有权
标题翻译：在不必要的交易记忆系统中最小化代码重复
公开(公告)号：US20100332808A1
公开(公告)日：2010-12-30
申请号：US12493168
申请日：2009-06-26
申请人： Ali-Reza Adl-Tabatabai , Bratin Saha , Gad Sheaffer , Vadim Bassin , Robert Y. Geva , Martin Taillefer , Darek Mihocka , Burton Jordan Smith , Jan Gray
发明人： Ali-Reza Adl-Tabatabai , Bratin Saha , Gad Sheaffer , Vadim Bassin , Robert Y. Geva , Martin Taillefer , Darek Mihocka , Burton Jordan Smith , Jan Gray
IPC分类号： G06F9/30 , G06F9/312
CPC分类号： G06F9/3004 , G06F9/30076 , G06F9/30087 , G06F9/30101 , G06F9/30181 , G06F9/30189 , G06F9/3857 , G06F9/467
摘要： Minimizing code duplication in an unbounded transactional memory system. A computing apparatus including one or more processors in which it is possible to use a set of common mode-agnostic TM barrier sequences that runs on legacy ISA and extended ISA processors, and that employs hardware filter indicators (when available) to filter redundant applications of TM barriers, and that enables a compiled binary representation of the subject code to run correctly in any of the currently implemented set of transactional memory execution modes, including running the code outside of a transaction, and that enables the same compiled binary to continue to work with future TM implementations which may introduce as yet unknown future TM execution modes.
摘要翻译：最大限度地减少无界事务内存系统中的代码重复。一种包括一个或多个处理器的计算设备，其中可以使用在传统ISA和扩展ISA处理器上运行的一组共同模式不可知TM屏障序列，并且采用硬件滤波器指示器（当可用时）可以过滤冗余应用 TM屏障，并且使得主体代码的编译二进制表示可以在任何当前实现的事务存储器执行模式集中运行，包括在事务之外运行代码，并且使得相同的编译的二进制文件能够继续工作与未来的TM实现可能会引入未知的未来TM执行模式。

5. 发明申请

US20110145516A1 USING BUFFERED STORES OR MONITORING TO FILTER REDUNDANT TRANSACTIONAL ACCESSES AND MECHANISMS FOR MAPPING DATA TO BUFFERED METADATA 有权
标题翻译：使用缓冲存储器或监视过滤冗余交易访问和将数据映射到缓冲元数据的机制
公开(公告)号：US20110145516A1
公开(公告)日：2011-06-16
申请号：US12638098
申请日：2009-12-15
申请人： Ali-Reza Adl-Tabatabai , Gad Sheaffer , Bratin Saha , Jan Gray , David Callahan , Burton Smith , Graefe Goetz
发明人： Ali-Reza Adl-Tabatabai , Gad Sheaffer , Bratin Saha , Jan Gray , David Callahan , Burton Smith , Graefe Goetz
IPC分类号： G06F12/00
CPC分类号： G06F9/522 , G06F8/458 , G06F9/52 , G06F11/3471 , G06F2201/865 , G06F2201/87
摘要： A method and apparatus for accelerating a Software Transactional Memory (STM) system is herein described. A data object and metadata for the data object may each be associated with a filter, such as a hardware monitor or ephemerally held filter information. The filter is in a first, default state when no access, such as a read, from the data object has occurred during a pendancy of a transaction. Upon encountering a first access to the metadata, such as a first read, access barrier operations, such as logging of the metadata; setting a read monitor; or updating ephemeral filter information with an ephemeral/buffered store operation, are performed. Upon a subsequent/redundant access to the metadata, such as a second read, access barrier operations are elided to accelerate the subsequent access based on the filter being set to the second state to indicate a previous access occurred. Additionally, mapping of data objects to ephemeral information may be provided by software, such as through a pointer to the ephemeral information associated with the data object; an offset from a base address of the data object to the ephemeral information included associated with the data object; an index into a segment containing the ephemeral information associated with the data object; mapping the data object to the ephemeral information utilizing address arithmetic; and a hash that maps the data object to ephemeral information.
摘要翻译：这里描述了用于加速软件事务存储器（STM）系统的方法和装置。数据对象和数据对象的元数据可以分别与诸如硬件监视器或者瞬时保持的过滤器信息的过滤器相关联。过滤器处于第一个默认状态，当事务的挂起期间没有发生来自数据对象的访问，例如读取。在遇到元数据的首次访问时，例如第一读取，访问屏障操作，诸如记录元数据; 设置一个读取监视器; 或者用临时/缓冲存储操作来更新临时过滤器信息。在对诸如第二读取的元数据的后续/冗余访问（例如第二读取）时，消除访问屏障操作以基于被设置为第二状态的过滤器来加速后续访问，以指示先前的访问发生。另外，数据对象到短暂信息的映射可以由软件提供，例如通过指向与数据对象相关联的短暂信息的指针; 从数据对象的基地址到包括与数据对象相关联的临时信息的偏移; 指向包含与数据对象相关联的短暂信息的段的索引; 使用地址算术将数据对象映射到临时信息; 以及将数据对象映射到临时信息的散列。

6. 发明申请

US20100218195A1 Software filtering in a transactional memory system 有权
标题翻译：事务存储系统中的软件过滤
公开(公告)号：US20100218195A1
公开(公告)日：2010-08-26
申请号：US12653471
申请日：2009-12-15
申请人： Ali-Reza Adl-Tabatabai , David Callahan , Jan Gray , Vinod Grover , Bratin Saha , Gad Sheaffer
发明人： Ali-Reza Adl-Tabatabai , David Callahan , Jan Gray , Vinod Grover , Bratin Saha , Gad Sheaffer
IPC分类号： G06F9/46
CPC分类号： G06F9/522 , G06F8/458 , G06F9/467
摘要： A method and apparatus for utilizing hardware mechanisms of a transactional memory system is herein described. Various embodiments relate to software-based filtering of operations from read and write barriers and read isolation barriers during transactional execution. Other embodiments relate to software-implemented read barrier processing to accelerate strong atomicity. Other embodiments are also described and claimed.
摘要翻译：这里描述了一种利用事务存储器系统的硬件机制的方法和装置。各种实施例涉及在事务执行期间从读写障碍和读隔离屏障的基于软件的操作过滤。其他实施例涉及软件实现的读屏障处理以加速强原子性。还描述和要求保护其他实施例。

7. 发明授权

US08719514B2 Software filtering in a transactional memory system 有权
标题翻译：事务存储系统中的软件过滤
公开(公告)号：US08719514B2
公开(公告)日：2014-05-06
申请号：US12653471
申请日：2009-12-15
申请人： Ali-Reza Adl-Tabatabai , David Callahan , Jan Gray , Vinod Grover , Bratin Saha , Gad Sheaffer
发明人： Ali-Reza Adl-Tabatabai , David Callahan , Jan Gray , Vinod Grover , Bratin Saha , Gad Sheaffer
IPC分类号： G06F13/00
CPC分类号： G06F9/522 , G06F8/458 , G06F9/467
摘要： A method and apparatus for utilizing hardware mechanisms of a transactional memory system is herein described. Various embodiments relate to software-based filtering of operations from read and write barriers and read isolation barriers during transactional execution. Other embodiments relate to software-implemented read barrier processing to accelerate strong atomicity. Other embodiments are also described and claimed.
摘要翻译：这里描述了一种利用事务存储器系统的硬件机制的方法和装置。各种实施例涉及在事务执行期间从读写障碍和读隔离屏障的基于软件的操作过滤。其他实施例涉及软件实现的读屏障处理以加速强原子性。还描述和要求保护其他实施例。

8. 发明授权

US08812796B2 Private memory regions and coherence optimizations 有权
标题翻译：私人记忆区域和一致性优化
公开(公告)号：US08812796B2
公开(公告)日：2014-08-19
申请号：US12493164
申请日：2009-06-26
申请人： Jan Gray , David Callahan , Burton Jordan Smith , Gad Sheaffer , Ali-Reza Adl-Tabatabai
发明人： Jan Gray , David Callahan , Burton Jordan Smith , Gad Sheaffer , Ali-Reza Adl-Tabatabai
IPC分类号： G06F12/00 , G06F13/00 , G06F13/28 , G06F9/46
CPC分类号： G06F12/0835 , G06F9/467 , G06F12/0811 , G06F12/0831 , G06F2209/521
摘要： Private or shared read-only memory regions. One embodiment may be practiced in a computing environment including a plurality of agents. A method includes acts for declaring one or more memory regions private to a particular agent or shared read only amongst agents by having software utilize processor level instructions to specify to hardware the private or shared read only memory address regions. The method includes an agent executing a processor level instruction to specify one or more memory regions as private to the agent or shared read-only amongst a plurality of agents. As a result of an agent executing a processor level instruction to specify one or more memory regions as private to the agent or shared read-only amongst a plurality of agents, a hardware component monitoring the one or more memory regions for conflicting accesses or prevents conflicting accesses on the one or more memory regions.
摘要翻译：专用或共享只读存储器区域。一个实施例可以在包括多个代理的计算环境中实践。一种方法包括通过使软件利用处理器级指令向硬件指定私有或共享的只读存储器地址区域来将用于声明特定代理私有的一个或多个存储器区域或仅在代理之间共享的操作。该方法包括执行处理器级别指令的代理，以指定对代理私有的一个或多个存储器区域或者在多个代理之间共享只读。作为代理执行处理器级别指令的结果，所述处理器级指令指定一个或多个存储器区域对于所述代理是专用的，或者在多个代理之间共享为只读存储器区域，硬件组件监视所述一个或多个存储器区域以进行冲突访问或防止冲突访问一个或多个存储器区域。

9. 发明申请

US20100332771A1 PRIVATE MEMORY REGIONS AND COHERENCE OPTIMIZATIONS 有权
标题翻译：私人存储区域和协调优化
公开(公告)号：US20100332771A1
公开(公告)日：2010-12-30
申请号：US12493164
申请日：2009-06-26
申请人： Jan Gray , David Callahan , Burton Jordan Smith , Gad Sheaffer , Ali-Reza Adl-Tabatabai
发明人： Jan Gray , David Callahan , Burton Jordan Smith , Gad Sheaffer , Ali-Reza Adl-Tabatabai
IPC分类号： G06F12/00
CPC分类号： G06F12/0835 , G06F9/467 , G06F12/0811 , G06F12/0831 , G06F2209/521
摘要： Private or shared read-only memory regions. One embodiment may be practiced in a computing environment including a plurality of agents. A method includes acts for declaring one or more memory regions private to a particular agent or shared read only amongst agents by having software utilize processor level instructions to specify to hardware the private or shared read only memory address regions. The method includes an agent executing a processor level instruction to specify one or more memory regions as private to the agent or shared read-only amongst a plurality of agents. As a result of an agent executing a processor level instruction to specify one or more memory regions as private to the agent or shared read-only amongst a plurality of agents, a hardware component monitoring the one or more memory regions for conflicting accesses or prevents conflicting accesses on the one or more memory regions.
摘要翻译：专用或共享只读存储器区域。一个实施例可以在包括多个代理的计算环境中实践。一种方法包括通过使软件利用处理器级指令向硬件指定私有或共享的只读存储器地址区域来将用于声明特定代理私有的一个或多个存储器区域或仅在代理之间共享的操作。该方法包括执行处理器级别指令的代理，以指定对代理私有的一个或多个存储器区域或者在多个代理之间共享只读。作为代理执行处理器级别指令的结果，所述处理器级指令指定一个或多个存储器区域对于所述代理是专用的，或者在多个代理之间共享为只读存储器区域，硬件组件监视所述一个或多个存储器区域以进行冲突访问或防止冲突访问一个或多个存储器区域。

10. 发明授权

US09280397B2 Using buffered stores or monitoring to filter redundant transactional accesses and mechanisms for mapping data to buffered metadata 有权
标题翻译：使用缓冲存储或监视来过滤冗余事务访问和机制，用于将数据映射到缓冲元数据
公开(公告)号：US09280397B2
公开(公告)日：2016-03-08
申请号：US12638098
申请日：2009-12-15
申请人： Ali-Reza Adl-Tabatabai , Gad Sheaffer , Bratin Saha , Jan Gray , David Callahan , Burton Smith , Graefe Goetz
发明人： Ali-Reza Adl-Tabatabai , Gad Sheaffer , Bratin Saha , Jan Gray , David Callahan , Burton Smith , Graefe Goetz
IPC分类号： G06F12/00 , G06F9/52 , G06F9/45 , G06F11/34
CPC分类号： G06F9/522 , G06F8/458 , G06F9/52 , G06F11/3471 , G06F2201/865 , G06F2201/87
摘要： A method and apparatus for accelerating a Software Transactional Memory (STM) system is herein described. A data object and metadata for the data object may each be associated with a filter, such as a hardware monitor or ephemerally held filter information. The filter is in a first, default state when no access, such as a read, from the data object has occurred during a pendancy of a transaction. Upon encountering a first access to the metadata, such as a first read, access barrier operations, such as logging of the metadata; setting a read monitor; or updating ephemeral filter information with an ephemeral/buffered store operation, are performed. Upon a subsequent/redundant access to the metadata, such as a second read, access barrier operations are elided to accelerate the subsequent access based on the filter being set to the second state to indicate a previous access occurred. Additionally, mapping of data objects to ephemeral information may be provided by software, such as through a pointer to the ephemeral information associated with the data object; an offset from a base address of the data object to the ephemeral information included associated with the data object; an index into a segment containing the ephemeral information associated with the data object; mapping the data object to the ephemeral information utilizing address arithmetic; and a hash that maps the data object to ephemeral information.
摘要翻译：这里描述了用于加速软件事务存储器（STM）系统的方法和装置。数据对象和数据对象的元数据可以分别与诸如硬件监视器或者瞬时保持的过滤器信息的过滤器相关联。过滤器处于第一个默认状态，当事务的挂起期间没有发生来自数据对象的访问，例如读取。在遇到元数据的首次访问时，例如第一读取，访问屏障操作，诸如记录元数据; 设置一个读取监视器; 或者用临时/缓冲存储操作来更新临时过滤器信息。在对诸如第二读取的元数据的后续/冗余访问（例如第二读取）时，消除访问屏障操作以基于被设置为第二状态的过滤器来加速后续访问，以指示先前的访问发生。另外，数据对象到短暂信息的映射可以由软件提供，例如通过指向与数据对象相关联的短暂信息的指针; 从数据对象的基地址到包括与数据对象相关联的临时信息的偏移; 指向包含与数据对象相关联的短暂信息的段的索引; 使用地址算术将数据对象映射到临时信息; 以及将数据对象映射到临时信息的散列。

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