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1. 发明授权

US07183575B2 High reverse voltage silicon carbide diode and method of manufacturing the same high reverse voltage silicon carbide diode 有权
标题翻译：高反向电压碳化硅二极管和制造相同高反向碳化硅二极管的方法
公开(公告)号：US07183575B2
公开(公告)日：2007-02-27
申请号：US10368016
申请日：2003-02-19
申请人： Yoshio Shimoida , Saichirou Kaneko , Hideaki Tanaka , Masakatsu Hoshi , Kraisom Throngnumchai , Teruyoshi Mihara , Tetsuya Hayashi
发明人： Yoshio Shimoida , Saichirou Kaneko , Hideaki Tanaka , Masakatsu Hoshi , Kraisom Throngnumchai , Teruyoshi Mihara , Tetsuya Hayashi
IPC分类号： H01L29/15
CPC分类号： H01L29/267 , H01L29/1608 , H01L29/861
摘要： A high reverse voltage diode includes a hetero junction made up from a silicon carbide base layer, which constitutes a first semiconductor base layer, and a polycrystalline silicon layer, which constitutes a second semiconductor layer, and whose band gap is different from that of the silicon carbide base layer. A low concentration N type polycrystalline silicon layer is deposited on a first main surface side of the silicon carbide base layer, and a metal electrode is formed on a second main surface side of the silicon carbide base layer which is opposite to the first main surface side thereof.
摘要翻译：高反向电压二极管包括由构成第一半导体基底层的碳化硅基底层和构成第二半导体层的多晶硅层构成的异质结，并且其带隙与硅的带隙不同碳化物基层。在碳化硅基底层的第一主表面侧沉积低浓度N型多晶硅层，在与第一主表面侧相反的碳化硅基底层的第二主表面侧上形成金属电极其中。

2. 发明授权

US07217950B2 Insulated gate tunnel-injection device having heterojunction and method for manufacturing the same 有权
标题翻译：具有异质结的绝缘栅隧道注入装置及其制造方法
公开(公告)号：US07217950B2
公开(公告)日：2007-05-15
申请号：US10682154
申请日：2003-10-10
申请人： Saichirou Kaneko , Masakatsu Hoshi , Kraisorn Throngnumchai , Tetsuya Hayashi , Hideaki Tanaka , Teruyoshi Mihara
发明人： Saichirou Kaneko , Masakatsu Hoshi , Kraisorn Throngnumchai , Tetsuya Hayashi , Hideaki Tanaka , Teruyoshi Mihara
IPC分类号： H01L29/78
CPC分类号： H01L29/7802 , H01L29/0653 , H01L29/0878 , H01L29/1602 , H01L29/1608 , H01L29/165 , H01L29/267 , H01L29/66068 , H01L29/772 , H01L29/7813 , H01L29/7828
摘要： The present invention-provides a tunnel-injection device which encompasses, a reception layer made of a first semiconductor, a barrier-forming layer made of a second semiconductor having a bandgap-narrower than the first semiconductor, being in metallurgical contact with the reception layer, a gate insulating film disposed on the barrier-forming layer. The gate electrode controls the width of the barrier generated at the heterojunction interface between the reception layer and the barrier-forming layer so as to change the tunneling probability of carriers through the barrier. The device further encompasses a carrier receiving region being contact with the reception layer and a carrier-supplying region being contact with the barrier-forming layer.
摘要翻译：本发明提供了一种隧道注入装置，其包括由第一半导体制成的接收层，由具有窄于第一半导体带隙的第二半导体制成的阻挡层形成层与接收层冶金接触设置在阻挡层形成层上的栅极绝缘膜。栅电极控制在接收层和阻挡层形成层之间的异质结界面处产生的势垒的宽度，以便改变载流子穿过屏障的隧穿概率。该装置还包括与接收层接触的载体接收区域和与阻挡层形成层接触的载体供给区域。

3. 发明授权

US06737677B2 Wide bandgap semiconductor device and method for manufacturing the same 有权
标题翻译：宽带隙半导体器件及其制造方法
公开(公告)号：US06737677B2
公开(公告)日：2004-05-18
申请号：US10410188
申请日：2003-04-10
申请人： Yoshio Shimoida , Saichirou Kaneko , Hideaki Tanaka , Masakatsu Hoshi
发明人： Yoshio Shimoida , Saichirou Kaneko , Hideaki Tanaka , Masakatsu Hoshi
IPC分类号： H01L310312
CPC分类号： H01L29/66068 , H01L21/0465 , H01L21/049 , H01L21/8213 , H01L27/0605
摘要： The present invention provides a wide bandgap semiconductor device encompassing: (a) a drift layer of a first conductivity type made of a wide bandgap semiconductor material; (b) a body region of a second conductivity type made of the wide bandgap semiconductor material, disposed at the top surface of and in the drift layer; (c) a source region of the first conductivity type disposed in the body region; (d) a channel layer of the first conductivity type, disposed in the body region neighboring to the source region and further disposed in the drift layer; and (e) a gate electrode including semiconductor layer at the bottom so that the semiconductor layer directly contact with the top surface of the channel layer, the semiconductor layer made of a semiconductor material having a different bandgap energy from that of the wide bandgap semiconductor material.
摘要翻译：本发明提供一种宽带隙半导体器件，其包括：（a）由宽带隙半导体材料制成的第一导电类型的漂移层; （b）由宽带隙半导体材料制成的第二导电类型的体区，设置在漂移层的顶表面上; （c）设置在身体区域中的第一导电类型的源极区域; （d）第一导电类型的沟道层，设置在与源极区相邻的体区中，并且还设置在漂移层中; 和（e）在底部包括半导体层的栅电极，使得半导体层与沟道层的顶表面直接接触，由具有与宽带隙半导体材料的能隙不同的带隙能量的半导体材料制成的半导体层。

4. 发明申请

US20050133794A1 Semiconductor device 有权
标题翻译：半导体器件
公开(公告)号：US20050133794A1
公开(公告)日：2005-06-23
申请号：US11012205
申请日：2004-12-16
申请人： Tetsuya Hayashi , Masakatsu Hoshi , Saichirou Kaneko , Hideaki Tanaka
发明人： Tetsuya Hayashi , Masakatsu Hoshi , Saichirou Kaneko , Hideaki Tanaka
IPC分类号： H01L21/28 , H01L21/336 , H01L27/04 , H01L29/12 , H01L29/15 , H01L29/24 , H01L29/267 , H01L29/47 , H01L29/78
CPC分类号： H01L29/7806 , H01L29/1608 , H01L29/165 , H01L29/47 , H01L29/66068 , H01L29/7802 , H01L29/7803 , H01L29/7813 , H01L29/7817 , H01L29/782 , H01L29/7828
摘要： A semiconductor device includes a heterojunction semiconductor region 9, which forms a heterojunction with a drain region 2. The heterojunction semiconductor region 9 is connected to a source electrode 7, and has a band gap different from a band gap of a semiconductor substrate constituting the drain region 2. It is possible to set the size of an energy barrier against conduction electrons, which is formed between the drain region 2 and the heterojunction semiconductor region 9, into a desired size by changing the conductivity type or the impurity density of the heterojunction semiconductor region 9. This is a characteristic not found in a Schottky junction, in which the size of the energy barrier is inherently determined by a work function of a metal material. It is easy to achieve optimal design of a passive element in response to a withstand voltage system of a MOSFET as a switching element. It is also possible to suppress diffusion potential in a reverse conduction mode and to improve a degree of integration per unit area. As a result, it is possible to reduce the size of elements and to simplify manufacturing processes thereof.
摘要翻译：半导体器件包括异质结半导体区域9，其与漏极区域2形成异质结。异质结半导体区域9连接到源电极7，并且具有与构成漏极的半导体衬底的带隙不同的带隙可以通过改变异质结半导体的导电类型或杂质浓度来将能量势垒的大小与形成在漏极区域2和异质结半导体区域9之间的传导电子设置成所需的尺寸这是肖特基结中没有发现的特征，其中能量势垒的尺寸固有地由金属材料的功函数决定。响应MOSFET的耐压系统作为开关元件，很容易实现无源元件的最佳设计。也可以抑制反向导通模式的扩散电位，提高单位面积的积分度。结果，可以减小元件的尺寸并简化其制造工艺。

5. 发明申请

US20050045892A1 Semiconductor device and method of manufacturing the same 有权
标题翻译：半导体装置及其制造方法
公开(公告)号：US20050045892A1
公开(公告)日：2005-03-03
申请号：US10898224
申请日：2004-07-26
申请人： Tetsuya Hayashi , Hideaki Tanaka , Masakatsu Hoshi , Saichirou Kaneko
发明人： Tetsuya Hayashi , Hideaki Tanaka , Masakatsu Hoshi , Saichirou Kaneko
IPC分类号： H01L21/04 , H01L29/24 , H01L29/739 , H01L29/78 , H01L29/808 , H01L29/861 , H01L29/872 , H01L29/15 , H01L21/00
CPC分类号： H01L29/7805 , H01L21/046 , H01L29/1608 , H01L29/165 , H01L29/66068 , H01L29/7395 , H01L29/7802 , H01L29/7827 , H01L29/7828 , H01L29/8083 , H01L29/861 , H01L29/872
摘要： An aspect of the present invention provides a semiconductor device that includes a first semiconductor region of a first conductivity type and a second semiconductor region of a second conductivity type, having a different band gap from the first semiconductor region and forming a heterojunction with the first semiconductor region.
摘要翻译：本发明的一个方面提供了一种半导体器件，其包括第一导电类型的第一半导体区域和第二导电类型的第二半导体区域，其具有与第一半导体区域不同的带隙并与第一半导体形成异质结地区。

6. 发明授权

US07378325B2 Semiconductor device and manufacturing method thereof 失效
标题翻译：半导体装置及其制造方法
公开(公告)号：US07378325B2
公开(公告)日：2008-05-27
申请号：US11438347
申请日：2006-05-23
申请人： Saichirou Kaneko , Masakatsu Hoshi , Yoshinori Murakami , Tetsuya Hayashi , Hideaki Tanaka
发明人： Saichirou Kaneko , Masakatsu Hoshi , Yoshinori Murakami , Tetsuya Hayashi , Hideaki Tanaka
IPC分类号： H01L21/331
CPC分类号： H01L29/1608 , H01L29/1004 , H01L29/6606 , H01L29/66068 , H01L29/66234 , H01L29/7322 , H01L29/861
摘要： A high voltage semiconductor device having a high current gain hFE is formed with a collector region (20) of a first conduction type, an emitter region (40) of the first conduction type, and a base region (30) of a second conduction type opposite to the first conduction type located between the collector region and the emitter region. The free carrier density of the base region (30) where no depletion layer is formed is smaller than the space charge density of a depletion layer formed in the base region (30).
摘要翻译：具有高电流增益hFE的高电压半导体器件由第一导电类型的集电极区域（20），第一导电类型的发射极区域（40）和第二导电类型的基极区域（30）形成与位于集电极区域和发射极区域之间的第一导电类型相反。没有形成耗尽层的基极区域（30）的自由载流子密度小于形成在基极区域（30）中的耗尽层的空间电荷密度。

7. 发明申请

US20050012143A1 Semiconductor device and method of manufacturing the same 审中-公开
标题翻译：半导体装置及其制造方法
公开(公告)号：US20050012143A1
公开(公告)日：2005-01-20
申请号：US10872772
申请日：2004-06-22
申请人： Hideaki Tanaka , Masakatsu Hoshi , Tetsuya Hayashi , Saichirou Kaneko
发明人： Hideaki Tanaka , Masakatsu Hoshi , Tetsuya Hayashi , Saichirou Kaneko
IPC分类号： H01L21/04 , H01L29/24 , H01L29/267 , H01L29/49 , H01L29/739 , H01L29/78 , H01L21/331
CPC分类号： H01L29/7828 , H01L29/1608 , H01L29/165 , H01L29/4966 , H01L29/66068 , H01L29/739 , H01L29/78 , H01L29/7802 , H01L29/7804 , H01L29/7813 , H01L29/7838
摘要： An aspect of the present invention provides a semiconductor device that includes a semiconductor base including, a semiconductor substrate of a first conductivity type and a drain region of the first conductivity type formed on the semiconductor substrate and having a lower impurity concentration than the semiconductor substrate, a gate electrode insulated from the semiconductor base by a gate insulating film, the gate electrode made of a semiconductor material, a built-in potential difference between a region and the gate electrode made of the semiconductor material is greater than that of polysilicon having as high impurity concentration as possible, the region is a part of the drain region adjacent to the gate electrode through the gate insulating film.
摘要翻译：本发明的一个方面提供了一种半导体器件，其包括半导体基底，该半导体基底包括在半导体衬底上形成的第一导电类型的半导体衬底和第一导电类型的漏极区，并且具有比半导体衬底更低的杂质浓度，通过栅极绝缘膜与半导体基底绝缘的栅电极，由半导体材料制成的栅电极，由半导体材料制成的区域和栅电极之间的内置电位差大于具有高半导体材料的多晶硅的内部电位差杂质浓度尽可能地，该区域是通过栅极绝缘膜与栅电极相邻的漏极区域的一部分。

8. 发明授权

US08053320B2 Semiconductor device and manufacturing method thereof 有权
标题翻译：半导体装置及其制造方法
公开(公告)号：US08053320B2
公开(公告)日：2011-11-08
申请号：US11654666
申请日：2007-01-18
申请人： Tetsuya Hayashi , Hideaki Tanaka , Masakatsu Hoshi , Saichirou Kaneko
发明人： Tetsuya Hayashi , Hideaki Tanaka , Masakatsu Hoshi , Saichirou Kaneko
IPC分类号： H01L21/336
CPC分类号： H01L29/66068 , H01L29/1608 , H01L29/267 , H01L29/7828
摘要： An aspect of the present invention provides a semiconductor device that includes a first conductivity type semiconductor body, a source region in contact with the semiconductor body, whose bandgap is different from that of the semiconductor body, and which formed heterojunction with the semiconductor body, a gate insulating film in contact with a portion of junction between the source region and the semiconductor body, a gate electrode in contact with the gate insulating film, a source electrode, a low resistance region in contact with the source electrode and the source region, and connected ohmically with the source electrode, and a drain electrode connected ohmically with the semiconductor body.
摘要翻译：本发明的一个方面提供了一种半导体器件，其包括第一导电型半导体本体，与半导体本体接触的源极区域，其带隙与半导体本体的带隙不同，并且与半导体本体形成异质结，与栅极绝缘膜接触的栅电极，源电极，与源极电极和源极区域接触的低电阻区域，以及与源电极欧姆连接，以及与半导体主体欧姆连接的漏电极。

9. 发明申请

US20080026533A1 Semiconductor device and manufacturing method thereof 有权
标题翻译：半导体装置及其制造方法
公开(公告)号：US20080026533A1
公开(公告)日：2008-01-31
申请号：US11654666
申请日：2007-01-18
申请人： Tetsuya Hayashi , Hideaki Tanaka , Masakatsu Hoshi , Saichirou Kaneko
发明人： Tetsuya Hayashi , Hideaki Tanaka , Masakatsu Hoshi , Saichirou Kaneko
IPC分类号： H01L21/336
CPC分类号： H01L29/66068 , H01L29/1608 , H01L29/267 , H01L29/7828
摘要： An aspect of the present invention provides a semiconductor device that includes a first conductivity type semiconductor body, a source region in contact with the semiconductor body, whose bandgap is different from that of the semiconductor body, and which formed heterojunction with the semiconductor body, a gate insulating film in contact with a portion of junction between the source region and the semiconductor body, a gate electrode in contact with the gate insulating film, a source electrode, a low resistance region in contact with the source electrode and the source region, and connected ohmically with the source electrode, and a drain electrode connected ohmically with the semiconductor body.
摘要翻译：本发明的一个方面提供了一种半导体器件，其包括第一导电型半导体本体，与半导体本体接触的源极区域，其带隙与半导体本体的带隙不同，并且与半导体本体形成异质结，与栅极绝缘膜接触的栅电极，源电极，与源极电极和源极区域接触的低电阻区域，以及与源电极欧姆连接，以及与半导体主体欧姆连接的漏电极。

10. 发明授权

US07138668B2 Heterojunction diode with reduced leakage current 有权
标题翻译：杂环二极管具有减少的漏电流
公开(公告)号：US07138668B2
公开(公告)日：2006-11-21
申请号：US10898224
申请日：2004-07-26
申请人： Tetsuya Hayashi , Hideaki Tanaka , Masakatsu Hoshi , Saichirou Kaneko
发明人： Tetsuya Hayashi , Hideaki Tanaka , Masakatsu Hoshi , Saichirou Kaneko
IPC分类号： A01L31/072
CPC分类号： H01L29/7805 , H01L21/046 , H01L29/1608 , H01L29/165 , H01L29/66068 , H01L29/7395 , H01L29/7802 , H01L29/7827 , H01L29/7828 , H01L29/8083 , H01L29/861 , H01L29/872
摘要： An aspect of the present invention provides a semiconductor device that includes a first semiconductor region of a first conductivity type and a second semiconductor region of a second conductivity type, having a different band gap from the first semiconductor region and forming a heterojunction with the first semiconductor region.
摘要翻译：本发明的一个方面提供了一种半导体器件，其包括第一导电类型的第一半导体区域和第二导电类型的第二半导体区域，其具有与第一半导体区域不同的带隙并与第一半导体形成异质结地区。

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