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1. 发明申请

US20050012131A1 TRENCH-CAPACITOR DRAM CELL HAVING A FOLDED GATE CONDUCTOR 有权
标题翻译：具有折叠门控导体的TRENCH-CAPACITOR DRAM单元
公开(公告)号：US20050012131A1
公开(公告)日：2005-01-20
申请号：US10604344
申请日：2003-07-14
申请人： Yinan Chen , Ming-Cheng Chang , Jeng-Ping Lin , Tse-Yao Huang , Chang-Rong Wu , Hui-Min Mao
发明人： Yinan Chen , Ming-Cheng Chang , Jeng-Ping Lin , Tse-Yao Huang , Chang-Rong Wu , Hui-Min Mao
IPC分类号： H01L21/108 , H01L21/334 , H01L21/8242 , H01L27/108 , H01L29/94
CPC分类号： H01L27/10864 , H01L27/10832 , H01L29/66181 , H01L29/945
摘要： A novel trench-capacitor DRAM cell structure is disclosed. The trench-capacitor DRAM cell of this invention includes an active area island having a horizontal semiconductor surface and a vertical sidewall contiguous with the horizontal semiconductor surface. A pass transistor is disposed at the corner of the active area island. The pass transistor includes a folded gate conductor strip extending from the horizontal semiconductor surface to the vertical sidewall of the active area island, a source formed in the horizontal semiconductor surface, a drain formed in the vertical sidewall, and a gate oxide layer underneath the folded gate conductor strip. The source and drain define a folded channel. The trench-capacitor DRAM cell further includes a trench capacitor that is insulated from the folded gate conductor strip by a trench top oxide (TTO) layer and is coupled to the pass transistor via the drain.
摘要翻译：公开了一种新颖的沟槽电容器DRAM单元结构。本发明的沟槽电容器DRAM单元包括具有水平半导体表面的有源区域岛和与水平半导体表面邻接的垂直侧壁。传输晶体管设置在有源区域岛的拐角处。传输晶体管包括从水平半导体表面延伸到有源区岛的垂直侧壁的折叠栅极导体条，形成在水平半导体表面中的源，在垂直侧壁中形成的漏极和在折叠的下面的栅极氧化物层栅极导体条。源极和漏极限定折叠通道。沟槽电容器DRAM单元还包括沟槽电容器，其通过沟槽顶部氧化层（TTO）层与折叠的栅极导体条绝缘，并且经由漏极耦合到传输晶体管。

2. 发明授权

US06909136B2 Trench-capacitor DRAM cell having a folded gate conductor 有权
标题翻译：具有折叠栅极导体的沟槽电容器DRAM单元
公开(公告)号：US06909136B2
公开(公告)日：2005-06-21
申请号：US10604344
申请日：2003-07-14
申请人： Yinan Chen , Ming-Cheng Chang , Jeng-Ping Lin , Tse-Yao Huang , Change-Rong Wu , Hui-Min Mao
发明人： Yinan Chen , Ming-Cheng Chang , Jeng-Ping Lin , Tse-Yao Huang , Change-Rong Wu , Hui-Min Mao
IPC分类号： H01L21/108 , H01L21/334 , H01L21/8242 , H01L27/108 , H01L29/94
CPC分类号： H01L27/10864 , H01L27/10832 , H01L29/66181 , H01L29/945
摘要： A novel trench-capacitor DRAM cell structure is disclosed. The trench-capacitor DRAM cell of this invention includes an active area island having a horizontal semiconductor surface and a vertical sidewall contiguous with the horizontal semiconductor surface. A pass transistor is disposed at the corner of the active area island. The pass transistor includes a folded gate conductor strip extending from the horizontal semiconductor surface to the vertical sidewall of the active area island, a source formed in the horizontal semiconductor surface, a drain formed in the vertical sidewall, and a gate oxide layer underneath the folded gate conductor strip. The source and drain define a folded channel. The trench-capacitor DRAM cell further includes a trench capacitor that is insulated from the folded gate conductor strip by a trench top oxide (TTO) layer and is coupled to the pass transistor via the drain.
摘要翻译：公开了一种新颖的沟槽电容器DRAM单元结构。本发明的沟槽电容器DRAM单元包括具有水平半导体表面的有源区域岛和与水平半导体表面邻接的垂直侧壁。传输晶体管设置在有源区域岛的拐角处。传输晶体管包括从水平半导体表面延伸到有源区岛的垂直侧壁的折叠栅极导体条，形成在水平半导体表面中的源，在垂直侧壁中形成的漏极和在折叠的下面的栅极氧化物层栅极导体条。源极和漏极限定折叠通道。沟槽电容器DRAM单元还包括沟槽电容器，其通过沟槽顶部氧化层（TTO）层与折叠的栅极导体条绝缘，并且经由漏极耦合到传输晶体管。

3. 发明申请

US20060154435A1 METHOD OF FABRICATING TRENCH ISOLATION FOR TRENCH-CAPACITOR DRAM DEVICES 审中-公开
标题翻译：制造用于TRENCH-CAPACITOR DRAM器件的TRENCH隔离的方法
公开(公告)号：US20060154435A1
公开(公告)日：2006-07-13
申请号：US10907101
申请日：2005-03-20
申请人： Hsiu-Chun Lee , Tse-Yao Huang , Yinan Chen
发明人： Hsiu-Chun Lee , Tse-Yao Huang , Yinan Chen
IPC分类号： H01L21/20
CPC分类号： H01L21/76232
摘要： A method of fabricating trench isolation for trench-capacitor DRAM devices. After the formation of deep trench capacitors, an isolation trench is etched into a substrate. The isolation trench is initially filled with a first insulating layer, which is then recessed into the isolation trench to a depth that is lower than the substrate main surface. An epitaxial layer is grown from the exposed sidewalls of the isolation trench. The isolation trench is then filled with a second insulating layer.
摘要翻译：一种用于沟槽电容器DRAM器件的沟槽隔离的方法。在形成深沟槽电容器之后，将隔离沟槽蚀刻到衬底中。隔离沟槽最初填充有第一绝缘层，然后将第一绝缘层凹入到隔离沟槽中，其深度低于衬底主表面。从隔离沟槽的暴露的侧壁生长外延层。隔离沟槽然后用第二绝缘层填充。

4. 发明授权

US06140179A Method of forming a crown capacitor for a DRAM cell 有权
标题翻译：形成用于DRAM单元的表冠电容器的方法
公开(公告)号：US06140179A
公开(公告)日：2000-10-31
申请号：US326651
申请日：1999-06-07
申请人： Yinan Chen , Shih-chi Hsu , Tse Yao Huang
发明人： Yinan Chen , Shih-chi Hsu , Tse Yao Huang
IPC分类号： H01L21/02 , H01L27/108 , H01L21/8242
CPC分类号： H01L28/82 , H01L27/10814 , H01L28/87 , H01L28/91
摘要： The present invention discloses a method of forming a crown capacitor for a DRAM cell. An etching method having different selectivity between the BPSG and silicon oxynitride layer is applied to form a sacrificial structure with a concanovenex sidewall. Using the sacrificial structure as a mold, a high capacitance crown capacitor is obtained.
摘要翻译：本发明公开了一种形成用于DRAM单元的表冠电容器的方法。施加在BPSG和氮氧化硅层之间具有不同选择性的蚀刻方法以形成具有锥形侧壁的牺牲结构。使用牺牲结构作为模具，获得高电容冠电容器。

5. 发明申请

US20060228845A1 Method for pre-retaining CB opening 有权
公开(公告)号：US20060228845A1
公开(公告)日：2006-10-12
申请号：US11101007
申请日：2005-04-06
申请人： Yinan Chen , Jeng-Ping Lin , Feng-Chuan Lin
发明人： Yinan Chen , Jeng-Ping Lin , Feng-Chuan Lin
IPC分类号： H01L21/8234 , H01L21/336
CPC分类号： H01L21/76897 , H01L21/76895 , H01L27/10888
摘要： Disclosed is a method for pre-retaining CB opening in a DRAM manufacture process, wherein a CB opening is filed with a photo-resist layer and an LPD oxidation layer that is filled at room temperature to avoid damaging caused by conventional etching techniques. The LPD oxidation layer and the photo-resist are replaced easily by a polysilicon layer and a BPSG layer.

6. 发明授权

US6133089A Method for fabricating a DRAM capacitor 有权
标题翻译：制造DRAM电容器的方法
公开(公告)号：US6133089A
公开(公告)日：2000-10-17
申请号：US314201
申请日：1999-05-19
申请人： Tse Yao Huang , Shih-Chi Hsu , Yinan Chen , Hsing-Chuan Tsai
发明人： Tse Yao Huang , Shih-Chi Hsu , Yinan Chen , Hsing-Chuan Tsai
IPC分类号： H01L21/02 , H01L21/8242
CPC分类号： H01L28/91 , H01L27/10852
摘要： A method for fabricating a DRAM capacitor is described. First, a semiconductor substrate having a capacitor contact is provided. Next, a first polysilicon layer is formed. Then, an oxide layer and a silicon oxy-nitride layer are sequentially formed over the first polysilicon layer. Next, the silicon oxy-nitride layer, the oxide layer, and the first polysilicon layer are selectively etched to leave a rectangular stack layer. Afterwards, the oxide layer and the first polysilicon layer of the rectangular stack layer are etched from the sidewall direction to leave a double T-shaped stack layer. Then, second polysilicon layer is formed on the upper surface and the sidewall of the double T-shaped stack layer. Next, the second polysilicon layer is selectively removed. The remaining second and first polysilicon layer are used as the bottom electrode. Afterwards, a dielectric layer and an upper electrode are formed on the bottom electrode.
摘要翻译：描述制造DRAM电容器的方法。首先，提供具有电容器触点的半导体衬底。接下来，形成第一多晶硅层。然后，在第一多晶硅层上依次形成氧化物层和氮氧化硅层。接下来，选择性地蚀刻硅氮氧化物层，氧化物层和第一多晶硅层以留下矩形堆叠层。然后，从侧壁方向蚀刻矩形堆叠层的氧化物层和第一多晶硅层，留下双T型堆叠层。然后，在双T型堆叠层的上表面和侧壁上形成第二多晶硅层。接下来，选择性地去除第二多晶硅层。剩余的第二和第一多晶硅层用作底部电极。之后，在底部电极上形成电介质层和上部电极。

7. 发明授权

US07144799B2 Method for pre-retaining CB opening 有权
标题翻译：预先保留CB开口的方法
公开(公告)号：US07144799B2
公开(公告)日：2006-12-05
申请号：US11101007
申请日：2005-04-06
申请人： Yinan Chen , Jeng-Ping Lin , Feng-Chuan Lin
发明人： Yinan Chen , Jeng-Ping Lin , Feng-Chuan Lin
IPC分类号： H01L21/44
CPC分类号： H01L21/76897 , H01L21/76895 , H01L27/10888
摘要： Disclosed is a method for pre-retaining CB opening in a DRAM manufacture process, wherein a CB opening is filed with a photo-resist layer and an LPD oxidation layer that is filled at room temperature to avoid damaging caused by conventional etching techniques. The LPD oxidation layer and the photo-resist are replaced easily by a polysilicon layer and a BPSG layer.
摘要翻译：公开了一种用于在DRAM制造工艺中预保留CB开口的方法，其中CB开口与在室温下填充的光致抗蚀剂层和LPD氧化层一起提供以避免由常规蚀刻技术引起的损坏。 LPD氧化层和光致抗蚀剂容易被多晶硅层和BPSG层所替代。

8. 发明授权

US07138338B2 Method and composite hard mask for forming deep trenches in a semiconductor substrate 有权
标题翻译：用于在半导体衬底中形成深沟槽的方法和复合硬掩模
公开(公告)号：US07138338B2
公开(公告)日：2006-11-21
申请号：US10810804
申请日：2004-03-29
申请人： Chang-Rong Wu , Yinan Chen , Tuz-Ching Tsai
发明人： Chang-Rong Wu , Yinan Chen , Tuz-Ching Tsai
IPC分类号： H01L21/311
CPC分类号： H01L21/3081 , H01L21/0332 , H01L21/76224 , H01L29/66181
摘要： A method and structure for forming deep trenches in a semiconductor substrate is provided. The method comprises: providing a semiconductor substrate; forming a pad oxide layer on the semiconductor substrate; forming a pad nitride layer on the pad oxide layer; forming a borophosphosilicate glass layer on the pad nitride layer; forming a borosilicate glass layer on the borophosphosilicate glass layer; and forming deep trenches through the borosilicate glass layer, through the borophosphosilicate glass layer, through the pad nitride, through the pad oxide, and into the semiconductor substrate. The borosilicate glass layer and the borophosphosilicate glass layer function as a composite hard mask in forming the deep trenches. With the borophosphosilicate glass layer, the composite hard mask can be easily removed by dry etch process using hydrogen fluoride vapor after the deep trenches have been formed.
摘要翻译：提供了一种在半导体衬底中形成深沟槽的方法和结构。该方法包括：提供半导体衬底; 在所述半导体衬底上形成衬垫氧化物层; 在所述焊盘氧化物层上形成衬垫氮化物层; 在衬垫氮化物层上形成硼磷硅酸盐玻璃层; 在硼磷硅酸盐玻璃层上形成硼硅酸盐玻璃层; 并通过硼硅酸盐玻璃层，通过硼磷硅酸盐玻璃层，通过衬垫氮化物，通过衬垫氧化物形成深沟槽并进入半导体衬底。硼硅酸盐玻璃层和硼磷硅酸盐玻璃层在形成深沟槽时用作复合硬掩模。对于硼磷硅酸盐玻璃层，在形成深沟槽之后，可以通过使用氟化氢蒸气的干法蚀刻工艺容易地去除复合硬掩模。

9. 发明申请

US20060049132A1 Etchant composition and the use thereof 审中-公开
标题翻译：蚀刻剂组合物及其用途
公开(公告)号：US20060049132A1
公开(公告)日：2006-03-09
申请号：US10934382
申请日：2004-09-07
申请人： Chang-Rong Wu , Yinan Chen
发明人： Chang-Rong Wu , Yinan Chen
IPC分类号： C09K13/00 , H01B13/00 , B44C1/22
CPC分类号： H01L21/31111 , C09K13/08 , H01L21/02063 , H01L21/02071 , H01L21/30604 , H01L21/32134
摘要： The present invention relates to an etchant composition and the use thereof.
摘要翻译：本发明涉及一种蚀刻剂组合物及其用途。

10. 发明申请

US20050215061A1 Method and composite hard mask for forming deep trenches in a semiconductor substrate 有权
标题翻译：用于在半导体衬底中形成深沟槽的方法和复合硬掩模
公开(公告)号：US20050215061A1
公开(公告)日：2005-09-29
申请号：US10810804
申请日：2004-03-29
申请人： Chang-Rong Wu , Yinan Chen , Tuz-Ching Tsai
发明人： Chang-Rong Wu , Yinan Chen , Tuz-Ching Tsai
IPC分类号： H01L21/033 , H01L21/20 , H01L21/308 , H01L21/31 , H01L21/311 , H01L21/334 , H01L21/469 , H01L21/762 , H01L21/8242
CPC分类号： H01L21/3081 , H01L21/0332 , H01L21/76224 , H01L29/66181
摘要： A method and structure for forming deep trenches in a semiconductor substrate is provided. The method comprises: providing a semiconductor substrate; forming a pad oxide layer on the semiconductor substrate; forming a pad nitride layer on the pad oxide layer; forming a borophosphosilicate glass layer on the pad nitride layer; forming a borosilicate glass layer on the borophosphosilicate glass layer; and forming deep trenches through the borosilicate glass layer, through the borophosphosilicate glass layer, through the pad nitride, through the pad oxide, and into the semiconductor substrate. The borosilicate glass layer and the borophosphosilicate glass layer function as a composite hard mask in forming the deep trenches. With the borophosphosilicate glass layer, the composite hard mask can be easily removed by dry etch process using hydrogen fluoride vapor after the deep trenches have been formed.
摘要翻译：提供了一种在半导体衬底中形成深沟槽的方法和结构。该方法包括：提供半导体衬底; 在所述半导体衬底上形成衬垫氧化物层; 在所述焊盘氧化物层上形成衬垫氮化物层; 在衬垫氮化物层上形成硼磷硅酸盐玻璃层; 在硼磷硅酸盐玻璃层上形成硼硅酸盐玻璃层; 并通过硼硅酸盐玻璃层，通过硼磷硅酸盐玻璃层，通过衬垫氮化物，通过衬垫氧化物形成深沟槽并进入半导体衬底。硼硅酸盐玻璃层和硼磷硅酸盐玻璃层在形成深沟槽时用作复合硬掩模。对于硼磷硅酸盐玻璃层，在形成深沟槽之后，可以通过使用氟化氢蒸气的干法蚀刻工艺容易地去除复合硬掩模。

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