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1. 发明申请

US20050012131A1 TRENCH-CAPACITOR DRAM CELL HAVING A FOLDED GATE CONDUCTOR 有权
标题翻译：具有折叠门控导体的TRENCH-CAPACITOR DRAM单元
公开(公告)号：US20050012131A1
公开(公告)日：2005-01-20
申请号：US10604344
申请日：2003-07-14
申请人： Yinan Chen , Ming-Cheng Chang , Jeng-Ping Lin , Tse-Yao Huang , Chang-Rong Wu , Hui-Min Mao
发明人： Yinan Chen , Ming-Cheng Chang , Jeng-Ping Lin , Tse-Yao Huang , Chang-Rong Wu , Hui-Min Mao
IPC分类号： H01L21/108 , H01L21/334 , H01L21/8242 , H01L27/108 , H01L29/94
CPC分类号： H01L27/10864 , H01L27/10832 , H01L29/66181 , H01L29/945
摘要： A novel trench-capacitor DRAM cell structure is disclosed. The trench-capacitor DRAM cell of this invention includes an active area island having a horizontal semiconductor surface and a vertical sidewall contiguous with the horizontal semiconductor surface. A pass transistor is disposed at the corner of the active area island. The pass transistor includes a folded gate conductor strip extending from the horizontal semiconductor surface to the vertical sidewall of the active area island, a source formed in the horizontal semiconductor surface, a drain formed in the vertical sidewall, and a gate oxide layer underneath the folded gate conductor strip. The source and drain define a folded channel. The trench-capacitor DRAM cell further includes a trench capacitor that is insulated from the folded gate conductor strip by a trench top oxide (TTO) layer and is coupled to the pass transistor via the drain.
摘要翻译：公开了一种新颖的沟槽电容器DRAM单元结构。本发明的沟槽电容器DRAM单元包括具有水平半导体表面的有源区域岛和与水平半导体表面邻接的垂直侧壁。传输晶体管设置在有源区域岛的拐角处。传输晶体管包括从水平半导体表面延伸到有源区岛的垂直侧壁的折叠栅极导体条，形成在水平半导体表面中的源，在垂直侧壁中形成的漏极和在折叠的下面的栅极氧化物层栅极导体条。源极和漏极限定折叠通道。沟槽电容器DRAM单元还包括沟槽电容器，其通过沟槽顶部氧化层（TTO）层与折叠的栅极导体条绝缘，并且经由漏极耦合到传输晶体管。

2. 发明申请

US20130075812A1 SINGLE-SIDED ACCESS DEVICE AND FABRICATION METHOD THEREOF 有权
标题翻译：单面访问装置及其制造方法
公开(公告)号：US20130075812A1
公开(公告)日：2013-03-28
申请号：US13239389
申请日：2011-09-22
申请人： Hsin-Jung Ho , Jeng-Ping Lin , Neng-Tai Shih , Chang-Rong Wu , Chiang-Hung Lin , Chih-Huang Wu
发明人： Hsin-Jung Ho , Jeng-Ping Lin , Neng-Tai Shih , Chang-Rong Wu , Chiang-Hung Lin , Chih-Huang Wu
IPC分类号： H01L29/78
CPC分类号： H01L21/823431 , H01L21/845 , H01L27/10826 , H01L27/10879 , H01L29/66795 , H01L29/785
摘要： A single-sided access device includes an active fin structure comprising a source contact area and a drain contact area separated from each other by an isolation region therebetween; a trench isolation structure disposed at one side of the active fin structure, wherein the trench isolation structure intersects with the isolation region between the source contact area and the drain contact area; a sidewall gate disposed under the isolation region and on the other side of the active fin structure opposite to the trench isolation structure so that the active fin structure is sandwiched by the trench isolation structure and the sidewall gate, wherein the sidewall gate has multi-fingers that engage with the active fin structure; and a gate dielectric layer between the sidewall gate and the active fin structure.
摘要翻译：单面存取装置包括活动鳍片结构，其包括源极接触区域和通过它们之间的隔离区域彼此分离的漏极接触区域; 沟槽隔离结构，设置在所述有源鳍结构的一侧，其中所述沟槽隔离结构与所述源极接触区域和所述漏极接触区域之间的隔离区域相交; 侧壁门，其设置在所述隔离区域下方并且在所述有源鳍结构的另一侧与所述沟槽隔离结构相对，使得所述有源鳍结构被所述沟槽隔离结构和所述侧壁栅极夹持，其中所述侧壁门具有多指与活跃的鳍结构互动; 以及在侧壁浇口和活性鳍结构之间的栅介质层。

3. 发明授权

US08395209B1 Single-sided access device and fabrication method thereof 有权
标题翻译：单面接入装置及其制造方法
公开(公告)号：US08395209B1
公开(公告)日：2013-03-12
申请号：US13239389
申请日：2011-09-22
申请人： Hsin-Jung Ho , Jeng-Ping Lin , Neng-Tai Shih , Chang-Rong Wu , Chiang-Hung Lin , Chih-Huang Wu
发明人： Hsin-Jung Ho , Jeng-Ping Lin , Neng-Tai Shih , Chang-Rong Wu , Chiang-Hung Lin , Chih-Huang Wu
IPC分类号： H01L29/66
CPC分类号： H01L21/823431 , H01L21/845 , H01L27/10826 , H01L27/10879 , H01L29/66795 , H01L29/785
摘要： A single-sided access device includes an active fin structure comprising a source contact area and a drain contact area separated from each other by an isolation region therebetween; a trench isolation structure disposed at one side of the active fin structure, wherein the trench isolation structure intersects with the isolation region between the source contact area and the drain contact area; a sidewall gate disposed under the isolation region and on the other side of the active fin structure opposite to the trench isolation structure so that the active fin structure is sandwiched by the trench isolation structure and the sidewall gate, wherein the sidewall gate has multi-fingers that engage with the active fin structure; and a gate dielectric layer between the sidewall gate and the active fin structure.
摘要翻译：单面存取装置包括活动鳍片结构，其包括源极接触区域和通过它们之间的隔离区域彼此分离的漏极接触区域; 沟槽隔离结构，设置在所述有源鳍结构的一侧，其中所述沟槽隔离结构与所述源极接触区域和所述漏极接触区域之间的隔离区域相交; 侧壁门，其设置在所述隔离区域下方并且在所述有源鳍结构的另一侧与所述沟槽隔离结构相对，使得所述有源鳍结构被所述沟槽隔离结构和所述侧壁栅极夹持，其中所述侧壁门具有多指与活跃的鳍结构互动; 以及在侧壁浇口和活性鳍结构之间的栅介质层。

4. 发明申请

US20060049132A1 Etchant composition and the use thereof 审中-公开
标题翻译：蚀刻剂组合物及其用途
公开(公告)号：US20060049132A1
公开(公告)日：2006-03-09
申请号：US10934382
申请日：2004-09-07
申请人： Chang-Rong Wu , Yinan Chen
发明人： Chang-Rong Wu , Yinan Chen
IPC分类号： C09K13/00 , H01B13/00 , B44C1/22
CPC分类号： H01L21/31111 , C09K13/08 , H01L21/02063 , H01L21/02071 , H01L21/30604 , H01L21/32134
摘要： The present invention relates to an etchant composition and the use thereof.
摘要翻译：本发明涉及一种蚀刻剂组合物及其用途。

5. 发明授权

US07138338B2 Method and composite hard mask for forming deep trenches in a semiconductor substrate 有权
标题翻译：用于在半导体衬底中形成深沟槽的方法和复合硬掩模
公开(公告)号：US07138338B2
公开(公告)日：2006-11-21
申请号：US10810804
申请日：2004-03-29
申请人： Chang-Rong Wu , Yinan Chen , Tuz-Ching Tsai
发明人： Chang-Rong Wu , Yinan Chen , Tuz-Ching Tsai
IPC分类号： H01L21/311
CPC分类号： H01L21/3081 , H01L21/0332 , H01L21/76224 , H01L29/66181
摘要： A method and structure for forming deep trenches in a semiconductor substrate is provided. The method comprises: providing a semiconductor substrate; forming a pad oxide layer on the semiconductor substrate; forming a pad nitride layer on the pad oxide layer; forming a borophosphosilicate glass layer on the pad nitride layer; forming a borosilicate glass layer on the borophosphosilicate glass layer; and forming deep trenches through the borosilicate glass layer, through the borophosphosilicate glass layer, through the pad nitride, through the pad oxide, and into the semiconductor substrate. The borosilicate glass layer and the borophosphosilicate glass layer function as a composite hard mask in forming the deep trenches. With the borophosphosilicate glass layer, the composite hard mask can be easily removed by dry etch process using hydrogen fluoride vapor after the deep trenches have been formed.
摘要翻译：提供了一种在半导体衬底中形成深沟槽的方法和结构。该方法包括：提供半导体衬底; 在所述半导体衬底上形成衬垫氧化物层; 在所述焊盘氧化物层上形成衬垫氮化物层; 在衬垫氮化物层上形成硼磷硅酸盐玻璃层; 在硼磷硅酸盐玻璃层上形成硼硅酸盐玻璃层; 并通过硼硅酸盐玻璃层，通过硼磷硅酸盐玻璃层，通过衬垫氮化物，通过衬垫氧化物形成深沟槽并进入半导体衬底。硼硅酸盐玻璃层和硼磷硅酸盐玻璃层在形成深沟槽时用作复合硬掩模。对于硼磷硅酸盐玻璃层，在形成深沟槽之后，可以通过使用氟化氢蒸气的干法蚀刻工艺容易地去除复合硬掩模。

6. 发明申请

US20050215061A1 Method and composite hard mask for forming deep trenches in a semiconductor substrate 有权
标题翻译：用于在半导体衬底中形成深沟槽的方法和复合硬掩模
公开(公告)号：US20050215061A1
公开(公告)日：2005-09-29
申请号：US10810804
申请日：2004-03-29
申请人： Chang-Rong Wu , Yinan Chen , Tuz-Ching Tsai
发明人： Chang-Rong Wu , Yinan Chen , Tuz-Ching Tsai
IPC分类号： H01L21/033 , H01L21/20 , H01L21/308 , H01L21/31 , H01L21/311 , H01L21/334 , H01L21/469 , H01L21/762 , H01L21/8242
CPC分类号： H01L21/3081 , H01L21/0332 , H01L21/76224 , H01L29/66181
摘要： A method and structure for forming deep trenches in a semiconductor substrate is provided. The method comprises: providing a semiconductor substrate; forming a pad oxide layer on the semiconductor substrate; forming a pad nitride layer on the pad oxide layer; forming a borophosphosilicate glass layer on the pad nitride layer; forming a borosilicate glass layer on the borophosphosilicate glass layer; and forming deep trenches through the borosilicate glass layer, through the borophosphosilicate glass layer, through the pad nitride, through the pad oxide, and into the semiconductor substrate. The borosilicate glass layer and the borophosphosilicate glass layer function as a composite hard mask in forming the deep trenches. With the borophosphosilicate glass layer, the composite hard mask can be easily removed by dry etch process using hydrogen fluoride vapor after the deep trenches have been formed.
摘要翻译：提供了一种在半导体衬底中形成深沟槽的方法和结构。该方法包括：提供半导体衬底; 在所述半导体衬底上形成衬垫氧化物层; 在所述焊盘氧化物层上形成衬垫氮化物层; 在衬垫氮化物层上形成硼磷硅酸盐玻璃层; 在硼磷硅酸盐玻璃层上形成硼硅酸盐玻璃层; 并通过硼硅酸盐玻璃层，通过硼磷硅酸盐玻璃层，通过衬垫氮化物，通过衬垫氧化物形成深沟槽并进入半导体衬底。硼硅酸盐玻璃层和硼磷硅酸盐玻璃层在形成深沟槽时用作复合硬掩模。对于硼磷硅酸盐玻璃层，在形成深沟槽之后，可以通过使用氟化氢蒸气的干法蚀刻工艺容易地去除复合硬掩模。

7. 发明授权

US08901527B2 Resistive random access memory structure with tri-layer resistive stack 有权
标题翻译：具有三层电阻堆栈的电阻式随机存取存储器结构
公开(公告)号：US08901527B2
公开(公告)日：2014-12-02
申请号：US12829392
申请日：2010-07-02
申请人： Chun-I Hsieh , Chang-Rong Wu , Neng-Tai Shih
发明人： Chun-I Hsieh , Chang-Rong Wu , Neng-Tai Shih
IPC分类号： H01L29/02 , H01L45/00
CPC分类号： H01L45/165 , H01L45/08 , H01L45/145 , H01L45/146 , H01L45/1608 , H01L45/1641
摘要： An RRAM includes a resistive layer including a dielectric layer and surplus oxygen ions or nitrogen ions from a treatment on the dielectric layer after the dielectric layer is formed. When the RRAM is applied with a voltage, the oxygen ions or nitrogen ions occupy vacancies in the dielectric layer to increase resistance of the resistive layer. When the RRAM is applied with another voltage, the oxygen ions or nitrogen ions are removed from the vacancies to lower the resistance of the resistive layer.
摘要翻译： RRAM包括在形成介电层之后，在电介质层上的处理中包括电介质层和剩余的氧离子或氮离子的电阻层。当RRAM被施加电压时，氧离子或氮离子占据电介质层中的空位以增加电阻层的电阻。当RRAM施加另一电压时，从空位中去除氧离子或氮离子以降低电阻层的电阻。

8. 发明授权

US08149614B2 Magnetoresistive random access memory element and fabrication method thereof 有权
标题翻译：磁阻随机存取存储元件及其制造方法
公开(公告)号：US08149614B2
公开(公告)日：2012-04-03
申请号：US12750716
申请日：2010-03-31
申请人： Chun-I Hsieh , Chang-Rong Wu
发明人： Chun-I Hsieh , Chang-Rong Wu
IPC分类号： G11C11/00
CPC分类号： H01L43/12 , B82Y25/00 , B82Y40/00 , G11C11/161 , H01F10/3254 , H01F41/308 , H01L43/02 , H01L43/08 , H01L43/10
摘要： A magnetoresistive random access memory (MRAM) element includes a bottom electrode embedded in a first insulating layer; an annular reference layer in a first via hole of a second insulating layer on the first insulating layer, the annular reference layer being situated above the bottom electrode; a first gap fill material layer filling the first via hole; a barrier layer covering the annular reference layer, the second insulating layer and the first gap fill material layer; an annular free layer in a second via hole of a third insulating layer on the second insulating layer, the annular free layer being situated above the annular reference layer; and a top electrode stacked on the annular free layer.
摘要翻译：磁阻随机存取存储器（MRAM）元件包括嵌入第一绝缘层中的底电极; 在所述第一绝缘层上的第二绝缘层的第一通孔中的环形参考层，所述环形参考层位于所述底部电极的上方; 填充第一通孔的第一间隙填充材料层; 覆盖所述环形基准层，所述第二绝缘层和所述第一间隙填充材料层的阻挡层; 在所述第二绝缘层上的第三绝缘层的第二通孔中的环形自由层，所述环形自由层位于所述环形参考层的上方; 以及堆叠在环形自由层上的顶部电极。

9. 发明申请

US20120001141A1 RRAM structure and method of making the same 有权
标题翻译： RRAM结构和制作方法
公开(公告)号：US20120001141A1
公开(公告)日：2012-01-05
申请号：US12829392
申请日：2010-07-02
申请人： Chun-I Hsieh , Chang-Rong Wu , Neng-Tai Shih
发明人： Chun-I Hsieh , Chang-Rong Wu , Neng-Tai Shih
IPC分类号： H01L45/00 , H01L21/02
CPC分类号： H01L45/165 , H01L45/08 , H01L45/145 , H01L45/146 , H01L45/1608 , H01L45/1641
摘要： An RRAM includes a resistive layer including a dielectric layer and surplus oxygen ions or nitrogen ions from a treatment on the dielectric layer after the dielectric layer is formed. When the RRAM is applied with a voltage, the oxygen ions or nitrogen ions occupy vacancies in the dielectric layer to increase resistance of the resistive layer. When the RRAM is applied with another voltage, the oxygen ions or nitrogen ions are removed from the vacancies to lower the resistance of the resistive layer.
摘要翻译： RRAM包括在形成介电层之后，在电介质层上的处理中包括电介质层和剩余的氧离子或氮离子的电阻层。当RRAM被施加电压时，氧离子或氮离子占据电介质层中的空位以增加电阻层的电阻。当RRAM施加另一电压时，从空位中去除氧离子或氮离子以降低电阻层的电阻。

10. 发明授权

US07943917B2 Non-volatile memory cell and fabrication method thereof 有权
标题翻译：非易失性存储单元及其制造方法
公开(公告)号：US07943917B2
公开(公告)日：2011-05-17
申请号：US12420115
申请日：2009-04-08
申请人： Chun-I Hsieh , Chang-Rong Wu
发明人： Chun-I Hsieh , Chang-Rong Wu
IPC分类号： H01L29/02 , H01L47/00 , H01L29/04
CPC分类号： H01L45/04 , H01L45/1233 , H01L45/146 , H01L45/1616 , H01L45/1625
摘要： A non-volatile memory cell and the fabrication method thereof are provided. The non-volatile memory cell comprises a top electrode, a bottom electrode and an oxide layer disposed between the top electrode and the bottom electrode. The oxide layer comprises a relatively low oxygen content layer adjacent to the bottom electrode, a relatively high oxygen content layer adjacent to the top electrode, and a transition layer disposed between the relatively high and the relatively low oxygen content layers. The transition layer has an oxygen concentration within a range between those of the relatively high and the relatively low oxygen content layers.
摘要翻译：提供了一种非易失性存储单元及其制造方法。非易失性存储单元包括顶电极，底电极和设置在顶电极和底电极之间的氧化物层。氧化物层包括与底部电极相邻的相对较低的氧含量层，与顶部电极相邻的相对高的氧含量层，以及设置在相对高的氧含量层和较低氧含量层之间的过渡层。过渡层的氧浓度在相对高的氧含量层和相对较低的氧含量层之间的范围内。

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